8a3fe4f86c
Mark up all error and warning messages. * ada-lang.c, amd64-tdep.c, arch-utils.c, breakpoint.c: Update. * bsd-kvm.c, bsd-uthread.c, coff-solib.h, coffread.c: Update. * core-aout.c, core-regset.c, corefile.c, corelow.c: Update. * cp-abi.c, cp-support.c, cp-valprint.c, cris-tdep.c: Update. * dbxread.c, demangle.c, doublest.c, dsrec.c: Update. * dve3900-rom.c, dwarf2expr.c, dwarf2loc.c: Update. * dwarf2read.c, dwarfread.c, elfread.c, eval.c: Update. * event-top.c, exec.c, expprint.c, f-lang.c: Update. * f-typeprint.c, f-valprint.c, fbsd-nat.c, findvar.c: Update. * frame.c, frv-linux-tdep.c, gcore.c, gdbtypes.c: Update. * gnu-nat.c, gnu-v2-abi.c, gnu-v3-abi.c, go32-nat.c: Update. * hpacc-abi.c, hppa-hpux-nat.c, hppa-hpux-tdep.c: Update. * hppa-linux-nat.c, hppa-linux-tdep.c, hppa-tdep.c: Update. * hpread.c, hpux-thread.c, i386-linux-nat.c: Update. * i386-linux-tdep.c, i386-tdep.c, i386bsd-nat.c: Update. * i386gnu-nat.c, i387-tdep.c, ia64-linux-nat.c: Update. * ia64-tdep.c, inf-child.c, inf-ptrace.c, inf-ttrace.c: Update. * infcall.c, infcmd.c, inflow.c, infptrace.c, infrun.c: Update. * inftarg.c, interps.c, irix5-nat.c, jv-lang.c: Update. * kod-cisco.c, kod.c, language.c, libunwind-frame.c: Update. * linespec.c, linux-nat.c, linux-thread-db.c, m2-lang.c: Update. * m32r-rom.c, m68hc11-tdep.c, m68k-tdep.c: Update. * m68klinux-nat.c, macrocmd.c, macroexp.c, main.c: Update. * maint.c, mdebugread.c, mem-break.c, memattr.c: Update. * mips-linux-tdep.c, mips-tdep.c, mipsread.c, monitor.c: Update. * nlmread.c, nto-procfs.c, objc-lang.c, objfiles.c: Update. * observer.c, ocd.c, p-lang.c, p-typeprint.c: Update. * p-valprint.c, pa64solib.c, parse.c, ppc-linux-tdep.c: Update. * ppcnbsd-tdep.c, printcmd.c, procfs.c, remote-e7000.c: Update. * remote-fileio.c, remote-m32r-sdi.c, remote-rdi.c: Update. * remote-rdp.c, remote-sim.c, remote-st.c: Update. * remote-utils.c, remote-utils.h, remote.c: Update. * rom68k-rom.c, rs6000-nat.c, s390-tdep.c, scm-lang.c: Update. * ser-e7kpc.c, ser-tcp.c, ser-unix.c, sh-tdep.c: Update. * sh3-rom.c, shnbsd-tdep.c, sol-thread.c, solib-aix5.c: Update. * solib-frv.c, solib-irix.c, solib-osf.c, solib-pa64.c: Update. * solib-som.c, solib-sunos.c, solib-svr4.c, solib.c: Update. * somread.c, somsolib.c, source.c, stabsread.c: Update. * stack.c, std-regs.c, symfile-mem.c, symfile.c: Update. * symmisc.c, symtab.c, target.c, thread.c, top.c: Update. * tracepoint.c, trad-frame.c, typeprint.c, utils.c: Update. * uw-thread.c, valarith.c, valops.c, valprint.c: Update. * value.c, varobj.c, version.in, win32-nat.c, wince.c: Update. * xcoffread.c, xcoffsolib.c, cli/cli-cmds.c: Update. * cli/cli-decode.c, cli/cli-dump.c, cli/cli-logging.c: Update. * cli/cli-script.c, cli/cli-setshow.c, mi/mi-cmd-break.c: Update. * mi/mi-cmd-disas.c, mi/mi-cmd-env.c, mi/mi-cmd-file.c: Update. * mi/mi-cmd-stack.c, mi/mi-cmd-var.c, mi/mi-getopt.c: Update. * mi/mi-symbol-cmds.c, tui/tui-layout.c, tui/tui-stack.c: Update. * tui/tui-win.c: Update.
277 lines
8.0 KiB
C
277 lines
8.0 KiB
C
/* Native support for the SGI Iris running IRIX version 5, for GDB.
|
|
|
|
Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
|
|
1998, 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
|
|
|
|
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
|
|
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
|
|
Implemented for Irix 4.x by Garrett A. Wollman.
|
|
Modified for Irix 5.x by Ian Lance Taylor.
|
|
|
|
This file is part of GDB.
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 2 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program; if not, write to the Free Software
|
|
Foundation, Inc., 59 Temple Place - Suite 330,
|
|
Boston, MA 02111-1307, USA. */
|
|
|
|
#include "defs.h"
|
|
#include "inferior.h"
|
|
#include "gdbcore.h"
|
|
#include "target.h"
|
|
#include "regcache.h"
|
|
|
|
#include "gdb_string.h"
|
|
#include <sys/time.h>
|
|
#include <sys/procfs.h>
|
|
#include <setjmp.h> /* For JB_XXX. */
|
|
|
|
/* Prototypes for supply_gregset etc. */
|
|
#include "gregset.h"
|
|
#include "mips-tdep.h"
|
|
|
|
static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR);
|
|
|
|
/* Size of elements in jmpbuf */
|
|
|
|
#define JB_ELEMENT_SIZE 4
|
|
|
|
/*
|
|
* See the comment in m68k-tdep.c regarding the utility of these functions.
|
|
*
|
|
* These definitions are from the MIPS SVR4 ABI, so they may work for
|
|
* any MIPS SVR4 target.
|
|
*/
|
|
|
|
void
|
|
supply_gregset (gregset_t *gregsetp)
|
|
{
|
|
int regi;
|
|
greg_t *regp = &(*gregsetp)[0];
|
|
int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch);
|
|
static char zerobuf[32] = {0};
|
|
|
|
for (regi = 0; regi <= CTX_RA; regi++)
|
|
regcache_raw_supply (current_regcache, regi,
|
|
(char *) (regp + regi) + gregoff);
|
|
|
|
regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->pc,
|
|
(char *) (regp + CTX_EPC) + gregoff);
|
|
regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->hi,
|
|
(char *) (regp + CTX_MDHI) + gregoff);
|
|
regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->lo,
|
|
(char *) (regp + CTX_MDLO) + gregoff);
|
|
regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->cause,
|
|
(char *) (regp + CTX_CAUSE) + gregoff);
|
|
|
|
/* Fill inaccessible registers with zero. */
|
|
regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf);
|
|
}
|
|
|
|
void
|
|
fill_gregset (gregset_t *gregsetp, int regno)
|
|
{
|
|
int regi;
|
|
greg_t *regp = &(*gregsetp)[0];
|
|
LONGEST regval;
|
|
|
|
/* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
|
|
executable, we have to sign extend the registers to 64 bits before
|
|
filling in the gregset structure. */
|
|
|
|
for (regi = 0; regi <= CTX_RA; regi++)
|
|
if ((regno == -1) || (regno == regi))
|
|
{
|
|
regcache_raw_read_signed (current_regcache, regi, ®val);
|
|
*(regp + regi) = regval;
|
|
}
|
|
|
|
if ((regno == -1) || (regno == PC_REGNUM))
|
|
{
|
|
regcache_raw_read_signed
|
|
(current_regcache, mips_regnum (current_gdbarch)->pc, ®val);
|
|
*(regp + CTX_EPC) = regval;
|
|
}
|
|
|
|
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
|
|
{
|
|
regcache_raw_read_signed
|
|
(current_regcache, mips_regnum (current_gdbarch)->cause, ®val);
|
|
*(regp + CTX_CAUSE) = regval;
|
|
}
|
|
|
|
if ((regno == -1)
|
|
|| (regno == mips_regnum (current_gdbarch)->hi))
|
|
{
|
|
regcache_raw_read_signed
|
|
(current_regcache, mips_regnum (current_gdbarch)->hi, ®val);
|
|
*(regp + CTX_MDHI) = regval;
|
|
}
|
|
|
|
if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
|
|
{
|
|
regcache_raw_read_signed
|
|
(current_regcache, mips_regnum (current_gdbarch)->lo, ®val);
|
|
*(regp + CTX_MDLO) = regval;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Now we do the same thing for floating-point registers.
|
|
* We don't bother to condition on FP0_REGNUM since any
|
|
* reasonable MIPS configuration has an R3010 in it.
|
|
*
|
|
* Again, see the comments in m68k-tdep.c.
|
|
*/
|
|
|
|
void
|
|
supply_fpregset (fpregset_t *fpregsetp)
|
|
{
|
|
int regi;
|
|
static char zerobuf[32] = {0};
|
|
|
|
/* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
|
|
|
|
for (regi = 0; regi < 32; regi++)
|
|
regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
|
|
(char *) &fpregsetp->fp_r.fp_regs[regi]);
|
|
|
|
regcache_raw_supply (current_regcache,
|
|
mips_regnum (current_gdbarch)->fp_control_status,
|
|
(char *) &fpregsetp->fp_csr);
|
|
|
|
/* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
|
|
regcache_raw_supply (current_regcache,
|
|
mips_regnum (current_gdbarch)->fp_implementation_revision,
|
|
zerobuf);
|
|
}
|
|
|
|
void
|
|
fill_fpregset (fpregset_t *fpregsetp, int regno)
|
|
{
|
|
int regi;
|
|
char *from, *to;
|
|
|
|
/* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
|
|
|
|
for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++)
|
|
{
|
|
if ((regno == -1) || (regno == regi))
|
|
{
|
|
to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]);
|
|
regcache_raw_read (current_regcache, regi, to);
|
|
}
|
|
}
|
|
|
|
if ((regno == -1)
|
|
|| (regno == mips_regnum (current_gdbarch)->fp_control_status))
|
|
regcache_raw_read (current_regcache,
|
|
mips_regnum (current_gdbarch)->fp_control_status,
|
|
&fpregsetp->fp_csr);
|
|
}
|
|
|
|
|
|
/* Figure out where the longjmp will land.
|
|
We expect the first arg to be a pointer to the jmp_buf structure from which
|
|
we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
|
|
This routine returns true on success. */
|
|
|
|
int
|
|
get_longjmp_target (CORE_ADDR *pc)
|
|
{
|
|
char *buf;
|
|
CORE_ADDR jb_addr;
|
|
|
|
buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
|
|
jb_addr = read_register (MIPS_A0_REGNUM);
|
|
|
|
if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
|
|
TARGET_PTR_BIT / TARGET_CHAR_BIT))
|
|
return 0;
|
|
|
|
*pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Provide registers to GDB from a core file.
|
|
|
|
CORE_REG_SECT points to an array of bytes, which were obtained from
|
|
a core file which BFD thinks might contain register contents.
|
|
CORE_REG_SIZE is its size.
|
|
|
|
Normally, WHICH says which register set corelow suspects this is:
|
|
0 --- the general-purpose register set
|
|
2 --- the floating-point register set
|
|
However, for Irix 5, WHICH isn't used.
|
|
|
|
REG_ADDR is also unused. */
|
|
|
|
static void
|
|
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR reg_addr)
|
|
{
|
|
char *srcp = core_reg_sect;
|
|
int regno;
|
|
|
|
if (core_reg_size == deprecated_register_bytes ())
|
|
{
|
|
for (regno = 0; regno < NUM_REGS; regno++)
|
|
{
|
|
regcache_raw_write (current_regcache, regno, srcp);
|
|
srcp += register_size (current_gdbarch, regno);
|
|
}
|
|
}
|
|
else if (mips_isa_regsize (current_gdbarch) == 4 &&
|
|
core_reg_size == (2 * mips_isa_regsize (current_gdbarch)) * NUM_REGS)
|
|
{
|
|
/* This is a core file from a N32 executable, 64 bits are saved
|
|
for all registers. */
|
|
for (regno = 0; regno < NUM_REGS; regno++)
|
|
{
|
|
if (regno >= FP0_REGNUM && regno < (FP0_REGNUM + 32))
|
|
{
|
|
regcache_raw_write (current_regcache, regno, srcp);
|
|
}
|
|
else
|
|
{
|
|
regcache_raw_write (current_regcache, regno, srcp + 4);
|
|
}
|
|
srcp += 8;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
warning (_("wrong size gregset struct in core file"));
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Register that we are able to handle irix5 core file formats.
|
|
This really is bfd_target_unknown_flavour */
|
|
|
|
static struct core_fns irix5_core_fns =
|
|
{
|
|
bfd_target_unknown_flavour, /* core_flavour */
|
|
default_check_format, /* check_format */
|
|
default_core_sniffer, /* core_sniffer */
|
|
fetch_core_registers, /* core_read_registers */
|
|
NULL /* next */
|
|
};
|
|
|
|
void
|
|
_initialize_core_irix5 (void)
|
|
{
|
|
deprecated_add_core_fns (&irix5_core_fns);
|
|
}
|