Delia Burduv 1820262bc9 Modify the ARNM assembler to accept the omission of the immediate argument for the writeback form of the LDRAA and LDRAB mnemonics
This is a shorthand for the immediate argument being 0, as described here:
  https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/ldraa-ldrab-load-register-with-pointer-authentication

This is because the instructions still have a use with an immediate
argument of 0, unlike loads without the PAC functionality. Currently,
the mnemonics are

  LDRAA Xt, [Xn, #<simm10>]!
  LDRAB Xt, [Xn, #<simm10>]!

After this patch they become

  LDRAA Xt, [Xn {, #<simm10>}]!
  LDRAB Xt, [Xn {, #<simm10>}]!

gas	* config/tc-aarch64.c (parse_address_main): Accept the omission of
	the immediate argument for ldraa and ldrab as a shorthand for the
	immediate being 0.
	* testsuite/gas/aarch64/ldraa-ldrab-no-offset.d: New test.
	* testsuite/gas/aarch64/ldraa-ldrab-no-offset.s: New test.
	* testsuite/gas/aarch64/illegal-ldraa.s: Modified to accept the
	writeback form with no offset.
	* testsuite/gas/aarch64/illegal-ldraa.s: Removed missing offset
	error.

opcodes	* aarch64-opc.c (print_immediate_offset_address): Don't print the
	immediate for the writeback form of ldraa/ldrab if it is 0.
	* aarch64-tbl.h: Updated the documentation for ADDR_SIMM10.
	* aarch64-opc-2.c: Regenerated.
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