154 lines
4.5 KiB
C
154 lines
4.5 KiB
C
/* Target-dependent code for OpenBSD/powerpc.
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Copyright 2004 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "osabi.h"
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#include "regcache.h"
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#include "regset.h"
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#include "gdb_string.h"
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#include "ppc-tdep.h"
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#include "ppcobsd-tdep.h"
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#include "solib-svr4.h"
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/* Register offsets from <machine/reg.h>. */
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struct ppc_reg_offsets ppcobsd_reg_offsets;
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/* Core file support. */
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/* Supply register REGNUM in the general-purpose register set REGSET
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from the buffer specified by GREGS and LEN to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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void
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ppcobsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len)
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{
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ppc_supply_gregset (regset, regcache, regnum, gregs, len);
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ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* Collect register REGNUM in the general-purpose register set
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REGSET. from register cache REGCACHE into the buffer specified by
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GREGS and LEN. If REGNUM is -1, do this for all registers in
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REGSET. */
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void
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ppcobsd_collect_gregset (const struct regset *regset,
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const struct regcache *regcache, int regnum,
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void *gregs, size_t len)
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{
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ppc_collect_gregset (regset, regcache, regnum, gregs, len);
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ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* OpenBS/powerpc register set. */
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struct regset ppcobsd_gregset =
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{
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&ppcobsd_reg_offsets,
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ppcobsd_supply_gregset
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};
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/* Return the appropriate register set for the core section identified
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by SECT_NAME and SECT_SIZE. */
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static const struct regset *
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ppcobsd_regset_from_core_section (struct gdbarch *gdbarch,
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const char *sect_name, size_t sect_size)
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{
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if (strcmp (sect_name, ".reg") == 0 && sect_size >= 412)
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return &ppcobsd_gregset;
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return NULL;
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}
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static void
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ppcobsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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/* OpenBSD uses SVR4-style shared libraries. */
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set_gdbarch_in_solib_call_trampoline
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(gdbarch, generic_in_solib_call_trampoline);
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_ilp32_fetch_link_map_offsets);
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set_gdbarch_regset_from_core_section
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(gdbarch, ppcobsd_regset_from_core_section);
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}
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/* OpenBSD uses uses the traditional NetBSD core file format, even for
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ports that use ELF. */
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#define GDB_OSABI_NETBSD_CORE GDB_OSABI_OPENBSD_ELF
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static enum gdb_osabi
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ppcobsd_core_osabi_sniffer (bfd *abfd)
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{
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if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
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return GDB_OSABI_NETBSD_CORE;
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return GDB_OSABI_UNKNOWN;
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}
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/* Provide a prototype to silence -Wmissing-prototypes. */
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void _initialize_ppcobsd_tdep (void);
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void
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_initialize_ppcobsd_tdep (void)
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{
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/* BFD doesn't set a flavour for NetBSD style a.out core files. */
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gdbarch_register_osabi_sniffer (bfd_arch_powerpc, bfd_target_unknown_flavour,
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ppcobsd_core_osabi_sniffer);
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gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_OPENBSD_ELF,
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ppcobsd_init_abi);
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/* Avoid initializing the register offsets again if they were
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already initailized by ppcobsd-nat.c. */
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if (ppcobsd_reg_offsets.pc_offset == 0)
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{
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/* General-purpose registers. */
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ppcobsd_reg_offsets.r0_offset = 0;
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ppcobsd_reg_offsets.pc_offset = 384;
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ppcobsd_reg_offsets.ps_offset = 388;
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ppcobsd_reg_offsets.cr_offset = 392;
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ppcobsd_reg_offsets.lr_offset = 396;
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ppcobsd_reg_offsets.ctr_offset = 400;
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ppcobsd_reg_offsets.xer_offset = 404;
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ppcobsd_reg_offsets.mq_offset = 408;
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/* Floating-point registers. */
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ppcobsd_reg_offsets.f0_offset = 128;
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ppcobsd_reg_offsets.fpscr_offset = -1;
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/* AltiVec registers. */
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ppcobsd_reg_offsets.vr0_offset = 0;
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ppcobsd_reg_offsets.vscr_offset = 512;
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ppcobsd_reg_offsets.vrsave_offset = 520;
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}
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}
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