8a9036a406
2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
536 lines
11 KiB
C
536 lines
11 KiB
C
/* Select disassembly routine for specified architecture.
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Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005, 2006, 2007 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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#ifdef ARCH_all
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#define ARCH_alpha
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#define ARCH_arc
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#define ARCH_arm
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#define ARCH_avr
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#define ARCH_bfin
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#define ARCH_cr16
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#define ARCH_cris
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#define ARCH_crx
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#define ARCH_d10v
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#define ARCH_d30v
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#define ARCH_dlx
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#define ARCH_fr30
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#define ARCH_frv
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#define ARCH_h8300
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#define ARCH_h8500
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#define ARCH_hppa
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#define ARCH_i370
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#define ARCH_i386
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#define ARCH_i860
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#define ARCH_i960
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#define ARCH_ia64
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#define ARCH_ip2k
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#define ARCH_iq2000
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#define ARCH_lm32
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#define ARCH_m32c
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#define ARCH_m32r
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#define ARCH_m68hc11
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#define ARCH_m68hc12
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#define ARCH_m68k
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#define ARCH_m88k
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#define ARCH_maxq
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#define ARCH_mcore
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#define ARCH_mep
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#define ARCH_mips
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#define ARCH_mmix
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#define ARCH_mn10200
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#define ARCH_mn10300
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#define ARCH_moxie
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#define ARCH_mt
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#define ARCH_msp430
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#define ARCH_ns32k
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#define ARCH_openrisc
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#define ARCH_or32
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#define ARCH_pdp11
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#define ARCH_pj
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#define ARCH_powerpc
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#define ARCH_rs6000
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#define ARCH_s390
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#define ARCH_score
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#define ARCH_sh
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#define ARCH_sparc
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#define ARCH_spu
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#define ARCH_tic30
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#define ARCH_tic4x
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#define ARCH_tic54x
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#define ARCH_tic80
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#define ARCH_v850
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#define ARCH_vax
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#define ARCH_w65
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#define ARCH_xstormy16
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#define ARCH_xc16x
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#define ARCH_xtensa
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#define ARCH_z80
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#define ARCH_z8k
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#define INCLUDE_SHMEDIA
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#endif
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#ifdef ARCH_m32c
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#include "m32c-desc.h"
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#endif
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disassembler_ftype
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disassembler (abfd)
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bfd *abfd;
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{
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enum bfd_architecture a = bfd_get_arch (abfd);
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disassembler_ftype disassemble;
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switch (a)
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{
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/* If you add a case to this table, also add it to the
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ARCH_all definition right above this function. */
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#ifdef ARCH_alpha
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case bfd_arch_alpha:
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disassemble = print_insn_alpha;
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break;
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#endif
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#ifdef ARCH_arc
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case bfd_arch_arc:
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{
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disassemble = arc_get_disassembler (abfd);
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break;
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}
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#endif
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#ifdef ARCH_arm
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case bfd_arch_arm:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_arm;
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else
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disassemble = print_insn_little_arm;
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break;
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#endif
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#ifdef ARCH_avr
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case bfd_arch_avr:
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disassemble = print_insn_avr;
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break;
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#endif
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#ifdef ARCH_bfin
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case bfd_arch_bfin:
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disassemble = print_insn_bfin;
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break;
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#endif
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#ifdef ARCH_cr16
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case bfd_arch_cr16:
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disassemble = print_insn_cr16;
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break;
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#endif
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#ifdef ARCH_cris
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case bfd_arch_cris:
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disassemble = cris_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_crx
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case bfd_arch_crx:
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disassemble = print_insn_crx;
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break;
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#endif
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#ifdef ARCH_d10v
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case bfd_arch_d10v:
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disassemble = print_insn_d10v;
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break;
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#endif
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#ifdef ARCH_d30v
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case bfd_arch_d30v:
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disassemble = print_insn_d30v;
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break;
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#endif
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#ifdef ARCH_dlx
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case bfd_arch_dlx:
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/* As far as I know we only handle big-endian DLX objects. */
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disassemble = print_insn_dlx;
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break;
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#endif
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#ifdef ARCH_h8300
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case bfd_arch_h8300:
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if (bfd_get_mach (abfd) == bfd_mach_h8300h
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|| bfd_get_mach (abfd) == bfd_mach_h8300hn)
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disassemble = print_insn_h8300h;
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else if (bfd_get_mach (abfd) == bfd_mach_h8300s
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|| bfd_get_mach (abfd) == bfd_mach_h8300sn
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|| bfd_get_mach (abfd) == bfd_mach_h8300sx
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|| bfd_get_mach (abfd) == bfd_mach_h8300sxn)
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disassemble = print_insn_h8300s;
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else
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disassemble = print_insn_h8300;
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break;
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#endif
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#ifdef ARCH_h8500
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case bfd_arch_h8500:
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disassemble = print_insn_h8500;
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break;
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#endif
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#ifdef ARCH_hppa
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case bfd_arch_hppa:
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disassemble = print_insn_hppa;
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break;
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#endif
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#ifdef ARCH_i370
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case bfd_arch_i370:
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disassemble = print_insn_i370;
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break;
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#endif
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#ifdef ARCH_i386
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case bfd_arch_i386:
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case bfd_arch_l1om:
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disassemble = print_insn_i386;
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break;
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#endif
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#ifdef ARCH_i860
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case bfd_arch_i860:
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disassemble = print_insn_i860;
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break;
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#endif
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#ifdef ARCH_i960
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case bfd_arch_i960:
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disassemble = print_insn_i960;
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break;
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#endif
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#ifdef ARCH_ia64
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case bfd_arch_ia64:
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disassemble = print_insn_ia64;
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break;
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#endif
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#ifdef ARCH_ip2k
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case bfd_arch_ip2k:
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disassemble = print_insn_ip2k;
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break;
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#endif
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#ifdef ARCH_fr30
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case bfd_arch_fr30:
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disassemble = print_insn_fr30;
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break;
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#endif
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#ifdef ARCH_lm32
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case bfd_arch_lm32:
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disassemble = print_insn_lm32;
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break;
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#endif
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#ifdef ARCH_m32r
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case bfd_arch_m32r:
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disassemble = print_insn_m32r;
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break;
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#endif
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#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
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case bfd_arch_m68hc11:
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disassemble = print_insn_m68hc11;
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break;
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case bfd_arch_m68hc12:
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disassemble = print_insn_m68hc12;
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break;
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#endif
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#ifdef ARCH_m68k
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case bfd_arch_m68k:
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disassemble = print_insn_m68k;
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break;
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#endif
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#ifdef ARCH_m88k
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case bfd_arch_m88k:
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disassemble = print_insn_m88k;
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break;
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#endif
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#ifdef ARCH_maxq
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case bfd_arch_maxq:
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disassemble = print_insn_maxq_little;
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break;
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#endif
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#ifdef ARCH_mt
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case bfd_arch_mt:
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disassemble = print_insn_mt;
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break;
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#endif
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#ifdef ARCH_msp430
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case bfd_arch_msp430:
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disassemble = print_insn_msp430;
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break;
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#endif
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#ifdef ARCH_ns32k
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case bfd_arch_ns32k:
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disassemble = print_insn_ns32k;
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break;
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#endif
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#ifdef ARCH_mcore
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case bfd_arch_mcore:
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disassemble = print_insn_mcore;
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break;
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#endif
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#ifdef ARCH_mep
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case bfd_arch_mep:
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disassemble = print_insn_mep;
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break;
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#endif
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#ifdef ARCH_mips
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case bfd_arch_mips:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_mips;
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else
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disassemble = print_insn_little_mips;
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break;
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#endif
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#ifdef ARCH_mmix
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case bfd_arch_mmix:
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disassemble = print_insn_mmix;
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break;
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#endif
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#ifdef ARCH_mn10200
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case bfd_arch_mn10200:
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disassemble = print_insn_mn10200;
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break;
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#endif
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#ifdef ARCH_mn10300
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case bfd_arch_mn10300:
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disassemble = print_insn_mn10300;
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break;
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#endif
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#ifdef ARCH_openrisc
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case bfd_arch_openrisc:
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disassemble = print_insn_openrisc;
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break;
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#endif
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#ifdef ARCH_or32
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case bfd_arch_or32:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_or32;
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else
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disassemble = print_insn_little_or32;
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break;
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#endif
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#ifdef ARCH_pdp11
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case bfd_arch_pdp11:
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disassemble = print_insn_pdp11;
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break;
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#endif
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#ifdef ARCH_pj
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case bfd_arch_pj:
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disassemble = print_insn_pj;
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break;
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#endif
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#ifdef ARCH_powerpc
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case bfd_arch_powerpc:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_powerpc;
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else
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disassemble = print_insn_little_powerpc;
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break;
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#endif
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#ifdef ARCH_rs6000
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case bfd_arch_rs6000:
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if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
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disassemble = print_insn_big_powerpc;
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else
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disassemble = print_insn_rs6000;
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break;
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#endif
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#ifdef ARCH_s390
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case bfd_arch_s390:
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disassemble = print_insn_s390;
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break;
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#endif
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#ifdef ARCH_score
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case bfd_arch_score:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_score;
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else
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disassemble = print_insn_little_score;
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break;
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#endif
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#ifdef ARCH_sh
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case bfd_arch_sh:
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disassemble = print_insn_sh;
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break;
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#endif
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#ifdef ARCH_sparc
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case bfd_arch_sparc:
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disassemble = print_insn_sparc;
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break;
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#endif
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#ifdef ARCH_spu
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case bfd_arch_spu:
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disassemble = print_insn_spu;
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break;
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#endif
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#ifdef ARCH_tic30
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case bfd_arch_tic30:
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disassemble = print_insn_tic30;
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break;
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#endif
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#ifdef ARCH_tic4x
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case bfd_arch_tic4x:
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disassemble = print_insn_tic4x;
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break;
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#endif
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#ifdef ARCH_tic54x
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case bfd_arch_tic54x:
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disassemble = print_insn_tic54x;
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break;
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#endif
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#ifdef ARCH_tic80
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case bfd_arch_tic80:
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disassemble = print_insn_tic80;
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break;
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#endif
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#ifdef ARCH_v850
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case bfd_arch_v850:
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disassemble = print_insn_v850;
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break;
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#endif
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#ifdef ARCH_w65
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case bfd_arch_w65:
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disassemble = print_insn_w65;
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break;
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#endif
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#ifdef ARCH_xstormy16
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case bfd_arch_xstormy16:
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disassemble = print_insn_xstormy16;
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break;
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#endif
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#ifdef ARCH_xc16x
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case bfd_arch_xc16x:
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disassemble = print_insn_xc16x;
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break;
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#endif
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#ifdef ARCH_xtensa
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case bfd_arch_xtensa:
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disassemble = print_insn_xtensa;
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break;
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#endif
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#ifdef ARCH_z80
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case bfd_arch_z80:
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disassemble = print_insn_z80;
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break;
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#endif
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#ifdef ARCH_z8k
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case bfd_arch_z8k:
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if (bfd_get_mach(abfd) == bfd_mach_z8001)
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disassemble = print_insn_z8001;
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else
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disassemble = print_insn_z8002;
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break;
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#endif
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#ifdef ARCH_vax
|
|
case bfd_arch_vax:
|
|
disassemble = print_insn_vax;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_frv
|
|
case bfd_arch_frv:
|
|
disassemble = print_insn_frv;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_moxie
|
|
case bfd_arch_moxie:
|
|
disassemble = print_insn_moxie;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_iq2000
|
|
case bfd_arch_iq2000:
|
|
disassemble = print_insn_iq2000;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_m32c
|
|
case bfd_arch_m32c:
|
|
disassemble = print_insn_m32c;
|
|
break;
|
|
#endif
|
|
default:
|
|
return 0;
|
|
}
|
|
return disassemble;
|
|
}
|
|
|
|
void
|
|
disassembler_usage (stream)
|
|
FILE * stream ATTRIBUTE_UNUSED;
|
|
{
|
|
#ifdef ARCH_arm
|
|
print_arm_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_mips
|
|
print_mips_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_powerpc
|
|
print_ppc_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_i386
|
|
print_i386_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_s390
|
|
print_s390_disassembler_options (stream);
|
|
#endif
|
|
|
|
return;
|
|
}
|
|
|
|
void
|
|
disassemble_init_for_target (struct disassemble_info * info)
|
|
{
|
|
if (info == NULL)
|
|
return;
|
|
|
|
switch (info->arch)
|
|
{
|
|
#ifdef ARCH_arm
|
|
case bfd_arch_arm:
|
|
info->symbol_is_valid = arm_symbol_is_valid;
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_ia64
|
|
case bfd_arch_ia64:
|
|
info->skip_zeroes = 16;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic4x
|
|
case bfd_arch_tic4x:
|
|
info->skip_zeroes = 32;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mep
|
|
case bfd_arch_mep:
|
|
info->skip_zeroes = 256;
|
|
info->skip_zeroes_at_end = 0;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_m32c
|
|
case bfd_arch_m32c:
|
|
info->endian = BFD_ENDIAN_BIG;
|
|
if (! info->insn_sets)
|
|
{
|
|
info->insn_sets = cgen_bitset_create (ISA_MAX);
|
|
if (info->mach == bfd_mach_m16c)
|
|
cgen_bitset_set (info->insn_sets, ISA_M16C);
|
|
else
|
|
cgen_bitset_set (info->insn_sets, ISA_M32C);
|
|
}
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
}
|