1002 lines
29 KiB
C
1002 lines
29 KiB
C
/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
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Copyright 2001
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Free Software Foundation, Inc.
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Contributed by Jiri Smid, SuSE Labs.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "gdbcmd.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "symfile.h"
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#include "x86-64-tdep.h"
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#include "dwarf2cfi.h"
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#include "value.h"
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/* Register numbers of various important registers. */
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#define RAX_REGNUM 0
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#define RDX_REGNUM 1
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#define RDI_REGNUM 5
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#define EFLAGS_REGNUM 17
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#define XMM1_REGNUM 35
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/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
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GDB's register array occupied by register i. */
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int x86_64_register_raw_size_table[X86_64_NUM_REGS] = {
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8, 8, 8, 8,
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8, 8, 8, 8,
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8, 8, 8, 8,
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8, 8, 8, 8,
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8, 4,
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10, 10, 10, 10,
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10, 10, 10, 10,
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4, 4, 4, 4,
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4, 4, 4, 4,
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16, 16, 16, 16,
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16, 16, 16, 16,
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16, 16, 16, 16,
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16, 16, 16, 16,
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4
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};
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/* Number of bytes of storage in the actual machine representation for
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register REGNO. */
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int
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x86_64_register_raw_size (int regno)
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{
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return x86_64_register_raw_size_table[regno];
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}
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/* x86_64_register_byte_table[i] is the offset into the register file of the
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start of register number i. We initialize this from
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x86_64_register_raw_size_table. */
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int x86_64_register_byte_table[X86_64_NUM_REGS];
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/* Index within `registers' of the first byte of the space for register REGNO. */
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int
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x86_64_register_byte (int regno)
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{
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return x86_64_register_byte_table[regno];
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}
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/* Return the GDB type object for the "standard" data type of data in
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register N. */
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static struct type *
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x86_64_register_virtual_type (int regno)
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{
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if (regno == PC_REGNUM || regno == SP_REGNUM)
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return lookup_pointer_type (builtin_type_void);
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if (IS_FP_REGNUM (regno))
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return builtin_type_long_double;
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if (IS_SSE_REGNUM (regno))
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return builtin_type_v4sf;
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if (IS_FPU_CTRL_REGNUM (regno) || regno == MXCSR_REGNUM
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|| regno == EFLAGS_REGNUM)
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return builtin_type_int;
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return builtin_type_long;
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}
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/* x86_64_register_convertible is true if register N's virtual format is
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different from its raw format. Note that this definition assumes
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that the host supports IEEE 32-bit floats, since it doesn't say
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that SSE registers need conversion. Even if we can't find a
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counterexample, this is still sloppy. */
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int
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x86_64_register_convertible (int regno)
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{
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return IS_FP_REGNUM (regno);
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}
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/* Convert data from raw format for register REGNUM in buffer FROM to
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virtual format with type TYPE in buffer TO. In principle both
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formats are identical except that the virtual format has two extra
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bytes appended that aren't used. We set these to zero. */
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void
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x86_64_register_convert_to_virtual (int regnum, struct type *type,
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char *from, char *to)
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{
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/* Copy straight over, but take care of the padding. */
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memcpy (to, from, FPU_REG_RAW_SIZE);
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memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
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}
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/* Convert data from virtual format with type TYPE in buffer FROM to
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raw format for register REGNUM in buffer TO. Simply omit the two
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unused bytes. */
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void
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x86_64_register_convert_to_raw (struct type *type, int regnum,
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char *from, char *to)
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{
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memcpy (to, from, FPU_REG_RAW_SIZE);
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}
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/* This is the variable that is set with "set disassembly-flavour", and
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its legitimate values. */
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static const char att_flavour[] = "att";
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static const char intel_flavour[] = "intel";
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static const char *valid_flavours[] = {
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att_flavour,
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intel_flavour,
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NULL
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};
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static const char *disassembly_flavour = att_flavour;
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static CORE_ADDR
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x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
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{
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char buf[8];
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store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
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write_memory (sp - 8, buf, 8);
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return sp - 8;
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}
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void
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x86_64_pop_frame (void)
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{
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generic_pop_current_frame (cfi_pop_frame);
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}
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/* The returning of values is done according to the special algorithm.
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Some types are returned in registers an some (big structures) in memory.
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See ABI for details.
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*/
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#define MAX_CLASSES 4
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enum x86_64_reg_class
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{
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X86_64_NO_CLASS,
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X86_64_INTEGER_CLASS,
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X86_64_INTEGERSI_CLASS,
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X86_64_SSE_CLASS,
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X86_64_SSESF_CLASS,
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X86_64_SSEDF_CLASS,
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X86_64_SSEUP_CLASS,
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X86_64_X87_CLASS,
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X86_64_X87UP_CLASS,
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X86_64_MEMORY_CLASS
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};
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/* Return the union class of CLASS1 and CLASS2.
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See the x86-64 ABI for details. */
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static enum x86_64_reg_class
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merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
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{
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/* Rule #1: If both classes are equal, this is the resulting class. */
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if (class1 == class2)
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return class1;
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/* Rule #2: If one of the classes is NO_CLASS, the resulting class is
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the other class. */
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if (class1 == X86_64_NO_CLASS)
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return class2;
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if (class2 == X86_64_NO_CLASS)
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return class1;
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/* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
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if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
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return X86_64_MEMORY_CLASS;
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/* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
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if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
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|| (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
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return X86_64_INTEGERSI_CLASS;
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if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
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|| class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
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return X86_64_INTEGER_CLASS;
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/* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
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if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
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|| class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
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return X86_64_MEMORY_CLASS;
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/* Rule #6: Otherwise class SSE is used. */
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return X86_64_SSE_CLASS;
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}
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/* Classify the argument type.
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CLASSES will be filled by the register class used to pass each word
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of the operand. The number of words is returned. In case the parameter
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should be passed in memory, 0 is returned. As a special case for zero
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sized containers, classes[0] will be NO_CLASS and 1 is returned.
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See the x86-64 PS ABI for details.
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*/
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static int
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classify_argument (struct type *type,
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enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
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{
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int bytes = TYPE_LENGTH (type);
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int words = (bytes + 8 - 1) / 8;
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switch (TYPE_CODE (type))
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{
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case TYPE_CODE_ARRAY:
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case TYPE_CODE_STRUCT:
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case TYPE_CODE_UNION:
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{
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int i;
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enum x86_64_reg_class subclasses[MAX_CLASSES];
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/* On x86-64 we pass structures larger than 16 bytes on the stack. */
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if (bytes > 16)
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return 0;
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for (i = 0; i < words; i++)
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classes[i] = X86_64_NO_CLASS;
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/* Zero sized arrays or structures are NO_CLASS. We return 0 to
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signalize memory class, so handle it as special case. */
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if (!words)
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{
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classes[0] = X86_64_NO_CLASS;
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return 1;
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}
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switch (TYPE_CODE (type))
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{
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case TYPE_CODE_STRUCT:
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{
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int j;
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for (j = 0; j < type->nfields; ++j)
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{
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int num = classify_argument (type->fields[j].type,
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subclasses,
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(type->fields[j].loc.bitpos
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+ bit_offset) % 256);
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if (!num)
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return 0;
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for (i = 0; i < num; i++)
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{
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int pos =
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(type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
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classes[i + pos] =
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merge_classes (subclasses[i], classes[i + pos]);
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}
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}
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}
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break;
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case TYPE_CODE_ARRAY:
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{
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int num;
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num = classify_argument (type->target_type,
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subclasses, bit_offset);
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if (!num)
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return 0;
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/* The partial classes are now full classes. */
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if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
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subclasses[0] = X86_64_SSE_CLASS;
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if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
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subclasses[0] = X86_64_INTEGER_CLASS;
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for (i = 0; i < words; i++)
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classes[i] = subclasses[i % num];
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}
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break;
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case TYPE_CODE_UNION:
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{
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int j;
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{
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for (j = 0; j < type->nfields; ++j)
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{
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int num;
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num = classify_argument (type->fields[j].type,
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subclasses, bit_offset);
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if (!num)
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return 0;
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for (i = 0; i < num; i++)
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classes[i] = merge_classes (subclasses[i], classes[i]);
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}
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}
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}
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break;
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}
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/* Final merger cleanup. */
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for (i = 0; i < words; i++)
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{
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/* If one class is MEMORY, everything should be passed in
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memory. */
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if (classes[i] == X86_64_MEMORY_CLASS)
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return 0;
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/* The X86_64_SSEUP_CLASS should be always preceeded by
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X86_64_SSE_CLASS. */
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if (classes[i] == X86_64_SSEUP_CLASS
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&& (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
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classes[i] = X86_64_SSE_CLASS;
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/* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
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if (classes[i] == X86_64_X87UP_CLASS
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&& (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
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classes[i] = X86_64_SSE_CLASS;
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}
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return words;
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}
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break;
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case TYPE_CODE_FLT:
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switch (bytes)
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{
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case 4:
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if (!(bit_offset % 64))
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classes[0] = X86_64_SSESF_CLASS;
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else
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classes[0] = X86_64_SSE_CLASS;
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return 1;
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case 8:
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classes[0] = X86_64_SSEDF_CLASS;
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return 1;
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case 16:
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classes[0] = X86_64_X87_CLASS;
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classes[1] = X86_64_X87UP_CLASS;
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return 2;
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}
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break;
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case TYPE_CODE_INT:
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case TYPE_CODE_PTR:
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switch (bytes)
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{
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case 1:
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case 2:
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case 4:
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case 8:
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if (bytes * 8 + bit_offset <= 32)
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classes[0] = X86_64_INTEGERSI_CLASS;
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else
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classes[0] = X86_64_INTEGER_CLASS;
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return 1;
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case 16:
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classes[0] = classes[1] = X86_64_INTEGER_CLASS;
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return 2;
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default:
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break;
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}
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case TYPE_CODE_VOID:
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return 0;
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}
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internal_error (__FILE__, __LINE__, "classify_argument: unknown argument type");
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}
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/* Examine the argument and return set number of register required in each
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class. Return 0 ifif parameter should be passed in memory. */
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static int
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examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
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int n, int *int_nregs, int *sse_nregs)
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{
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*int_nregs = 0;
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*sse_nregs = 0;
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if (!n)
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return 0;
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for (n--; n >= 0; n--)
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switch (classes[n])
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{
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case X86_64_INTEGER_CLASS:
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case X86_64_INTEGERSI_CLASS:
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(*int_nregs)++;
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break;
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case X86_64_SSE_CLASS:
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case X86_64_SSESF_CLASS:
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case X86_64_SSEDF_CLASS:
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(*sse_nregs)++;
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break;
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case X86_64_NO_CLASS:
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case X86_64_SSEUP_CLASS:
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case X86_64_X87_CLASS:
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case X86_64_X87UP_CLASS:
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break;
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case X86_64_MEMORY_CLASS:
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internal_error (__FILE__, __LINE__, "examine_argument: unexpected memory class");
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}
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return 1;
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}
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#define RET_INT_REGS 2
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#define RET_SSE_REGS 2
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/* Check if the structure in value_type is returned in registers or in
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memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
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EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
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will be used. */
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int
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x86_64_use_struct_convention (int gcc_p, struct type *value_type)
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{
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enum x86_64_reg_class class[MAX_CLASSES];
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int n = classify_argument (value_type, class, 0);
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int needed_intregs;
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int needed_sseregs;
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return (!n ||
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!examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
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needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
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}
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/* Extract from an array REGBUF containing the (raw) register state, a
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function return value of TYPE, and copy that, in virtual format,
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into VALBUF. */
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void
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x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
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{
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enum x86_64_reg_class class[MAX_CLASSES];
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int n = classify_argument (type, class, 0);
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int needed_intregs;
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int needed_sseregs;
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int intreg = 0;
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int ssereg = 0;
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int offset = 0;
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int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
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int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
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if (!n ||
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!examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
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needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
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{ /* memory class */
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CORE_ADDR addr;
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memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
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read_memory (addr, valbuf, TYPE_LENGTH (type));
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return;
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}
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else
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{
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int i;
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for (i = 0; i < n; i++)
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{
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switch (class[i])
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{
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case X86_64_NO_CLASS:
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break;
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case X86_64_INTEGER_CLASS:
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memcpy (valbuf + offset,
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regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
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8);
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offset += 8;
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intreg += 2;
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break;
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case X86_64_INTEGERSI_CLASS:
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memcpy (valbuf + offset,
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regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
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offset += 8;
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intreg++;
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break;
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case X86_64_SSEDF_CLASS:
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case X86_64_SSESF_CLASS:
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case X86_64_SSE_CLASS:
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memcpy (valbuf + offset,
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regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
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8);
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offset += 8;
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ssereg += 2;
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break;
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case X86_64_SSEUP_CLASS:
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memcpy (valbuf + offset + 8,
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regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
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offset += 8;
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ssereg++;
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break;
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case X86_64_X87_CLASS:
|
||
memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
|
||
8);
|
||
offset += 8;
|
||
break;
|
||
case X86_64_X87UP_CLASS:
|
||
memcpy (valbuf + offset,
|
||
regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
|
||
offset += 8;
|
||
break;
|
||
case X86_64_MEMORY_CLASS:
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"Unexpected argument class");
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Handled by unwind informations. */
|
||
static void
|
||
x86_64_frame_init_saved_regs (struct frame_info *fi)
|
||
{
|
||
}
|
||
|
||
#define INT_REGS 6
|
||
#define SSE_REGS 16
|
||
|
||
/* Push onto the stack the specified value VALUE. Pad it correctly for
|
||
it to be an argument to a function. */
|
||
|
||
static CORE_ADDR
|
||
value_push (register CORE_ADDR sp, struct value *arg)
|
||
{
|
||
register int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
|
||
register int container_len = len;
|
||
|
||
/* How big is the container we're going to put this value in? */
|
||
if (PARM_BOUNDARY)
|
||
container_len = ((len + PARM_BOUNDARY / TARGET_CHAR_BIT - 1)
|
||
& ~(PARM_BOUNDARY / TARGET_CHAR_BIT - 1));
|
||
|
||
sp -= container_len;
|
||
write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
|
||
|
||
return sp;
|
||
}
|
||
|
||
CORE_ADDR
|
||
x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
|
||
int struct_return, CORE_ADDR struct_addr)
|
||
{
|
||
int intreg = 0;
|
||
int ssereg = 0;
|
||
int i;
|
||
static int int_parameter_registers[INT_REGS] = {5 /*RDI*/, 4 /*RSI*/,
|
||
1 /*RDX*/, 2 /*RCX*/,
|
||
8 /*R8 */, 9 /*R9 */};
|
||
/* XMM0 - XMM15 */
|
||
static int sse_parameter_registers[SSE_REGS] = {34, 35, 36, 37,
|
||
38, 39, 40, 41,
|
||
42, 43, 44, 45,
|
||
46, 47, 48, 49};
|
||
for (i = 0; i < nargs; i++)
|
||
{
|
||
enum x86_64_reg_class class[MAX_CLASSES];
|
||
int n = classify_argument (args[i]->type, class, 0);
|
||
int needed_intregs;
|
||
int needed_sseregs;
|
||
|
||
if (!n ||
|
||
!examine_argument (class, n, &needed_intregs, &needed_sseregs)
|
||
|| intreg + needed_intregs > INT_REGS
|
||
|| ssereg + needed_sseregs > SSE_REGS)
|
||
{ /* memory class */
|
||
sp = value_push (sp, args[i]);
|
||
}
|
||
else
|
||
{
|
||
int j;
|
||
for (j = 0; j < n; j++)
|
||
{
|
||
int offset = 0;
|
||
switch (class[j])
|
||
{
|
||
case X86_64_NO_CLASS:
|
||
break;
|
||
case X86_64_INTEGER_CLASS:
|
||
write_register_gen (int_parameter_registers[(intreg + 1) / 2],
|
||
VALUE_CONTENTS_ALL (args[i]) + offset);
|
||
offset += 8;
|
||
intreg += 2;
|
||
break;
|
||
case X86_64_INTEGERSI_CLASS:
|
||
write_register_gen (int_parameter_registers[intreg / 2],
|
||
VALUE_CONTENTS_ALL (args[i]) + offset);
|
||
offset += 8;
|
||
intreg++;
|
||
break;
|
||
case X86_64_SSEDF_CLASS:
|
||
case X86_64_SSESF_CLASS:
|
||
case X86_64_SSE_CLASS:
|
||
write_register_gen (sse_parameter_registers[(ssereg + 1) / 2],
|
||
VALUE_CONTENTS_ALL (args[i]) + offset);
|
||
offset += 8;
|
||
ssereg += 2;
|
||
break;
|
||
case X86_64_SSEUP_CLASS:
|
||
write_register_gen (sse_parameter_registers[ssereg / 2],
|
||
VALUE_CONTENTS_ALL (args[i]) + offset);
|
||
offset += 8;
|
||
ssereg++;
|
||
break;
|
||
case X86_64_X87_CLASS:
|
||
case X86_64_X87UP_CLASS:
|
||
case X86_64_MEMORY_CLASS:
|
||
sp = value_push (sp, args[i]);
|
||
break;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"Unexpected argument class");
|
||
}
|
||
intreg += intreg % 2;
|
||
ssereg += ssereg % 2;
|
||
}
|
||
}
|
||
}
|
||
return sp;
|
||
}
|
||
|
||
/* Write into the appropriate registers a function return value stored
|
||
in VALBUF of type TYPE, given in virtual format. */
|
||
void
|
||
x86_64_store_return_value (struct type *type, char *valbuf)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
|
||
if (TYPE_CODE_FLT == TYPE_CODE (type))
|
||
{
|
||
/* Floating-point return values can be found in %st(0). */
|
||
if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
|
||
&& TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
|
||
{
|
||
/* Copy straight over. */
|
||
write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
|
||
FPU_REG_RAW_SIZE);
|
||
}
|
||
else
|
||
{
|
||
char buf[FPU_REG_RAW_SIZE];
|
||
DOUBLEST val;
|
||
|
||
/* Convert the value found in VALBUF to the extended
|
||
floating point format used by the FPU. This is probably
|
||
not exactly how it would happen on the target itself, but
|
||
it is the best we can do. */
|
||
val = extract_floating (valbuf, TYPE_LENGTH (type));
|
||
floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
|
||
write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
|
||
FPU_REG_RAW_SIZE);
|
||
}
|
||
}
|
||
else
|
||
{
|
||
int low_size = REGISTER_RAW_SIZE (0);
|
||
int high_size = REGISTER_RAW_SIZE (1);
|
||
|
||
if (len <= low_size)
|
||
write_register_bytes (REGISTER_BYTE (0), valbuf, len);
|
||
else if (len <= (low_size + high_size))
|
||
{
|
||
write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
|
||
write_register_bytes (REGISTER_BYTE (1),
|
||
valbuf + low_size, len - low_size);
|
||
}
|
||
else
|
||
internal_error (__FILE__, __LINE__,
|
||
"Cannot store return value of %d bytes long.", len);
|
||
}
|
||
}
|
||
|
||
|
||
static char *
|
||
x86_64_register_name (int reg_nr)
|
||
{
|
||
static char *register_names[] = {
|
||
"rax", "rdx", "rcx", "rbx",
|
||
"rsi", "rdi", "rbp", "rsp",
|
||
"r8", "r9", "r10", "r11",
|
||
"r12", "r13", "r14", "r15",
|
||
"rip", "eflags",
|
||
"st0", "st1", "st2", "st3",
|
||
"st4", "st5", "st6", "st7",
|
||
"fctrl", "fstat", "ftag", "fiseg",
|
||
"fioff", "foseg", "fooff", "fop",
|
||
"xmm0", "xmm1", "xmm2", "xmm3",
|
||
"xmm4", "xmm5", "xmm6", "xmm7",
|
||
"xmm8", "xmm9", "xmm10", "xmm11",
|
||
"xmm12", "xmm13", "xmm14", "xmm15",
|
||
"mxcsr"
|
||
};
|
||
if (reg_nr < 0)
|
||
return NULL;
|
||
if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
|
||
return NULL;
|
||
return register_names[reg_nr];
|
||
}
|
||
|
||
|
||
|
||
/* We have two flavours of disassembly. The machinery on this page
|
||
deals with switching between those. */
|
||
|
||
static int
|
||
gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
|
||
{
|
||
if (disassembly_flavour == att_flavour)
|
||
return print_insn_i386_att (memaddr, info);
|
||
else if (disassembly_flavour == intel_flavour)
|
||
return print_insn_i386_intel (memaddr, info);
|
||
/* Never reached -- disassembly_flavour is always either att_flavour
|
||
or intel_flavour. */
|
||
internal_error (__FILE__, __LINE__, "failed internal consistency check");
|
||
}
|
||
|
||
|
||
/* Store the address of the place in which to copy the structure the
|
||
subroutine will return. This is called from call_function. */
|
||
void
|
||
x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
||
{
|
||
write_register (RDI_REGNUM, addr);
|
||
}
|
||
|
||
int
|
||
x86_64_frameless_function_invocation (struct frame_info *frame)
|
||
{
|
||
return 0;
|
||
}
|
||
|
||
/* On x86_64 there are no reasonable prologs. */
|
||
CORE_ADDR
|
||
x86_64_skip_prologue (CORE_ADDR pc)
|
||
{
|
||
return pc;
|
||
}
|
||
|
||
/* Sequence of bytes for breakpoint instruction. */
|
||
static unsigned char *
|
||
x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr)
|
||
{
|
||
static unsigned char breakpoint[] = { 0xcc };
|
||
*lenptr = 1;
|
||
return breakpoint;
|
||
}
|
||
|
||
static struct gdbarch *
|
||
i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||
{
|
||
struct gdbarch *gdbarch;
|
||
struct gdbarch_tdep *tdep;
|
||
|
||
/* Find a candidate among the list of pre-declared architectures. */
|
||
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
||
arches != NULL;
|
||
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
||
{
|
||
switch (info.bfd_arch_info->mach)
|
||
{
|
||
case bfd_mach_x86_64:
|
||
case bfd_mach_x86_64_intel_syntax:
|
||
switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
|
||
{
|
||
case bfd_mach_x86_64:
|
||
case bfd_mach_x86_64_intel_syntax:
|
||
return arches->gdbarch;
|
||
case bfd_mach_i386_i386:
|
||
case bfd_mach_i386_i8086:
|
||
case bfd_mach_i386_i386_intel_syntax:
|
||
break;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"i386_gdbarch_init: unknown machine type");
|
||
}
|
||
break;
|
||
case bfd_mach_i386_i386:
|
||
case bfd_mach_i386_i8086:
|
||
case bfd_mach_i386_i386_intel_syntax:
|
||
switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
|
||
{
|
||
case bfd_mach_x86_64:
|
||
case bfd_mach_x86_64_intel_syntax:
|
||
break;
|
||
case bfd_mach_i386_i386:
|
||
case bfd_mach_i386_i8086:
|
||
case bfd_mach_i386_i386_intel_syntax:
|
||
return arches->gdbarch;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"i386_gdbarch_init: unknown machine type");
|
||
}
|
||
break;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"i386_gdbarch_init: unknown machine type");
|
||
}
|
||
}
|
||
|
||
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
|
||
gdbarch = gdbarch_alloc (&info, tdep);
|
||
|
||
switch (info.bfd_arch_info->mach)
|
||
{
|
||
case bfd_mach_x86_64:
|
||
case bfd_mach_x86_64_intel_syntax:
|
||
tdep->num_xmm_regs = 16;
|
||
break;
|
||
case bfd_mach_i386_i386:
|
||
case bfd_mach_i386_i8086:
|
||
case bfd_mach_i386_i386_intel_syntax:
|
||
/* This is place for definition of i386 target vector. */
|
||
break;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
"i386_gdbarch_init: unknown machine type");
|
||
}
|
||
|
||
set_gdbarch_long_bit (gdbarch, 64);
|
||
set_gdbarch_long_long_bit (gdbarch, 64);
|
||
set_gdbarch_ptr_bit (gdbarch, 64);
|
||
|
||
set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
|
||
set_gdbarch_ieee_float (gdbarch, 1);
|
||
|
||
|
||
set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
|
||
set_gdbarch_register_name (gdbarch, x86_64_register_name);
|
||
set_gdbarch_register_size (gdbarch, 8);
|
||
set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
|
||
set_gdbarch_max_register_raw_size (gdbarch, 16);
|
||
set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
|
||
/* Total amount of space needed to store our copies of the machine's register
|
||
(SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
|
||
set_gdbarch_register_bytes (gdbarch,
|
||
(18 * 8) + (8 * 10) + (8 * 4) + (8 * 16 + 4));
|
||
set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
|
||
set_gdbarch_max_register_virtual_size (gdbarch, 16);
|
||
|
||
set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
|
||
|
||
set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
|
||
set_gdbarch_register_convert_to_virtual (gdbarch,
|
||
x86_64_register_convert_to_virtual);
|
||
set_gdbarch_register_convert_to_raw (gdbarch,
|
||
x86_64_register_convert_to_raw);
|
||
|
||
/* Register numbers of various important registers. */
|
||
set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
|
||
set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
|
||
set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
|
||
|
||
set_gdbarch_fp0_regnum (gdbarch, 18); /* First FPU floating-point register. */
|
||
|
||
set_gdbarch_read_fp (gdbarch, cfi_read_fp);
|
||
set_gdbarch_write_fp (gdbarch, cfi_write_fp);
|
||
|
||
/* Discard from the stack the innermost frame, restoring all registers. */
|
||
set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
|
||
|
||
/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
|
||
chain-pointer. */
|
||
set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
|
||
|
||
set_gdbarch_frameless_function_invocation (gdbarch,
|
||
x86_64_frameless_function_invocation);
|
||
set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
|
||
|
||
set_gdbarch_frame_args_address (gdbarch, default_frame_address);
|
||
set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
|
||
|
||
/* Return number of bytes at start of arglist that are not really args. */
|
||
set_gdbarch_frame_args_skip (gdbarch, 8);
|
||
|
||
set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
|
||
|
||
/* Frame pc initialization is handled by unwind informations. */
|
||
set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
|
||
|
||
/* Initialization of unwind informations. */
|
||
set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
|
||
|
||
/* Getting saved registers is handled by unwind informations. */
|
||
set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
|
||
|
||
set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
|
||
|
||
/* Cons up virtual frame pointer for trace */
|
||
set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
|
||
|
||
|
||
set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
|
||
|
||
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
|
||
set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
|
||
set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
|
||
set_gdbarch_call_dummy_length (gdbarch, 0);
|
||
set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
|
||
set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
|
||
set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
|
||
set_gdbarch_call_dummy_words (gdbarch, 0);
|
||
set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
|
||
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
|
||
set_gdbarch_call_dummy_p (gdbarch, 1);
|
||
set_gdbarch_call_dummy_start_offset (gdbarch, 0);
|
||
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
|
||
set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
|
||
set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
|
||
set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
|
||
|
||
/* Return number of args passed to a frame, no way to tell. */
|
||
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
|
||
/* Don't use default structure extract routine */
|
||
set_gdbarch_extract_struct_value_address (gdbarch, 0);
|
||
|
||
/* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
|
||
and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
|
||
the case when structure is returned in registers. */
|
||
set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
|
||
|
||
/* Store the address of the place in which to copy the structure the
|
||
subroutine will return. This is called from call_function. */
|
||
set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
|
||
|
||
/* Extract from an array REGBUF containing the (raw) register state
|
||
a function return value of type TYPE, and copy that, in virtual format,
|
||
into VALBUF. */
|
||
set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
|
||
|
||
|
||
/* Write into the appropriate registers a function return value stored
|
||
in VALBUF of type TYPE, given in virtual format. */
|
||
set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
|
||
|
||
|
||
/* Offset from address of function to start of its code. */
|
||
set_gdbarch_function_start_offset (gdbarch, 0);
|
||
|
||
set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
|
||
|
||
set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
|
||
|
||
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
||
|
||
set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc);
|
||
|
||
|
||
/* Amount PC must be decremented by after a breakpoint. This is often the
|
||
number of bytes in BREAKPOINT but not always. */
|
||
set_gdbarch_decr_pc_after_break (gdbarch, 1);
|
||
|
||
/* Use dwarf2 debug frame informations. */
|
||
set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
|
||
return gdbarch;
|
||
}
|
||
|
||
void
|
||
_initialize_x86_64_tdep (void)
|
||
{
|
||
register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
|
||
|
||
/* Initialize the table saying where each register starts in the
|
||
register file. */
|
||
{
|
||
int i, offset;
|
||
|
||
offset = 0;
|
||
for (i = 0; i < X86_64_NUM_REGS; i++)
|
||
{
|
||
x86_64_register_byte_table[i] = offset;
|
||
offset += x86_64_register_raw_size_table[i];
|
||
}
|
||
}
|
||
|
||
tm_print_insn = gdb_print_insn_x86_64;
|
||
tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
|
||
|
||
/* Add the variable that controls the disassembly flavour. */
|
||
{
|
||
struct cmd_list_element *new_cmd;
|
||
|
||
new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
|
||
valid_flavours, &disassembly_flavour, "\
|
||
Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
|
||
and the default value is \"att\".", &setlist);
|
||
add_show_from_set (new_cmd, &showlist);
|
||
}
|
||
}
|