a9762ec78a
Switch the license of all .h files to GPLv3.
Switch the license of all .cc files to GPLv3.
392 lines
12 KiB
C
392 lines
12 KiB
C
/* Native-dependent code for GNU/Linux on MIPS processors.
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Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "mips-tdep.h"
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#include "target.h"
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#include "regcache.h"
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#include "linux-nat.h"
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#include "mips-linux-tdep.h"
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#include "target-descriptions.h"
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#include "xml-support.h"
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#include "gdb_proc_service.h"
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#include "gregset.h"
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#include <sgidefs.h>
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#include <sys/ptrace.h>
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#ifndef PTRACE_GET_THREAD_AREA
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#define PTRACE_GET_THREAD_AREA 25
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#endif
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/* Assume that we have PTRACE_GETREGS et al. support. If we do not,
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we'll clear this and use PTRACE_PEEKUSER instead. */
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static int have_ptrace_regsets = 1;
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/* Saved function pointers to fetch and store a single register using
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PTRACE_PEEKUSER and PTRACE_POKEUSER. */
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void (*super_fetch_registers) (struct regcache *, int);
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void (*super_store_registers) (struct regcache *, int);
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/* Map gdb internal register number to ptrace ``address''.
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These ``addresses'' are normally defined in <asm/ptrace.h>.
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ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
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and there's no point in reading or setting MIPS_ZERO_REGNUM.
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We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
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static CORE_ADDR
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mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
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{
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CORE_ADDR regaddr;
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if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
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error (_("Bogon register number %d."), regno);
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if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
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regaddr = regno;
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else if ((regno >= mips_regnum (gdbarch)->fp0)
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&& (regno < mips_regnum (gdbarch)->fp0 + 32))
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regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
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else if (regno == mips_regnum (gdbarch)->pc)
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regaddr = PC;
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else if (regno == mips_regnum (gdbarch)->cause)
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regaddr = store? (CORE_ADDR) -1 : CAUSE;
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else if (regno == mips_regnum (gdbarch)->badvaddr)
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regaddr = store? (CORE_ADDR) -1 : BADVADDR;
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else if (regno == mips_regnum (gdbarch)->lo)
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regaddr = MMLO;
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else if (regno == mips_regnum (gdbarch)->hi)
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regaddr = MMHI;
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else if (regno == mips_regnum (gdbarch)->fp_control_status)
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regaddr = FPC_CSR;
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else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
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regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
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else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
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regaddr = 0;
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else
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regaddr = (CORE_ADDR) -1;
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return regaddr;
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}
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static CORE_ADDR
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mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
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{
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CORE_ADDR regaddr;
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if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
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error (_("Bogon register number %d."), regno);
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if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
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regaddr = regno;
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else if ((regno >= mips_regnum (gdbarch)->fp0)
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&& (regno < mips_regnum (gdbarch)->fp0 + 32))
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regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (current_gdbarch));
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else if (regno == mips_regnum (gdbarch)->pc)
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regaddr = MIPS64_PC;
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else if (regno == mips_regnum (gdbarch)->cause)
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regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
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else if (regno == mips_regnum (gdbarch)->badvaddr)
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regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
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else if (regno == mips_regnum (gdbarch)->lo)
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regaddr = MIPS64_MMLO;
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else if (regno == mips_regnum (gdbarch)->hi)
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regaddr = MIPS64_MMHI;
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else if (regno == mips_regnum (gdbarch)->fp_control_status)
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regaddr = MIPS64_FPC_CSR;
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else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
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regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
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else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
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regaddr = 0;
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else
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regaddr = (CORE_ADDR) -1;
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return regaddr;
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}
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/* Fetch the thread-local storage pointer for libthread_db. */
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ps_err_e
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ps_get_thread_area (const struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base)
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{
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if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
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return PS_ERR;
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/* IDX is the bias from the thread pointer to the beginning of the
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thread descriptor. It has to be subtracted due to implementation
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quirks in libthread_db. */
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*base = (void *) ((char *)*base - idx);
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return PS_OK;
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}
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/* Wrapper functions. These are only used by libthread_db. */
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void
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supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
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{
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if (mips_isa_regsize (current_gdbarch) == 4)
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mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
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else
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mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
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}
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void
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fill_gregset (const struct regcache *regcache,
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gdb_gregset_t *gregsetp, int regno)
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{
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if (mips_isa_regsize (current_gdbarch) == 4)
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mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
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else
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mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
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}
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void
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supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
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{
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if (mips_isa_regsize (current_gdbarch) == 4)
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mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
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else
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mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *) fpregsetp);
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}
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void
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fill_fpregset (const struct regcache *regcache,
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gdb_fpregset_t *fpregsetp, int regno)
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{
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if (mips_isa_regsize (current_gdbarch) == 4)
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mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
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else
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mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *) fpregsetp, regno);
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}
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/* Fetch REGNO (or all registers if REGNO == -1) from the target
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using PTRACE_GETREGS et al. */
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static void
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mips64_linux_regsets_fetch_registers (struct regcache *regcache, int regno)
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{
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int is_fp;
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int tid;
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if (regno >= mips_regnum (current_gdbarch)->fp0
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&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
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is_fp = 1;
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else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
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is_fp = 1;
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else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
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is_fp = 1;
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else
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is_fp = 0;
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tid = ptid_get_lwp (inferior_ptid);
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if (tid == 0)
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tid = ptid_get_pid (inferior_ptid);
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if (regno == -1 || !is_fp)
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{
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mips64_elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
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{
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if (errno == EIO)
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{
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have_ptrace_regsets = 0;
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return;
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}
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perror_with_name (_("Couldn't get registers"));
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}
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mips64_supply_gregset (regcache,
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(const mips64_elf_gregset_t *) ®s);
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}
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if (regno == -1 || is_fp)
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{
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mips64_elf_fpregset_t fp_regs;
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if (ptrace (PTRACE_GETFPREGS, tid, 0L,
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(PTRACE_TYPE_ARG3) &fp_regs) == -1)
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{
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if (errno == EIO)
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{
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have_ptrace_regsets = 0;
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return;
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}
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perror_with_name (_("Couldn't get FP registers"));
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}
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mips64_supply_fpregset (regcache,
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(const mips64_elf_fpregset_t *) &fp_regs);
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}
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}
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/* Store REGNO (or all registers if REGNO == -1) to the target
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using PTRACE_SETREGS et al. */
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static void
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mips64_linux_regsets_store_registers (const struct regcache *regcache, int regno)
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{
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int is_fp;
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int tid;
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if (regno >= mips_regnum (current_gdbarch)->fp0
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&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
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is_fp = 1;
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else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
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is_fp = 1;
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else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
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is_fp = 1;
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else
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is_fp = 0;
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tid = ptid_get_lwp (inferior_ptid);
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if (tid == 0)
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tid = ptid_get_pid (inferior_ptid);
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if (regno == -1 || !is_fp)
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{
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mips64_elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
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perror_with_name (_("Couldn't get registers"));
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mips64_fill_gregset (regcache, ®s, regno);
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if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1)
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perror_with_name (_("Couldn't set registers"));
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}
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if (regno == -1 || is_fp)
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{
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mips64_elf_fpregset_t fp_regs;
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if (ptrace (PTRACE_GETFPREGS, tid, 0L,
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(PTRACE_TYPE_ARG3) &fp_regs) == -1)
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perror_with_name (_("Couldn't get FP registers"));
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mips64_fill_fpregset (regcache, &fp_regs, regno);
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if (ptrace (PTRACE_SETFPREGS, tid, 0L,
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(PTRACE_TYPE_ARG3) &fp_regs) == -1)
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perror_with_name (_("Couldn't set FP registers"));
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}
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}
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/* Fetch REGNO (or all registers if REGNO == -1) from the target
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using any working method. */
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static void
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mips64_linux_fetch_registers (struct regcache *regcache, int regnum)
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{
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/* Unless we already know that PTRACE_GETREGS does not work, try it. */
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if (have_ptrace_regsets)
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mips64_linux_regsets_fetch_registers (regcache, regnum);
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/* If we know, or just found out, that PTRACE_GETREGS does not work, fall
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back to PTRACE_PEEKUSER. */
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if (!have_ptrace_regsets)
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super_fetch_registers (regcache, regnum);
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}
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/* Store REGNO (or all registers if REGNO == -1) to the target
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using any working method. */
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static void
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mips64_linux_store_registers (struct regcache *regcache, int regnum)
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{
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/* Unless we already know that PTRACE_GETREGS does not work, try it. */
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if (have_ptrace_regsets)
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mips64_linux_regsets_store_registers (regcache, regnum);
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/* If we know, or just found out, that PTRACE_GETREGS does not work, fall
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back to PTRACE_PEEKUSER. */
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if (!have_ptrace_regsets)
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super_store_registers (regcache, regnum);
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}
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/* Return the address in the core dump or inferior of register
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REGNO. */
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static CORE_ADDR
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mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
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{
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if (mips_abi_regsize (gdbarch) == 8)
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return mips64_linux_register_addr (gdbarch, regno, store_p);
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else
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return mips_linux_register_addr (gdbarch, regno, store_p);
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}
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static LONGEST (*super_xfer_partial) (struct target_ops *, enum target_object,
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const char *, gdb_byte *, const gdb_byte *,
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ULONGEST, LONGEST);
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static LONGEST
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mips_linux_xfer_partial (struct target_ops *ops,
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enum target_object object,
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const char *annex,
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gdb_byte *readbuf, const gdb_byte *writebuf,
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ULONGEST offset, LONGEST len)
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{
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if (object == TARGET_OBJECT_AVAILABLE_FEATURES)
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{
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if (annex != NULL && strcmp (annex, "target.xml") == 0)
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{
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/* Report that target registers are a size we know for sure
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that we can get from ptrace. */
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if (_MIPS_SIM == _ABIO32)
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annex = "mips-linux.xml";
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else
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annex = "mips64-linux.xml";
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}
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return xml_builtin_xfer_partial (annex, readbuf, writebuf, offset, len);
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}
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return super_xfer_partial (ops, object, annex, readbuf, writebuf,
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offset, len);
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}
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void _initialize_mips_linux_nat (void);
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void
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_initialize_mips_linux_nat (void)
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{
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struct target_ops *t = linux_trad_target (mips_linux_register_u_offset);
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super_fetch_registers = t->to_fetch_registers;
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super_store_registers = t->to_store_registers;
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t->to_fetch_registers = mips64_linux_fetch_registers;
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t->to_store_registers = mips64_linux_store_registers;
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/* Override the default to_xfer_partial. */
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super_xfer_partial = t->to_xfer_partial;
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t->to_xfer_partial = mips_linux_xfer_partial;
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linux_nat_add_target (t);
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}
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