c967f1874a
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
(sim-model.o): Add new rule.
(cgen-{scache,trace,utils}.o): Add new rules.
* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
Indent output by 2 spaces.
* cgen-scache.h (scache_print_profile): Update.
* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
Use trace_printf, not fprintf.
(trace_extract): Use trace_printf, not cgen_trace_printf.
* genmloop.sh (!FAST case): Increment `insn_count'.
* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
(sim_cpu_base): Rename member `sd' to `state' to be consistent with
access macro's name.
* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
(sim_core_{install,uninstall}): New functions.
* sim-core.h (sim_core_{install,uninstall}): Declare.
(sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
* sim-model.h (models,machs,model_install): Declare.
* sim-module.c (modules): Add scache_install, model_install.
(sim_post_argv_init): Set cpu->state backlinks.
* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
(standard_option_handler): Likewise.
* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
sim-profile.h.
(*): Assume ANSI C.
(profile_options): Delete --profile-simcache.
(profile_option_handler): Likewise.
(profile_print_insn): Change `sd' arg to `cpu'. Indent output 2
spaces.
(profile_print_{memory,model}): Likewise.
(profile_print_simcache): Delete.
(profile_print_speed): New function.
(profile_print): Rewrite.
* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
(PROFILE_DATA): Delete members simcache_{hits,misses}.
(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
(profile_print): Update prototype.
170 lines
3.5 KiB
C
170 lines
3.5 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _SIM_CORE_H_
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#define _SIM_CORE_H_
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/* basic types */
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typedef struct _sim_core_mapping sim_core_mapping;
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struct _sim_core_mapping {
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/* common */
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int level;
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int space;
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unsigned_word base;
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unsigned_word bound;
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unsigned nr_bytes;
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/* memory map */
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int free_buffer;
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void *buffer;
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/* callback map */
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device *device;
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/* growth */
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sim_core_mapping *next;
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};
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typedef struct _sim_core_map sim_core_map;
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struct _sim_core_map {
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sim_core_mapping *first;
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};
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typedef enum {
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sim_core_read_map,
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sim_core_write_map,
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sim_core_execute_map,
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nr_sim_core_maps,
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} sim_core_maps;
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typedef struct _sim_core sim_core;
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struct _sim_core {
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int trace;
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sim_core_map map[nr_sim_core_maps];
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};
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/* Install the "core" module. */
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EXTERN_SIM_CORE\
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(SIM_RC) sim_core_install (SIM_DESC sd);
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/* Uninstall the "core" subsystem. */
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EXTERN_SIM_CORE\
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(void)
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sim_core_uninstall (SIM_DESC sd);
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/* initialize */
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EXTERN_SIM_CORE\
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(SIM_RC) sim_core_init
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(SIM_DESC sd);
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/* tracing */
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INLINE_SIM_CORE\
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(void) sim_core_set_trace\
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(SIM_DESC sd,
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int level);
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/* Create a memory space within the core. */
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INLINE_SIM_CORE\
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(void) sim_core_attach
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(SIM_DESC sd,
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attach_type attach,
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access_type access,
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int address_space,
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unsigned_word addr,
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unsigned nr_bytes, /* host limited */
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device *client,
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void *optional_buffer);
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/* Variable sized read/write
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Transfer (zero) a variable size block of data between the host and
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target (possibly byte swapping it). Should any problems occure,
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the number of bytes actually transfered is returned. */
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INLINE_SIM_CORE\
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(unsigned) sim_core_read_buffer
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(SIM_DESC sd,
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sim_core_maps map,
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void *buffer,
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unsigned_word addr,
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unsigned nr_bytes);
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INLINE_SIM_CORE\
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(unsigned) sim_core_write_buffer
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(SIM_DESC sd,
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sim_core_maps map,
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const void *buffer,
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unsigned_word addr,
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unsigned nr_bytes);
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/* Fixed sized read/write
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Transfer a fixed amout of memory between the host and target. The
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memory always being translated and the operation always aborting
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should a problem occure */
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#define DECLARE_SIM_CORE_WRITE_N(N) \
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INLINE_SIM_CORE\
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(void) sim_core_write_##N \
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(SIM_DESC sd, \
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sim_core_maps map, \
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unsigned_word addr, \
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unsigned_##N val);
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DECLARE_SIM_CORE_WRITE_N(1)
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DECLARE_SIM_CORE_WRITE_N(2)
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DECLARE_SIM_CORE_WRITE_N(4)
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DECLARE_SIM_CORE_WRITE_N(8)
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DECLARE_SIM_CORE_WRITE_N(word)
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#undef DECLARE_SIM_CORE_WRITE_N
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#define DECLARE_SIM_CORE_READ_N(N) \
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INLINE_SIM_CORE\
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(unsigned_##N) sim_core_read_##N \
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(SIM_DESC sd, \
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sim_core_maps map, \
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unsigned_word addr);
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DECLARE_SIM_CORE_READ_N(1)
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DECLARE_SIM_CORE_READ_N(2)
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DECLARE_SIM_CORE_READ_N(4)
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DECLARE_SIM_CORE_READ_N(8)
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DECLARE_SIM_CORE_READ_N(word)
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#undef DECLARE_SIM_CORE_READ_N
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#endif
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