3e29f34a4e
1. Background information The MIPS architecture, as originally designed and implemented in mid-1980s has a uniform instruction word size that is 4 bytes, naturally aligned. As such all MIPS instructions are located at addresses that have their bits #1 and #0 set to zeroes, and any attempt to execute an instruction from an address that has any of the two bits set to one causes an address error exception. This may for example happen when a jump-register instruction is executed whose register value used as the jump target has any of these bits set. Then in mid 1990s LSI sought a way to improve code density for their TinyRISC family of MIPS cores and invented an alternatively encoded instruction set in a joint effort with MIPS Technologies (then a subsidiary of SGI). The new instruction set has been named the MIPS16 ASE (Application-Specific Extension) and uses a variable instruction word size, which is 2 bytes (as the name of the ASE suggests) for most, but there are a couple of exceptions that take 4 bytes, and then most of the 2-byte instructions can be treated with a 2-byte extension prefix to expand the range of the immediate operands used. As a result instructions are no longer 4-byte aligned, instead they are aligned to a multiple of 2. That left the bit #0 still unused for code references, be it for the standard MIPS (i.e. as originally invented) or for the MIPS16 instruction set, and based on that observation a clever trick was invented that on one hand allowed the processor to be seamlessly switched between the two instruction sets at any time at the run time while on the other avoided the introduction of any special control register to do that. So it is the bit #0 of the instruction address that was chosen as the selector and named the ISA bit. Any instruction executed at an even address is interpreted as a standard MIPS instruction (the address still has to have its bit #1 clear), any instruction executed at an odd address is interpreted as a MIPS16 instruction. To switch between modes ordinary jump instructions are used, such as used for function calls and returns, specifically the bit #0 of the source register used in jump-register instructions selects the execution (ISA) mode for the following piece of code to be interpreted in. Additionally new jump-immediate instructions were added that flipped the ISA bit to select the opposite mode upon execution. They were considered necessary to avoid the need to make register jumps in all cases as the original jump-immediate instructions provided no way to change the bit #0 at all. This was all important for cases where standard MIPS and MIPS16 code had to be mixed, either for compatibility with the existing binary code base or to access resources not reachable from MIPS16 code (the MIPS16 instruction set only provides access to general-purpose registers, and not for example floating-point unit registers or privileged coprocessor 0 registers) -- pieces of code in the opposite mode can be executed as ordinary subroutine calls. A similar approach has been more recently adopted for the MIPS16 replacement instruction set defined as the so called microMIPS ASE. This is another instruction set encoding introduced to the MIPS architecture. Just like the MIPS16 ASE, the microMIPS instruction set uses a variable-length encoding, where each instruction takes a multiple of 2 bytes. The ISA bit has been reused and for microMIPS-capable processors selects between the standard MIPS and the microMIPS mode instead. 2. Statement of the problem To put it shortly, MIPS16 and microMIPS code pointers used by GDB are different to these observed at the run time. This results in the same expressions being evaluated producing different results in GDB and in the program being debugged. Obviously it's the results obtained at the run time that are correct (they define how the program behaves) and therefore by definition the results obtained in GDB are incorrect. A bit longer description will record that obviously at the run time the ISA bit has to be set correctly (refer to background information above if unsure why so) or the program will not run as expected. This is recorded in all the executable file structures used at the run time: the dynamic symbol table (but not always the static one!), the GOT, and obviously in all the addresses embedded in code or data of the program itself, calculated by applying the appropriate relocations at the static link time. While a program is being processed by GDB, the ISA bit is stripped off from any code addresses, presumably to make them the same as the respective raw memory byte address used by the processor to access the instruction in the instruction fetch access cycle. This stripping is actually performed outside GDB proper, in BFD, specifically _bfd_mips_elf_symbol_processing (elfxx-mips.c, see the piece of code at the very bottom of that function, starting with an: "If this is an odd-valued function symbol, assume it's a MIPS16 or microMIPS one." comment). This function is also responsible for symbol table dumps made by `objdump' too, so you'll never see the ISA bit reported there by that tool, you need to use `readelf'. This is however unlike what is ever done at the run time, the ISA bit once present is never stripped off, for example a cast like this: (short *) main will not strip the ISA bit off and if the resulting pointer is intended to be used to access instructions as data, for example for software instruction decoding (like for fault recovery or emulation in a signal handler) or for self-modifying code then the bit still has to be stripped off by an explicit AND operation. This is probably best illustrated with a simple real program example. Let's consider the following simple program: $ cat foobar.c int __attribute__ ((mips16)) foo (void) { return 1; } int __attribute__ ((mips16)) bar (void) { return 2; } int __attribute__ ((nomips16)) foo32 (void) { return 3; } int (*foo32p) (void) = foo32; int (*foop) (void) = foo; int fooi = (int) foo; int main (void) { return foop (); } $ This is plain C with no odd tricks, except from the instruction mode attributes. They are not necessary to trigger this problem, I just put them here so that the program can be contained in a single source file and to make it obvious which function is MIPS16 code and which is not. Let's try it with Linux, so that everyone can repeat this experiment: $ mips-linux-gnu-gcc -mips16 -g -O2 -o foobar foobar.c $ Let's have a look at some interesting symbols: $ mips-linux-gnu-readelf -s foobar | egrep 'table|foo|bar' Symbol table '.dynsym' contains 7 entries: Symbol table '.symtab' contains 95 entries: 55: 00000000 0 FILE LOCAL DEFAULT ABS foobar.c 66: 0040068c 4 FUNC GLOBAL DEFAULT [MIPS16] 12 bar 68: 00410848 4 OBJECT GLOBAL DEFAULT 21 foo32p 70: 00410844 4 OBJECT GLOBAL DEFAULT 21 foop 78: 00400684 8 FUNC GLOBAL DEFAULT 12 foo32 80: 00400680 4 FUNC GLOBAL DEFAULT [MIPS16] 12 foo 88: 00410840 4 OBJECT GLOBAL DEFAULT 21 fooi $ Hmm, no sight of the ISA bit, but notice how foo and bar (but not foo32!) have been marked as MIPS16 functions (ELF symbol structure's `st_other' field is used for that). So let's try to run and poke at this program with GDB. I'll be using a native system for simplicity (I'll be using ellipses here and there to remove unrelated clutter): $ ./foobar $ echo $? 1 $ So far, so good. $ gdb ./foobar [...] (gdb) break main Breakpoint 1 at 0x400490: file foobar.c, line 23. (gdb) run Starting program: .../foobar Breakpoint 1, main () at foobar.c:23 23 return foop (); (gdb) Yay, it worked! OK, so let's poke at it: (gdb) print main $1 = {int (void)} 0x400490 <main> (gdb) print foo32 $2 = {int (void)} 0x400684 <foo32> (gdb) print foo32p $3 = (int (*)(void)) 0x400684 <foo32> (gdb) print bar $4 = {int (void)} 0x40068c <bar> (gdb) print foo $5 = {int (void)} 0x400680 <foo> (gdb) print foop $6 = (int (*)(void)) 0x400681 <foo> (gdb) A-ha! Here's the difference and finally the ISA bit! (gdb) print /x fooi $7 = 0x400681 (gdb) p/x $pc p/x $pc $8 = 0x400491 (gdb) And here as well... (gdb) advance foo foo () at foobar.c:4 4 } (gdb) disassemble Dump of assembler code for function foo: 0x00400680 <+0>: jr ra 0x00400682 <+2>: li v0,1 End of assembler dump. (gdb) finish Run till exit from #0 foo () at foobar.c:4 main () at foobar.c:24 24 } Value returned is $9 = 1 (gdb) continue Continuing. [Inferior 1 (process 14103) exited with code 01] (gdb) So let's be a bit inquisitive... (gdb) run Starting program: .../foobar Breakpoint 1, main () at foobar.c:23 23 return foop (); (gdb) Actually we do not like to run foo here at all. Let's run bar instead! (gdb) set foop = bar (gdb) print foop $10 = (int (*)(void)) 0x40068c <bar> (gdb) Hmm, no ISA bit. Is it going to work? (gdb) advance bar bar () at foobar.c:9 9 } (gdb) p/x $pc $11 = 0x40068c (gdb) disassemble Dump of assembler code for function bar: => 0x0040068c <+0>: jr ra 0x0040068e <+2>: li v0,2 End of assembler dump. (gdb) finish Run till exit from #0 bar () at foobar.c:9 Program received signal SIGILL, Illegal instruction. bar () at foobar.c:9 9 } (gdb) Oops! (gdb) p/x $pc $12 = 0x40068c (gdb) We're still there! (gdb) continue Continuing. Program terminated with signal SIGILL, Illegal instruction. The program no longer exists. (gdb) So let's try something else: (gdb) run Starting program: .../foobar Breakpoint 1, main () at foobar.c:23 23 return foop (); (gdb) set foop = foo (gdb) advance foo foo () at foobar.c:4 4 } (gdb) disassemble Dump of assembler code for function foo: => 0x00400680 <+0>: jr ra 0x00400682 <+2>: li v0,1 End of assembler dump. (gdb) finish Run till exit from #0 foo () at foobar.c:4 Program received signal SIGILL, Illegal instruction. foo () at foobar.c:4 4 } (gdb) continue Continuing. Program terminated with signal SIGILL, Illegal instruction. The program no longer exists. (gdb) The same problem! (gdb) run Starting program: /net/build2-lucid-cs/scratch/macro/mips-linux-fsf-gcc/isa-bit/foobar Breakpoint 1, main () at foobar.c:23 23 return foop (); (gdb) set foop = foo32 (gdb) advance foo32 foo32 () at foobar.c:14 14 } (gdb) disassemble Dump of assembler code for function foo32: => 0x00400684 <+0>: jr ra 0x00400688 <+4>: li v0,3 End of assembler dump. (gdb) finish Run till exit from #0 foo32 () at foobar.c:14 main () at foobar.c:24 24 } Value returned is $14 = 3 (gdb) continue Continuing. [Inferior 1 (process 14113) exited with code 03] (gdb) That did work though, so it's the ISA bit only! (gdb) quit Enough! That's the tip of the iceberg only though. So let's rebuild the executable with some dynamic symbols: $ mips-linux-gnu-gcc -mips16 -Wl,--export-dynamic -g -O2 -o foobar-dyn foobar.c $ mips-linux-gnu-readelf -s foobar-dyn | egrep 'table|foo|bar' Symbol table '.dynsym' contains 32 entries: 6: 004009cd 4 FUNC GLOBAL DEFAULT 12 bar 8: 00410b88 4 OBJECT GLOBAL DEFAULT 21 foo32p 9: 00410b84 4 OBJECT GLOBAL DEFAULT 21 foop 15: 004009c4 8 FUNC GLOBAL DEFAULT 12 foo32 17: 004009c1 4 FUNC GLOBAL DEFAULT 12 foo 25: 00410b80 4 OBJECT GLOBAL DEFAULT 21 fooi Symbol table '.symtab' contains 95 entries: 55: 00000000 0 FILE LOCAL DEFAULT ABS foobar.c 69: 004009cd 4 FUNC GLOBAL DEFAULT 12 bar 71: 00410b88 4 OBJECT GLOBAL DEFAULT 21 foo32p 72: 00410b84 4 OBJECT GLOBAL DEFAULT 21 foop 79: 004009c4 8 FUNC GLOBAL DEFAULT 12 foo32 81: 004009c1 4 FUNC GLOBAL DEFAULT 12 foo 89: 00410b80 4 OBJECT GLOBAL DEFAULT 21 fooi $ OK, now the ISA bit is there for a change, but the MIPS16 `st_other' attribute gone, hmm... What does `objdump' do then: $ mips-linux-gnu-objdump -Tt foobar-dyn | egrep 'SYMBOL|foo|bar' foobar-dyn: file format elf32-tradbigmips SYMBOL TABLE: 00000000 l df *ABS* 00000000 foobar.c 004009cc g F .text 00000004 0xf0 bar 00410b88 g O .data 00000004 foo32p 00410b84 g O .data 00000004 foop 004009c4 g F .text 00000008 foo32 004009c0 g F .text 00000004 0xf0 foo 00410b80 g O .data 00000004 fooi DYNAMIC SYMBOL TABLE: 004009cc g DF .text 00000004 Base 0xf0 bar 00410b88 g DO .data 00000004 Base foo32p 00410b84 g DO .data 00000004 Base foop 004009c4 g DF .text 00000008 Base foo32 004009c0 g DF .text 00000004 Base 0xf0 foo 00410b80 g DO .data 00000004 Base fooi $ Hmm, the attribute (0xf0, printed raw) is back, and the ISA bit gone again. Let's have a look at some DWARF-2 records GDB uses (I'll be stripping off a lot here for brevity) -- debug info: $ mips-linux-gnu-readelf -wi foobar Contents of the .debug_info section: [...] Compilation Unit @ offset 0x88: Length: 0xbb (32-bit) Version: 4 Abbrev Offset: 62 Pointer Size: 4 <0><93>: Abbrev Number: 1 (DW_TAG_compile_unit) <94> DW_AT_producer : (indirect string, offset: 0x19e): GNU C 4.8.0 20120513 (experimental) -meb -mips16 -march=mips32r2 -mhard-float -mllsc -mplt -mno-synci -mno-shared -mabi=32 -g -O2 <98> DW_AT_language : 1 (ANSI C) <99> DW_AT_name : (indirect string, offset: 0x190): foobar.c <9d> DW_AT_comp_dir : (indirect string, offset: 0x225): [...] <a1> DW_AT_ranges : 0x0 <a5> DW_AT_low_pc : 0x0 <a9> DW_AT_stmt_list : 0x27 <1><ad>: Abbrev Number: 2 (DW_TAG_subprogram) <ae> DW_AT_external : 1 <ae> DW_AT_name : foo <b2> DW_AT_decl_file : 1 <b3> DW_AT_decl_line : 1 <b4> DW_AT_prototyped : 1 <b4> DW_AT_type : <0xc2> <b8> DW_AT_low_pc : 0x400680 <bc> DW_AT_high_pc : 0x400684 <c0> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa) <c2> DW_AT_GNU_all_call_sites: 1 <1><c2>: Abbrev Number: 3 (DW_TAG_base_type) <c3> DW_AT_byte_size : 4 <c4> DW_AT_encoding : 5 (signed) <c5> DW_AT_name : int <1><c9>: Abbrev Number: 4 (DW_TAG_subprogram) <ca> DW_AT_external : 1 <ca> DW_AT_name : (indirect string, offset: 0x18a): foo32 <ce> DW_AT_decl_file : 1 <cf> DW_AT_decl_line : 11 <d0> DW_AT_prototyped : 1 <d0> DW_AT_type : <0xc2> <d4> DW_AT_low_pc : 0x400684 <d8> DW_AT_high_pc : 0x40068c <dc> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa) <de> DW_AT_GNU_all_call_sites: 1 <1><de>: Abbrev Number: 2 (DW_TAG_subprogram) <df> DW_AT_external : 1 <df> DW_AT_name : bar <e3> DW_AT_decl_file : 1 <e4> DW_AT_decl_line : 6 <e5> DW_AT_prototyped : 1 <e5> DW_AT_type : <0xc2> <e9> DW_AT_low_pc : 0x40068c <ed> DW_AT_high_pc : 0x400690 <f1> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa) <f3> DW_AT_GNU_all_call_sites: 1 <1><f3>: Abbrev Number: 5 (DW_TAG_subprogram) <f4> DW_AT_external : 1 <f4> DW_AT_name : (indirect string, offset: 0x199): main <f8> DW_AT_decl_file : 1 <f9> DW_AT_decl_line : 21 <fa> DW_AT_prototyped : 1 <fa> DW_AT_type : <0xc2> <fe> DW_AT_low_pc : 0x400490 <102> DW_AT_high_pc : 0x4004a4 <106> DW_AT_frame_base : 1 byte block: 9c (DW_OP_call_frame_cfa) <108> DW_AT_GNU_all_tail_call_sites: 1 [...] $ -- no sign of the ISA bit anywhere -- frame info: $ mips-linux-gnu-readelf -wf foobar [...] Contents of the .debug_frame section: 00000000 0000000c ffffffff CIE Version: 1 Augmentation: "" Code alignment factor: 1 Data alignment factor: -4 Return address column: 31 DW_CFA_def_cfa_register: r29 DW_CFA_nop 00000010 0000000c 00000000 FDE cie=00000000 pc=00400680..00400684 00000020 0000000c 00000000 FDE cie=00000000 pc=00400684..0040068c 00000030 0000000c 00000000 FDE cie=00000000 pc=0040068c..00400690 00000040 00000018 00000000 FDE cie=00000000 pc=00400490..004004a4 DW_CFA_advance_loc: 6 to 00400496 DW_CFA_def_cfa_offset: 32 DW_CFA_offset: r31 at cfa-4 DW_CFA_advance_loc: 6 to 0040049c DW_CFA_restore: r31 DW_CFA_def_cfa_offset: 0 DW_CFA_nop DW_CFA_nop DW_CFA_nop [...] $ -- no sign of the ISA bit anywhere -- range info (GDB doesn't use arange): $ mips-linux-gnu-readelf -wR foobar Contents of the .debug_ranges section: Offset Begin End 00000000 00400680 00400690 00000000 00400490 004004a4 00000000 <End of list> $ -- no sign of the ISA bit anywhere -- line info: $ mips-linux-gnu-readelf -wl foobar Raw dump of debug contents of section .debug_line: [...] Offset: 0x27 Length: 78 DWARF Version: 2 Prologue Length: 31 Minimum Instruction Length: 1 Initial value of 'is_stmt': 1 Line Base: -5 Line Range: 14 Opcode Base: 13 Opcodes: Opcode 1 has 0 args Opcode 2 has 1 args Opcode 3 has 1 args Opcode 4 has 1 args Opcode 5 has 1 args Opcode 6 has 0 args Opcode 7 has 0 args Opcode 8 has 0 args Opcode 9 has 1 args Opcode 10 has 0 args Opcode 11 has 0 args Opcode 12 has 1 args The Directory Table is empty. The File Name Table: Entry Dir Time Size Name 1 0 0 0 foobar.c Line Number Statements: Extended opcode 2: set Address to 0x400681 Special opcode 6: advance Address by 0 to 0x400681 and Line by 1 to 2 Special opcode 7: advance Address by 0 to 0x400681 and Line by 2 to 4 Special opcode 55: advance Address by 3 to 0x400684 and Line by 8 to 12 Special opcode 7: advance Address by 0 to 0x400684 and Line by 2 to 14 Advance Line by -7 to 7 Special opcode 131: advance Address by 9 to 0x40068d and Line by 0 to 7 Special opcode 7: advance Address by 0 to 0x40068d and Line by 2 to 9 Advance PC by 3 to 0x400690 Extended opcode 1: End of Sequence Extended opcode 2: set Address to 0x400491 Advance Line by 21 to 22 Copy Special opcode 6: advance Address by 0 to 0x400491 and Line by 1 to 23 Special opcode 60: advance Address by 4 to 0x400495 and Line by -1 to 22 Special opcode 34: advance Address by 2 to 0x400497 and Line by 1 to 23 Special opcode 62: advance Address by 4 to 0x40049b and Line by 1 to 24 Special opcode 32: advance Address by 2 to 0x40049d and Line by -1 to 23 Special opcode 6: advance Address by 0 to 0x40049d and Line by 1 to 24 Advance PC by 7 to 0x4004a4 Extended opcode 1: End of Sequence [...] -- a-ha, the ISA bit is there! However it's not always right for some reason, I don't have a small test case to show it, but here's an excerpt from MIPS16 libc, a prologue of a function: 00019630 <__libc_init_first>: 19630: e8a0 jrc ra 19632: 6500 nop 00019634 <_init>: 19634: f000 6a11 li v0,17 19638: f7d8 0b08 la v1,15e00 <_DYNAMIC+0x15c54> 1963c: f400 3240 sll v0,16 19640: e269 addu v0,v1 19642: 659a move gp,v0 19644: 64f6 save 48,ra,s0-s1 19646: 671c move s0,gp 19648: d204 sw v0,16(sp) 1964a: f352 984c lw v0,-27828(s0) 1964e: 6724 move s1,a0 and the corresponding DWARF-2 line info: Line Number Statements: Extended opcode 2: set Address to 0x19631 Advance Line by 44 to 45 Copy Special opcode 8: advance Address by 0 to 0x19631 and Line by 3 to 48 Special opcode 66: advance Address by 4 to 0x19635 and Line by 5 to 53 Advance PC by constant 17 to 0x19646 Special opcode 25: advance Address by 1 to 0x19647 and Line by 6 to 59 Advance Line by -6 to 53 Special opcode 33: advance Address by 2 to 0x19649 and Line by 0 to 53 Special opcode 39: advance Address by 2 to 0x1964b and Line by 6 to 59 Advance Line by -6 to 53 Special opcode 61: advance Address by 4 to 0x1964f and Line by 0 to 53 -- see that "Advance PC by constant 17" there? It clears the ISA bit, however code at 0x19646 is not standard MIPS code at all. For some reason the constant is always 17, I've never seen DW_LNS_const_add_pc used with any other value -- is that a binutils bug or what? 3. Solution: I think we should retain the value of the ISA bit in code references, that is effectively treat them as cookies as they indeed are (although trivially calculated) rather than raw memory byte addresses. In a perfect world both the static symbol table and the respective DWARF-2 records should be fixed to include the ISA bit in all the cases. I think however that this is infeasible. All the uses of `_bfd_mips_elf_symbol_processing' can not necessarily be tracked down. This function is used by `elf_slurp_symbol_table' that in turn is used by `bfd_canonicalize_symtab' and `bfd_canonicalize_dynamic_symtab', which are public interfaces. Similarly DWARF-2 records are used outside GDB, one notable if a bit questionable is the exception unwinder (libgcc/unwind-dw2.c) -- I have identified at least bits in `execute_cfa_program' and `uw_frame_state_for', both around the calls to `_Unwind_IsSignalFrame', that would need an update as they effectively flip the ISA bit freely; see also the comment about MASK_RETURN_ADDR in gcc/config/mips/mips.h. But there may be more places. Any change in how DWARF-2 records are produced would require an update there and would cause compatibility problems with libgcc.a binaries already distributed; given that this is a static library a complex change involving function renames would likely be required. I propose therefore to accept the existing inconsistencies and deal with them entirely within GDB. I have figured out that the ISA bit lost in various places can still be recovered as long as we have symbol information -- that'll have the `st_other' attribute correctly set to one of standard MIPS/MIPS16/microMIPS encoding. Here's the resulting change. It adds a couple of new `gdbarch' hooks, one to update symbol information with the ISA bit lost in `_bfd_mips_elf_symbol_processing', and two other ones to adjust DWARF-2 records as they're processed. The ISA bit is set in each address handled according to information retrieved from the symbol table for the symbol spanning the address if any; limits are adjusted based on the address they point to related to the respective base address. Additionally minimal symbol information has to be adjusted accordingly in its gdbarch hook. With these changes in place some complications with ISA bit juggling in the PC that never fully worked can be removed from the MIPS backend. Conversely, the generic dynamic linker event special breakpoint symbol handler has to be updated to call the minimal symbol gdbarch hook to record that the symbol is a MIPS16 or microMIPS address if applicable or the breakpoint will be set at the wrong address and either fail to work or cause SIGTRAPs (this is because the symbol is handled early on and bypasses regular symbol processing). 4. Results obtained The change fixes the example above -- to repeat only the crucial steps: (gdb) break main Breakpoint 1 at 0x400491: file foobar.c, line 23. (gdb) run Starting program: .../foobar Breakpoint 1, main () at foobar.c:23 23 return foop (); (gdb) print foo $1 = {int (void)} 0x400681 <foo> (gdb) set foop = bar (gdb) advance bar bar () at foobar.c:9 9 } (gdb) disassemble Dump of assembler code for function bar: => 0x0040068d <+0>: jr ra 0x0040068f <+2>: li v0,2 End of assembler dump. (gdb) finish Run till exit from #0 bar () at foobar.c:9 main () at foobar.c:24 24 } Value returned is $2 = 2 (gdb) continue Continuing. [Inferior 1 (process 14128) exited with code 02] (gdb) -- excellent! The change removes about 90 failures per MIPS16 multilib in mips-sde-elf testing too, results for MIPS16 are now similar to that for standard MIPS; microMIPS results are a bit worse because of host-I/O problems in QEMU used instead of MIPSsim for microMIPS testing only: === gdb Summary === # of expected passes 14299 # of unexpected failures 187 # of expected failures 56 # of known failures 58 # of unresolved testcases 11 # of untested testcases 52 # of unsupported tests 174 MIPS16: === gdb Summary === # of expected passes 14298 # of unexpected failures 187 # of unexpected successes 2 # of expected failures 54 # of known failures 58 # of unresolved testcases 12 # of untested testcases 52 # of unsupported tests 174 microMIPS: === gdb Summary === # of expected passes 14149 # of unexpected failures 201 # of unexpected successes 2 # of expected failures 54 # of known failures 58 # of unresolved testcases 7 # of untested testcases 53 # of unsupported tests 175 2014-12-12 Maciej W. Rozycki <macro@codesourcery.com> Maciej W. Rozycki <macro@mips.com> Pedro Alves <pedro@codesourcery.com> gdb/ * gdbarch.sh (elf_make_msymbol_special): Change type to `F', remove `predefault' and `invalid_p' initializers. (make_symbol_special): New architecture method. (adjust_dwarf2_addr, adjust_dwarf2_line): Likewise. (objfile, symbol): New declarations. * arch-utils.h (default_elf_make_msymbol_special): Remove prototype. (default_make_symbol_special): New prototype. (default_adjust_dwarf2_addr): Likewise. (default_adjust_dwarf2_line): Likewise. * mips-tdep.h (mips_unmake_compact_addr): New prototype. * arch-utils.c (default_elf_make_msymbol_special): Remove function. (default_make_symbol_special): New function. (default_adjust_dwarf2_addr): Likewise. (default_adjust_dwarf2_line): Likewise. * dwarf2-frame.c (decode_frame_entry_1): Call `gdbarch_adjust_dwarf2_addr'. * dwarf2loc.c (dwarf2_find_location_expression): Likewise. * dwarf2read.c (create_addrmap_from_index): Likewise. (process_psymtab_comp_unit_reader): Likewise. (add_partial_symbol): Likewise. (add_partial_subprogram): Likewise. (process_full_comp_unit): Likewise. (read_file_scope): Likewise. (read_func_scope): Likewise. Call `gdbarch_make_symbol_special'. (read_lexical_block_scope): Call `gdbarch_adjust_dwarf2_addr'. (read_call_site_scope): Likewise. (dwarf2_ranges_read): Likewise. (dwarf2_record_block_ranges): Likewise. (read_attribute_value): Likewise. (dwarf_decode_lines_1): Call `gdbarch_adjust_dwarf2_line'. (new_symbol_full): Call `gdbarch_adjust_dwarf2_addr'. * elfread.c (elf_symtab_read): Don't call `gdbarch_elf_make_msymbol_special' if unset. * mips-linux-tdep.c (micromips_linux_sigframe_validate): Strip the ISA bit from the PC. * mips-tdep.c (mips_unmake_compact_addr): New function. (mips_elf_make_msymbol_special): Set the ISA bit in the symbol's address appropriately. (mips_make_symbol_special): New function. (mips_pc_is_mips): Set the ISA bit before symbol lookup. (mips_pc_is_mips16): Likewise. (mips_pc_is_micromips): Likewise. (mips_pc_isa): Likewise. (mips_adjust_dwarf2_addr): New function. (mips_adjust_dwarf2_line): Likewise. (mips_read_pc, mips_unwind_pc): Keep the ISA bit. (mips_addr_bits_remove): Likewise. (mips_skip_trampoline_code): Likewise. (mips_write_pc): Don't set the ISA bit. (mips_eabi_push_dummy_call): Likewise. (mips_o64_push_dummy_call): Likewise. (mips_gdbarch_init): Install `mips_make_symbol_special', `mips_adjust_dwarf2_addr' and `mips_adjust_dwarf2_line' gdbarch handlers. * solib.c (gdb_bfd_lookup_symbol_from_symtab): Get target-specific symbol address adjustments. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. 2014-12-12 Maciej W. Rozycki <macro@codesourcery.com> gdb/testsuite/ * gdb.base/func-ptrs.c: New file. * gdb.base/func-ptrs.exp: New file.
197 lines
7.3 KiB
C
197 lines
7.3 KiB
C
/* Dynamic architecture support for GDB, the GNU debugger.
|
|
|
|
Copyright (C) 1998-2014 Free Software Foundation, Inc.
|
|
|
|
This file is part of GDB.
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
|
|
|
#ifndef GDBARCH_UTILS_H
|
|
#define GDBARCH_UTILS_H
|
|
|
|
struct gdbarch;
|
|
struct frame_info;
|
|
struct minimal_symbol;
|
|
struct type;
|
|
struct gdbarch_info;
|
|
|
|
/* An implementation of gdbarch_displaced_step_copy_insn for
|
|
processors that don't need to modify the instruction before
|
|
single-stepping the displaced copy.
|
|
|
|
Simply copy gdbarch_max_insn_length (ARCH) bytes from FROM to TO.
|
|
The closure is an array of that many bytes containing the
|
|
instruction's bytes, allocated with xmalloc. */
|
|
extern struct displaced_step_closure *
|
|
simple_displaced_step_copy_insn (struct gdbarch *gdbarch,
|
|
CORE_ADDR from, CORE_ADDR to,
|
|
struct regcache *regs);
|
|
|
|
/* Simple implementation of gdbarch_displaced_step_free_closure: Call
|
|
xfree.
|
|
This is appropriate for use with simple_displaced_step_copy_insn. */
|
|
extern void
|
|
simple_displaced_step_free_closure (struct gdbarch *gdbarch,
|
|
struct displaced_step_closure *closure);
|
|
|
|
/* Default implementation of gdbarch_displaced_hw_singlestep. */
|
|
extern int
|
|
default_displaced_step_hw_singlestep (struct gdbarch *,
|
|
struct displaced_step_closure *);
|
|
|
|
/* Possible value for gdbarch_displaced_step_location:
|
|
Place displaced instructions at the program's entry point,
|
|
leaving space for inferior function call return breakpoints. */
|
|
extern CORE_ADDR displaced_step_at_entry_point (struct gdbarch *gdbarch);
|
|
|
|
/* The only possible cases for inner_than. */
|
|
extern int core_addr_lessthan (CORE_ADDR lhs, CORE_ADDR rhs);
|
|
extern int core_addr_greaterthan (CORE_ADDR lhs, CORE_ADDR rhs);
|
|
|
|
/* Identity functions on a CORE_ADDR. Just return the "addr". */
|
|
|
|
extern CORE_ADDR core_addr_identity (struct gdbarch *gdbarch, CORE_ADDR addr);
|
|
extern gdbarch_convert_from_func_ptr_addr_ftype convert_from_func_ptr_addr_identity;
|
|
|
|
/* No-op conversion of reg to regnum. */
|
|
|
|
extern int no_op_reg_to_regnum (struct gdbarch *gdbarch, int reg);
|
|
|
|
/* Do nothing version of coff_make_msymbol_special. */
|
|
|
|
void default_coff_make_msymbol_special (int val, struct minimal_symbol *msym);
|
|
|
|
/* Do nothing default implementation of gdbarch_make_symbol_special. */
|
|
|
|
void default_make_symbol_special (struct symbol *sym, struct objfile *objfile);
|
|
|
|
/* Do nothing default implementation of gdbarch_adjust_dwarf2_addr. */
|
|
|
|
CORE_ADDR default_adjust_dwarf2_addr (CORE_ADDR pc);
|
|
|
|
/* Do nothing default implementation of gdbarch_adjust_dwarf2_line. */
|
|
|
|
CORE_ADDR default_adjust_dwarf2_line (CORE_ADDR addr, int rel);
|
|
|
|
/* Version of cannot_fetch_register() / cannot_store_register() that
|
|
always fails. */
|
|
|
|
int cannot_register_not (struct gdbarch *gdbarch, int regnum);
|
|
|
|
/* Legacy version of target_virtual_frame_pointer(). Assumes that
|
|
there is an gdbarch_deprecated_fp_regnum and that it is the same, cooked or
|
|
raw. */
|
|
|
|
extern gdbarch_virtual_frame_pointer_ftype legacy_virtual_frame_pointer;
|
|
|
|
extern CORE_ADDR generic_skip_trampoline_code (struct frame_info *frame,
|
|
CORE_ADDR pc);
|
|
|
|
extern CORE_ADDR generic_skip_solib_resolver (struct gdbarch *gdbarch,
|
|
CORE_ADDR pc);
|
|
|
|
extern int generic_in_solib_return_trampoline (struct gdbarch *gdbarch,
|
|
CORE_ADDR pc, const char *name);
|
|
|
|
extern int generic_in_function_epilogue_p (struct gdbarch *gdbarch,
|
|
CORE_ADDR pc);
|
|
|
|
/* By default, registers are not convertible. */
|
|
extern int generic_convert_register_p (struct gdbarch *gdbarch, int regnum,
|
|
struct type *type);
|
|
|
|
extern int default_stabs_argument_has_addr (struct gdbarch *gdbarch,
|
|
struct type *type);
|
|
|
|
extern int generic_instruction_nullified (struct gdbarch *gdbarch,
|
|
struct regcache *regcache);
|
|
|
|
int default_remote_register_number (struct gdbarch *gdbarch,
|
|
int regno);
|
|
|
|
/* For compatibility with older architectures, returns
|
|
(LEGACY_SIM_REGNO_IGNORE) when the register doesn't have a valid
|
|
name. */
|
|
|
|
extern int legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum);
|
|
|
|
/* Return the selected byte order, or BFD_ENDIAN_UNKNOWN if no byte
|
|
order was explicitly selected. */
|
|
extern enum bfd_endian selected_byte_order (void);
|
|
|
|
/* Return the selected architecture's name, or NULL if no architecture
|
|
was explicitly selected. */
|
|
extern const char *selected_architecture_name (void);
|
|
|
|
/* Initialize a ``struct info''. Can't use memset(0) since some
|
|
default values are not zero. "fill" takes all available
|
|
information and fills in any unspecified fields. */
|
|
|
|
extern void gdbarch_info_init (struct gdbarch_info *info);
|
|
|
|
/* Similar to init, but this time fill in the blanks. Information is
|
|
obtained from the global "set ..." options and explicitly
|
|
initialized INFO fields. */
|
|
extern void gdbarch_info_fill (struct gdbarch_info *info);
|
|
|
|
/* Return the architecture for ABFD. If no suitable architecture
|
|
could be find, return NULL. */
|
|
|
|
extern struct gdbarch *gdbarch_from_bfd (bfd *abfd);
|
|
|
|
/* Return "current" architecture. If the target is running, this is the
|
|
architecture of the selected frame. Otherwise, the "current" architecture
|
|
defaults to the target architecture.
|
|
|
|
This function should normally be called solely by the command interpreter
|
|
routines to determine the architecture to execute a command in. */
|
|
extern struct gdbarch *get_current_arch (void);
|
|
|
|
extern int default_has_shared_address_space (struct gdbarch *);
|
|
|
|
extern int default_fast_tracepoint_valid_at (struct gdbarch *gdbarch,
|
|
CORE_ADDR addr,
|
|
int *isize, char **msg);
|
|
|
|
extern void default_remote_breakpoint_from_pc (struct gdbarch *,
|
|
CORE_ADDR *pcptr, int *kindptr);
|
|
|
|
extern void default_gen_return_address (struct gdbarch *gdbarch,
|
|
struct agent_expr *ax,
|
|
struct axs_value *value,
|
|
CORE_ADDR scope);
|
|
|
|
extern const char *default_auto_charset (void);
|
|
extern const char *default_auto_wide_charset (void);
|
|
|
|
extern int default_return_in_first_hidden_param_p (struct gdbarch *,
|
|
struct type *);
|
|
|
|
extern int default_insn_is_call (struct gdbarch *, CORE_ADDR);
|
|
extern int default_insn_is_ret (struct gdbarch *, CORE_ADDR);
|
|
extern int default_insn_is_jump (struct gdbarch *, CORE_ADDR);
|
|
|
|
/* Do-nothing version of vsyscall_range. Returns false. */
|
|
|
|
extern int default_vsyscall_range (struct gdbarch *gdbarch, struct mem_range *range);
|
|
|
|
/* Default way to advance the PC to the next instruction in order to
|
|
skip a permanent breakpoint. Increments the PC by the size of a
|
|
software breakpoint instruction, as determined with
|
|
gdbarch_breakpoint_from_pc. This matches how the breakpoints
|
|
module determines whether a breakpoint is permanent. */
|
|
extern void default_skip_permanent_breakpoint (struct regcache *regcache);
|
|
|
|
#endif
|