42a4f53d2b
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
59 lines
2.0 KiB
C
59 lines
2.0 KiB
C
/* Register definitions for the FRV simulator
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Copyright (C) 2000-2019 Free Software Foundation, Inc.
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Contributed by Red Hat.
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This file is part of the GNU Simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef REGISTERS_H
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#define REGISTERS_H
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#define FRV_MAX_GR 64
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#define FRV_MAX_FR 64
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#define FRV_MAX_CPR 64
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#define FRV_MAX_SPR 4096
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/* Register init, reset values and read_only masks. */
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typedef struct
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{
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USI init_value; /* initial value */
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USI reset_value; /* value for software reset */
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USI reset_mask; /* bits which are reset */
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USI read_only_mask; /* bits which are read-only */
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char implemented; /* 1==register is implemented */
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char supervisor; /* 1==register is supervisor-only */
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} FRV_SPR_CONTROL_INFO;
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typedef struct
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{
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int fr; /* FR registers implemented */
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int cpr; /* coprocessor registers implemented */
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FRV_SPR_CONTROL_INFO *spr; /* SPR implementation details */
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} FRV_REGISTER_CONTROL;
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void frv_register_control_init (SIM_CPU *);
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void frv_initialize_spr (SIM_CPU *);
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void frv_reset_spr (SIM_CPU *);
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void frv_check_spr_access (SIM_CPU *, UINT);
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void frv_fr_registers_available (SIM_CPU *, int *, int *);
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void frv_gr_registers_available (SIM_CPU *, int *, int *);
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int frv_check_register_access (SIM_CPU *, SI, int, int);
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int frv_check_gr_access (SIM_CPU *, SI);
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int frv_check_fr_access (SIM_CPU *, SI);
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#endif /* REGISTERS_H */
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