22216541c1
This implements padding of orphan executable sections for PowerPC. Of course, the simple implementation of bfd_arch_ppc_nop_fill and removing the NOP definition didn't work, with powerpc64 hitting a testsuite failure linking to S-records. That's because the srec target is BFD_ENDIAN_UNKNOWN so the test of bfd_big_endian (abfd) in default_data_link_order therefore returned false, resulting in a little-endian nop pattern. The rest of the patch fixes that problem by adding a new field to bfd_link_info that can be used to determine actual endianness on targets like srec. PR 13616 include/ * bfdlink.h (struct bfd_link_info <big_endian>): New field. bfd/ * cpu-powerpc.c (bfd_arch_ppc_nop_fill): New function, use it for all ppc arch info. * linker.c (default_data_link_order): Pass info->big_endian to arch_info->fill function. ld/ * emulparams/elf64lppc.sh (NOP): Don't define. * emulparams/elf64ppc.sh (NOP): Don't define. * ldwrite.c (build_link_order): Use link_info.big_endian. Move code determining endian to use for data_statement to.. * ldemul.c (after_open_default): ..here. Set link_info.big_endian.
159 lines
5.5 KiB
C
159 lines
5.5 KiB
C
/* BFD PowerPC CPU definition
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Copyright (C) 1994-2019 Free Software Foundation, Inc.
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Contributed by Ian Lance Taylor, Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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/* The common PowerPC architecture is compatible with the RS/6000. */
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static const bfd_arch_info_type *
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powerpc_compatible (const bfd_arch_info_type *a,
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const bfd_arch_info_type *b)
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{
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BFD_ASSERT (a->arch == bfd_arch_powerpc);
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switch (b->arch)
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{
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default:
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return NULL;
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case bfd_arch_powerpc:
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if (a->mach == bfd_mach_ppc_vle && b->bits_per_word == 32)
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return a;
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if (b->mach == bfd_mach_ppc_vle && a->bits_per_word == 32)
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return b;
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return bfd_default_compatible (a, b);
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case bfd_arch_rs6000:
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if (b->mach == bfd_mach_rs6k)
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return a;
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return NULL;
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}
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/*NOTREACHED*/
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}
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/* Return a COUNT sized buffer filled with nops (if CODE is TRUE) or
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zeros (if CODE is FALSE). This is the fill used between input
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sections for alignment. It won't normally be executed. */
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static void *
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bfd_arch_ppc_nop_fill (bfd_size_type count,
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bfd_boolean is_bigendian,
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bfd_boolean code)
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{
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bfd_byte *fill;
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if (count == 0)
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return NULL;
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fill = bfd_malloc (count);
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if (fill == NULL)
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return fill;
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if (code && (count & 3) == 0)
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{
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static const char nop_be[4] = {0x60, 0, 0, 0};
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static const char nop_le[4] = {0, 0, 0, 0x60};
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const char *nop = is_bigendian ? nop_be : nop_le;
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bfd_byte *p = fill;
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while (count != 0)
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{
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memcpy (p, nop, 4);
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p += 4;
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count -= 4;
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}
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}
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else
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memset (fill, 0, count);
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return fill;
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}
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#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
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{ \
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BITS, /* Bits in a word. */ \
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BITS, /* Bits in an address. */ \
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8, /* Bits in a byte. */ \
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bfd_arch_powerpc, \
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NUMBER, \
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"powerpc", \
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PRINT, \
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3, /* Section alignment power. */ \
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DEFAULT, \
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powerpc_compatible, \
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bfd_default_scan, \
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bfd_arch_ppc_nop_fill, \
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NEXT, \
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0 /* Maximum offset of a reloc from the start of an insn. */ \
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}
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const bfd_arch_info_type bfd_powerpc_archs[] =
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{
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#if BFD_DEFAULT_TARGET_SIZE == 64
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/* Default for 64 bit target. */
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N (64, bfd_mach_ppc64, "powerpc:common64", TRUE, bfd_powerpc_archs + 1),
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/* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch
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being immediately after the 64 bit default. */
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N (32, bfd_mach_ppc, "powerpc:common", FALSE, bfd_powerpc_archs + 2),
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#else
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/* Default arch must come first. */
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N (32, bfd_mach_ppc, "powerpc:common", TRUE, bfd_powerpc_archs + 1),
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/* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch
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being immediately after the 32 bit default. */
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N (64, bfd_mach_ppc64, "powerpc:common64", FALSE, bfd_powerpc_archs + 2),
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#endif
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N (32, bfd_mach_ppc_603, "powerpc:603", FALSE, bfd_powerpc_archs + 3),
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N (32, bfd_mach_ppc_ec603e, "powerpc:EC603e", FALSE, bfd_powerpc_archs + 4),
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N (32, bfd_mach_ppc_604, "powerpc:604", FALSE, bfd_powerpc_archs + 5),
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N (32, bfd_mach_ppc_403, "powerpc:403", FALSE, bfd_powerpc_archs + 6),
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N (32, bfd_mach_ppc_601, "powerpc:601", FALSE, bfd_powerpc_archs + 7),
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N (64, bfd_mach_ppc_620, "powerpc:620", FALSE, bfd_powerpc_archs + 8),
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N (64, bfd_mach_ppc_630, "powerpc:630", FALSE, bfd_powerpc_archs + 9),
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N (64, bfd_mach_ppc_a35, "powerpc:a35", FALSE, bfd_powerpc_archs + 10),
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N (64, bfd_mach_ppc_rs64ii, "powerpc:rs64ii", FALSE, bfd_powerpc_archs + 11),
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N (64, bfd_mach_ppc_rs64iii, "powerpc:rs64iii", FALSE, bfd_powerpc_archs + 12),
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N (32, bfd_mach_ppc_7400, "powerpc:7400", FALSE, bfd_powerpc_archs + 13),
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N (32, bfd_mach_ppc_e500, "powerpc:e500", FALSE, bfd_powerpc_archs + 14),
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N (32, bfd_mach_ppc_e500mc, "powerpc:e500mc", FALSE, bfd_powerpc_archs + 15),
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N (64, bfd_mach_ppc_e500mc64, "powerpc:e500mc64",FALSE, bfd_powerpc_archs + 16),
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N (32, bfd_mach_ppc_860, "powerpc:MPC8XX", FALSE, bfd_powerpc_archs + 17),
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N (32, bfd_mach_ppc_750, "powerpc:750", FALSE, bfd_powerpc_archs + 18),
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N (32, bfd_mach_ppc_titan, "powerpc:titan", FALSE, bfd_powerpc_archs + 19),
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{
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16, /* Bits in a word. */
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32, /* Bits in an address. */
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8, /* Bits in a byte. */
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bfd_arch_powerpc,
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bfd_mach_ppc_vle,
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"powerpc",
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"powerpc:vle",
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3,
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FALSE, /* Not the default. */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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bfd_powerpc_archs + 20,
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0 /* Maximum offset of a reloc from the start of an insn. */
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},
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N (64, bfd_mach_ppc_e5500, "powerpc:e5500", FALSE, bfd_powerpc_archs + 21),
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N (64, bfd_mach_ppc_e6500, "powerpc:e6500", FALSE, NULL)
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};
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