657 lines
14 KiB
C
657 lines
14 KiB
C
/* Disassemble AVR instructions.
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Copyright (C) 1999, 2000 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opintl.h"
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned long u32;
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#define IFMASK(a,b) ((opcode & (a)) == (b))
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static char* SREG_flags = "CZNVSHTI";
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static char* sect94[] = {"COM","NEG","SWAP","INC",0,"ASR","LSR","ROR",
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0,0,"DEC",0,0,0,0,0};
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static char* sect98[] = {"CBI","SBIC","SBI","SBIS"};
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static char* branchs[] = {
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"BRCS","BREQ","BRMI","BRVS",
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"BRLT","BRHS","BRTS","BRIE",
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"BRCC","BRNE","BRPL","BRVC",
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"BRGE","BRHC","BRTC","BRID"
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};
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static char* last4[] = {"BLD","BST","SBRC","SBRS"};
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static void dispLDD PARAMS ((u16, char *));
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static void
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dispLDD (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = (((opcode & 0x2000) >> 8) | ((opcode & 0x0c00) >> 7)
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| (opcode & 7));
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sprintf(dest, "%d", opcode);
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}
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static void regPP PARAMS ((u16, char *));
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static void
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regPP (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = ((opcode & 0x0600) >> 5) | (opcode & 0xf);
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sprintf(dest, "0x%02X", opcode);
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}
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static void reg50 PARAMS ((u16, char *));
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static void
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reg50 (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = (opcode & 0x01f0) >> 4;
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sprintf(dest, "R%d", opcode);
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}
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static void reg104 PARAMS ((u16, char *));
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static void
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reg104 (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = (opcode & 0xf) | ((opcode & 0x0200) >> 5);
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sprintf(dest, "R%d", opcode);
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}
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static void reg40 PARAMS ((u16, char *));
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static void
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reg40 (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = (opcode & 0xf0) >> 4;
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sprintf(dest, "R%d", opcode + 16);
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}
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static void reg20w PARAMS ((u16, char *));
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static void
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reg20w (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = (opcode & 0x30) >> 4;
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sprintf(dest, "R%d", 24 + opcode * 2);
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}
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static void reg_fmul_d PARAMS ((u16, char *));
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static void
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reg_fmul_d (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 16 + ((opcode >> 4) & 7));
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}
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static void reg_fmul_r PARAMS ((u16, char *));
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static void
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reg_fmul_r (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 16 + (opcode & 7));
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}
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static void reg_muls_d PARAMS ((u16, char *));
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static void
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reg_muls_d (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 16 + ((opcode >> 4) & 0xf));
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}
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static void reg_muls_r PARAMS ((u16, char *));
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static void
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reg_muls_r (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 16 + (opcode & 0xf));
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}
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static void reg_movw_d PARAMS ((u16, char *));
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static void
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reg_movw_d (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 2 * ((opcode >> 4) & 0xf));
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}
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static void reg_movw_r PARAMS ((u16, char *));
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static void
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reg_movw_r (opcode, dest)
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u16 opcode;
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char *dest;
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{
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sprintf(dest, "R%d", 2 * (opcode & 0xf));
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}
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static void lit404 PARAMS ((u16, char *));
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static void
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lit404 (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = ((opcode & 0xf00) >> 4) | (opcode & 0xf);
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sprintf(dest, "0x%02X", opcode);
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}
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static void lit204 PARAMS ((u16, char *));
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static void
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lit204 (opcode, dest)
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u16 opcode;
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char *dest;
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{
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opcode = ((opcode & 0xc0) >> 2) | (opcode & 0xf);
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sprintf(dest, "0x%02X", opcode);
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}
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static void add0fff PARAMS ((u16, char *, int));
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static void
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add0fff (op, dest, pc)
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u16 op;
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char *dest;
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int pc;
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{
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int rel_addr = (((op & 0xfff) ^ 0x800) - 0x800) * 2;
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sprintf(dest, ".%+-8d ; 0x%06X", rel_addr, pc + 2 + rel_addr);
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}
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static void add03f8 PARAMS ((u16, char *, int));
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static void
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add03f8 (op, dest, pc)
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u16 op;
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char *dest;
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int pc;
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{
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int rel_addr = ((((op >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
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sprintf(dest, ".%+-8d ; 0x%06X", rel_addr, pc + 2 + rel_addr);
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}
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static u16 avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
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static u16
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avrdis_opcode (addr, info)
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bfd_vma addr;
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disassemble_info *info;
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{
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bfd_byte buffer[2];
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int status;
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status = info->read_memory_func(addr, buffer, 2, info);
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if (status != 0)
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{
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info->memory_error_func(status, addr, info);
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return -1;
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}
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return bfd_getl16 (buffer);
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}
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int
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print_insn_avr(addr, info)
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bfd_vma addr;
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disassemble_info *info;
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{
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char rr[200];
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char rd[200];
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u16 opcode;
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void *stream = info->stream;
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fprintf_ftype prin = info->fprintf_func;
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int cmd_len = 2;
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opcode = avrdis_opcode (addr, info);
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if (IFMASK(0xd000, 0x8000))
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{
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char letter;
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reg50(opcode, rd);
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dispLDD(opcode, rr);
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if (opcode & 8)
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letter = 'Y';
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else
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letter = 'Z';
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if (opcode & 0x0200)
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(*prin) (stream, " STD %c+%s,%s", letter, rr, rd);
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else
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(*prin) (stream, " LDD %s,%c+%s", rd, letter, rr);
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}
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else
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{
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switch (opcode & 0xf000)
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{
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case 0x0000:
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{
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reg50(opcode, rd);
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reg104(opcode, rr);
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switch (opcode & 0x0c00)
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{
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case 0x0000:
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switch (opcode & 0x0300)
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{
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case 0x0000:
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(*prin) (stream, " NOP");
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break;
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case 0x0100:
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reg_movw_d(opcode, rd);
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reg_movw_r(opcode, rr);
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(*prin) (stream, " MOVW %s,%s", rd, rr);
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break;
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case 0x0200:
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reg_muls_d(opcode, rd);
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reg_muls_r(opcode, rr);
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(*prin) (stream, " MULS %s,%s", rd, rr);
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break;
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case 0x0300:
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reg_fmul_d(opcode, rd);
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reg_fmul_r(opcode, rr);
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if (IFMASK(0x88, 0))
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(*prin) (stream, " MULSU %s,%s", rd, rr);
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else if (IFMASK(0x88, 8))
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(*prin) (stream, " FMUL %s,%s", rd, rr);
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else if (IFMASK(0x88, 0x80))
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(*prin) (stream, " FMULS %s,%s", rd, rr);
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else
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(*prin) (stream, " FMULSU %s,%s", rd, rr);
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}
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break;
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case 0x0400:
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(*prin) (stream, " CPC %s,%s", rd, rr);
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break;
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case 0x0800:
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(*prin) (stream, " SBC %s,%s", rd, rr);
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break;
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case 0x0c00:
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(*prin) (stream, " ADD %s,%s", rd, rr);
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break;
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}
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}
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break;
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case 0x1000:
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{
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reg50(opcode, rd);
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reg104(opcode, rr);
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switch (opcode & 0x0c00)
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{
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case 0x0000:
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(*prin) (stream, " CPSE %s,%s", rd, rr);
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break;
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case 0x0400:
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(*prin) (stream, " CP %s,%s", rd, rr);
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break;
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case 0x0800:
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(*prin) (stream, " SUB %s,%s", rd, rr);
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break;
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case 0x0c00:
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(*prin) (stream, " ADC %s,%s", rd, rr);
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break;
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}
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}
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break;
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case 0x2000:
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{
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reg50(opcode, rd);
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reg104(opcode, rr);
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switch (opcode & 0x0c00)
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{
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case 0x0000:
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(*prin) (stream, " AND %s,%s", rd, rr);
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break;
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case 0x0400:
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(*prin) (stream, " EOR %s,%s", rd, rr);
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break;
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case 0x0800:
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(*prin) (stream, " OR %s,%s", rd, rr);
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break;
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case 0x0c00:
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(*prin) (stream, " MOV %s,%s", rd, rr);
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break;
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}
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}
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break;
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case 0x3000:
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{
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reg40(opcode, rd);
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lit404(opcode, rr);
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(*prin) (stream, " CPI %s,%s", rd, rr);
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}
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break;
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case 0x4000:
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{
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reg40(opcode, rd);
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lit404(opcode, rr);
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(*prin) (stream, " SBCI %s,%s", rd, rr);
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}
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break;
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case 0x5000:
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{
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reg40(opcode, rd);
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lit404(opcode, rr);
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(*prin) (stream, " SUBI %s,%s", rd, rr);
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}
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break;
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case 0x6000:
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{
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reg40(opcode, rd);
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lit404(opcode, rr);
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(*prin) (stream, " ORI %s,%s", rd, rr);
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}
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break;
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case 0x7000:
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{
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reg40(opcode, rd);
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lit404(opcode, rr);
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(*prin) (stream, " ANDI %s,%s", rd, rr);
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}
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break;
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case 0x9000:
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{
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switch (opcode & 0x0e00)
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{
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case 0x0000:
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{
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reg50(opcode, rd);
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switch (opcode & 0xf)
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{
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case 0x0:
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{
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(*prin) (stream, " LDS %s,0x%04X", rd,
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avrdis_opcode(addr + 2, info));
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cmd_len = 4;
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}
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break;
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case 0x1:
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(*prin) (stream, " LD %s,Z+", rd);
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break;
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case 0x2:
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(*prin) (stream, " LD %s,-Z", rd);
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break;
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case 0x4:
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(*prin) (stream, " LPM %s,Z", rd);
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break;
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case 0x5:
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(*prin) (stream, " LPM %s,Z+", rd);
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break;
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case 0x6:
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(*prin) (stream, " ELPM %s,Z", rd);
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break;
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case 0x7:
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(*prin) (stream, " ELPM %s,Z+", rd);
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break;
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case 0x9:
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(*prin) (stream, " LD %s,Y+", rd);
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break;
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case 0xa:
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(*prin) (stream, " LD %s,-Y", rd);
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break;
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case 0xc:
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(*prin) (stream, " LD %s,X", rd);
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break;
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case 0xd:
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(*prin) (stream, " LD %s,X+", rd);
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break;
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case 0xe:
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(*prin) (stream, " LD %s,-X", rd);
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break;
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case 0xf:
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(*prin) (stream, " POP %s", rd);
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break;
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default:
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(*prin) (stream, " ????");
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break;
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}
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}
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break;
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case 0x0200:
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{
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reg50(opcode, rd);
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switch (opcode & 0xf)
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{
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case 0x0:
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{
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(*prin) (stream, " STS 0x%04X,%s",
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avrdis_opcode(addr + 2, info), rd);
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cmd_len = 4;
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}
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break;
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case 0x1:
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(*prin) (stream, " ST Z+,%s", rd);
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break;
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case 0x2:
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(*prin) (stream, " ST -Z,%s", rd);
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break;
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case 0x9:
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(*prin) (stream, " ST Y+,%s", rd);
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break;
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case 0xa:
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(*prin) (stream, " ST -Y,%s", rd);
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break;
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case 0xc:
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(*prin) (stream, " ST X,%s", rd);
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break;
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case 0xd:
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(*prin) (stream, " ST X+,%s", rd);
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break;
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case 0xe:
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(*prin) (stream, " ST -X,%s", rd);
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break;
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case 0xf:
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(*prin) (stream, " PUSH %s", rd);
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break;
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default:
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(*prin) (stream, " ????");
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break;
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}
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}
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break;
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case 0x0400:
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{
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if (IFMASK(0x020c, 0x000c))
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{
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u32 k = ((opcode & 0x01f0) >> 3) | (opcode & 1);
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k = (k << 16) | avrdis_opcode(addr + 2, info);
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if (opcode & 0x0002)
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(*prin) (stream, " CALL 0x%06X", k*2);
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else
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(*prin) (stream, " JMP 0x%06X", k*2);
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cmd_len = 4;
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}
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else if (IFMASK(0x010f, 0x0008))
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{
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int sf = (opcode & 0x70) >> 4;
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if (opcode & 0x0080)
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(*prin) (stream, " CL%c", SREG_flags[sf]);
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else
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(*prin) (stream, " SE%c", SREG_flags[sf]);
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}
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else if (IFMASK(0x001f, 0x0009))
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{
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if (opcode & 0x0100)
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(*prin) (stream, " ICALL");
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else
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(*prin) (stream, " IJMP");
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}
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else if (IFMASK(0x001f, 0x0019))
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{
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if (opcode & 0x0100)
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(*prin) (stream, " EICALL");
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else
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(*prin) (stream, " EIJMP");
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}
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else if (IFMASK(0x010f, 0x0108))
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{
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if (IFMASK(0x0090, 0x0000))
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(*prin) (stream, " RET");
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else if (IFMASK(0x0090, 0x0010))
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(*prin) (stream, " RETI");
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else if (IFMASK(0x00e0, 0x0080))
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(*prin) (stream, " SLEEP");
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else if (IFMASK(0x00e0, 0x00a0))
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(*prin) (stream, " WDR");
|
|
else if (IFMASK(0x00f0, 0x00c0))
|
|
(*prin) (stream, " LPM");
|
|
else if (IFMASK(0x00f0, 0x00d0))
|
|
(*prin) (stream, " ELPM");
|
|
else if (IFMASK(0x00f0, 0x00e0))
|
|
(*prin) (stream, " SPM");
|
|
else if (IFMASK(0x00f0, 0x00f0))
|
|
(*prin) (stream, " ESPM");
|
|
else
|
|
(*prin) (stream, " ????");
|
|
}
|
|
else
|
|
{
|
|
const char* p;
|
|
reg50(opcode, rd);
|
|
p = sect94[opcode & 0xf];
|
|
if (!p)
|
|
p = "????";
|
|
(*prin) (stream, " %-8s%s", p, rd);
|
|
}
|
|
}
|
|
break;
|
|
case 0x0600:
|
|
{
|
|
if (opcode & 0x0200)
|
|
{
|
|
lit204(opcode, rd);
|
|
reg20w(opcode, rr);
|
|
if (opcode & 0x0100)
|
|
(*prin) (stream, " SBIW %s,%s", rr, rd);
|
|
else
|
|
(*prin) (stream, " ADIW %s,%s", rr, rd);
|
|
}
|
|
}
|
|
break;
|
|
case 0x0800:
|
|
case 0x0a00:
|
|
{
|
|
(*prin) (stream, " %-8s0x%02X,%d",
|
|
sect98[(opcode & 0x0300) >> 8],
|
|
(opcode & 0xf8) >> 3,
|
|
opcode & 7);
|
|
}
|
|
break;
|
|
default:
|
|
{
|
|
reg50(opcode, rd);
|
|
reg104(opcode, rr);
|
|
(*prin) (stream, " MUL %s,%s", rd, rr);
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
case 0xb000:
|
|
{
|
|
reg50(opcode, rd);
|
|
regPP(opcode, rr);
|
|
if (opcode & 0x0800)
|
|
(*prin) (stream, " OUT %s,%s", rr, rd);
|
|
else
|
|
(*prin) (stream, " IN %s,%s", rd, rr);
|
|
}
|
|
break;
|
|
case 0xc000:
|
|
{
|
|
add0fff(opcode, rd, addr);
|
|
(*prin) (stream, " RJMP %s", rd);
|
|
}
|
|
break;
|
|
case 0xd000:
|
|
{
|
|
add0fff(opcode, rd, addr);
|
|
(*prin) (stream, " RCALL %s", rd);
|
|
}
|
|
break;
|
|
case 0xe000:
|
|
{
|
|
reg40(opcode, rd);
|
|
lit404(opcode, rr);
|
|
(*prin) (stream, " LDI %s,%s", rd, rr);
|
|
}
|
|
break;
|
|
case 0xf000:
|
|
{
|
|
if (opcode & 0x0800)
|
|
{
|
|
reg50(opcode, rd);
|
|
(*prin) (stream, " %-8s%s,%d",
|
|
last4[(opcode & 0x0600) >> 9],
|
|
rd, opcode & 7);
|
|
}
|
|
else
|
|
{
|
|
char* p;
|
|
add03f8(opcode, rd, addr);
|
|
p = branchs[((opcode & 0x0400) >> 7) | (opcode & 7)];
|
|
(*prin) (stream, " %-8s%s", p, rd);
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
return cmd_len;
|
|
}
|