binutils-gdb/gas/doc
Andrew Waterman 2922d21da1 Re-work RISC-V gas flags: now we just support -mabi and -march
We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI.  We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.

Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive.  Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.

This patch implements these two new flags and removes the old flags that
could conflict with these.  There wasn't a RISC-V release before, so we
want to just support a clean flag set.

include/
	* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
	(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
	(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
	(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
	EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
	* readelf.c (get_machine_flags): Use
	EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
	EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
	* config/tc-riscv.h (xlen): Delete.
	* config/tc-riscv.c (xlen): Make static.
	(abi_xlen): New variable.
	(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
	with OPTION_MABI.
	(md_longopts): Likewise.
	(md_parse_option): Likewise.
	(riscv_elf_final_processing): Likewise.
	* doc/as.texinfo (Target RISC-V options): Likewise.
	* doc/c-riscv.texi (OPTIONS): Likewise.
	* config/tc-riscv.c (float_mode): Removed.
	(float_abi): New type, specifies the floating-point ABI.
	(riscv_set_abi): New function.
	(riscv_add_subset): Only allow lower-case ISA names and require
	them to start with "rv".
	(riscv_after_parse_args): Likewise.
opcodes/
	* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
	XLEN when none is provided.
2016-12-20 12:26:34 +10:30
..
all.texi Update RISC-V documentation and make sure that it is included in the gas info file. 2016-11-04 14:18:06 +00:00
as.texinfo Re-work RISC-V gas flags: now we just support -mabi and -march 2016-12-20 12:26:34 +10:30
c-aarch64.texi [AArch64] Add ARMv8.3 command line option and feature flag 2016-11-11 10:20:30 +00:00
c-alpha.texi
c-arc.texi [ARC] Sync cpu names with the ones accepted by GCC. 2016-12-02 16:30:00 +01:00
c-arm.texi [ARM] Add ARMv8.3 command line option and feature flag 2016-12-05 14:07:25 +00:00
c-avr.texi
c-bfin.texi
c-cr16.texi
c-cris.texi
c-d10v.texi
c-d30v.texi
c-epiphany.texi
c-h8300.texi
c-hppa.texi
c-i370.texi
c-i386.texi Enable Intel AVX512_4VNNIW instructions 2016-11-02 12:31:25 -07:00
c-i860.texi
c-i960.texi
c-ia64.texi
c-ip2k.texi
c-lm32.texi
c-m32c.texi
c-m32r.texi
c-m68hc11.texi
c-m68k.texi
c-metag.texi
c-microblaze.texi
c-mips.texi
c-mmix.texi
c-msp430.texi
c-mt.texi
c-nds32.texi
c-nios2.texi
c-ns32k.texi
c-pdp11.texi
c-pj.texi
c-ppc.texi
c-riscv.texi Re-work RISC-V gas flags: now we just support -mabi and -march 2016-12-20 12:26:34 +10:30
c-rl78.texi
c-rx.texi
c-s390.texi
c-score.texi
c-sh64.texi
c-sh.texi
c-sparc.texi gas: detect DCTI couples in sparc 2016-09-14 07:10:49 -07:00
c-tic6x.texi
c-tic54x.texi
c-tilegx.texi
c-tilepro.texi
c-v850.texi
c-vax.texi
c-visium.texi
c-xc16x.texi
c-xgate.texi
c-xstormy16.texi
c-xtensa.texi
c-z8k.texi
c-z80.texi
fdl.texi
h8.texi
internals.texi
Makefile.am Update RISC-V documentation and make sure that it is included in the gas info file. 2016-11-04 14:18:06 +00:00
Makefile.in Use ACX_PROG_CMP_IGNORE_INITIAL in gas 2016-11-21 21:12:37 +10:30