..
ilp32
x86-64: Zero-extend lower 32 bits displacement to 64 bits
2020-07-15 07:18:45 -07:00
solaris
gas: Fix some x86_64 testcases for Solaris not using R_X86_64_PLT32 [PR25732]
2020-04-01 14:10:34 +02:00
287.d
gas/
2009-07-24 15:41:20 +00:00
287.s
gas/
2009-07-24 15:41:20 +00:00
387.d
gas/
2009-07-24 15:41:20 +00:00
387.s
gas/
2009-07-24 15:41:20 +00:00
8087.d
gas/
2009-07-24 15:41:20 +00:00
8087.s
gas/
2009-07-24 15:41:20 +00:00
absrel.d
…
absrel.s
…
addend.d
Preserve addend for R_386_GOT32 and R_X86_64_GOT32
2016-05-20 06:01:28 -07:00
addend.s
Preserve addend for R_386_GOT32 and R_X86_64_GOT32
2016-05-20 06:01:28 -07:00
addr16.d
gas/
2006-09-23 23:10:14 +00:00
addr16.s
gas/
2006-09-23 23:10:14 +00:00
addr32.d
x86-64: Zero-extend lower 32 bits displacement to 64 bits
2020-07-15 07:18:45 -07:00
addr32.s
x86-64: Zero-extend lower 32 bits displacement to 64 bits
2020-07-15 07:18:45 -07:00
adx-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
adx.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
adx.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
aes-intel.d
binutils/
2008-04-03 14:03:21 +00:00
aes.d
binutils/
2008-04-03 14:03:21 +00:00
aes.s
binutils/
2008-04-03 14:03:21 +00:00
align-1.s
x86: Add tests for -n option of x86 assembler
2017-11-21 16:44:29 -08:00
align-1a.d
x86: Add tests for -n option of x86 assembler
2017-11-21 16:44:29 -08:00
align-1b.d
x86: Add tests for -n option of x86 assembler
2017-11-21 16:44:29 -08:00
align-branch-1.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-1a.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1b.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1c.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1d.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1e.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1f.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1g.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1h.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-1i.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-2.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-2a.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-2b.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-2c.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-3.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-3.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-4.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-4a.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-4b.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-5.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
align-branch-5.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-6.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-6.e
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-6.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-7.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-7.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-8.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-8.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
align-branch-9.d
gas: Adjust x86 tests for PECOFF
2020-05-26 14:18:08 -07:00
align-branch-9.s
x86: Improve -malign-branch
2020-03-03 06:21:37 -08:00
amd.d
gas/testsuite/
2008-08-12 21:44:56 +00:00
amd.s
gas/testsuite/
2008-08-12 21:44:56 +00:00
amdfam10.d
gas/
2007-09-12 07:31:47 +00:00
amdfam10.s
gas/
2007-09-12 07:31:47 +00:00
arch-1.d
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-1.s
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-2.d
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-2.s
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-3.d
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-3.s
gas/testsuite/
2007-12-28 16:04:41 +00:00
arch-4.d
x86: correct UDn
2017-11-23 10:59:48 +01:00
arch-4.s
x86: correct UDn
2017-11-23 10:59:48 +01:00
arch-5.d
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-5.s
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-6.d
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-6.s
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-7.d
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-7.s
gas/testsuite/
2008-01-03 05:29:53 +00:00
arch-9.d
gas/
2008-01-04 01:05:45 +00:00
arch-9.s
gas/
2008-01-04 01:05:45 +00:00
arch-10-1.l
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-10-1.s
gas/
2008-01-22 19:16:45 +00:00
arch-10-2.l
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-10-2.s
gas/
2008-01-22 19:16:45 +00:00
arch-10-3.l
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-10-3.s
gas/
2008-01-22 19:16:45 +00:00
arch-10-4.l
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-10-4.s
gas/
2008-01-22 19:16:45 +00:00
arch-10-bdver1.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
arch-10-bdver2.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
arch-10-bdver3.d
Add AMD bdver3 support.
2012-10-09 08:43:06 +00:00
arch-10-bdver4.d
Add AMD bdver4 support.
2013-09-30 17:02:07 +00:00
arch-10-btver1.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
arch-10-btver2.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
arch-10-lzcnt.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-10-prefetchw.d
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
arch-10.d
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
arch-10.s
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
arch-11.d
gas/
2008-01-22 19:57:30 +00:00
arch-11.s
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
arch-12.d
gas/
2008-01-22 19:57:30 +00:00
arch-12.s
gas/
2008-01-22 19:57:30 +00:00
arch-13-znver1.d
x86: support VMGEXIT
2020-03-04 08:58:13 +01:00
arch-13-znver2.d
x86: support VMGEXIT
2020-03-04 08:58:13 +01:00
arch-13.d
x86: also test alternative VMGEXIT encoding
2020-06-18 04:58:27 -07:00
arch-13.s
x86: also test alternative VMGEXIT encoding
2020-06-18 04:58:27 -07:00
arch-avx-1-1.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-1.s
gas/
2008-08-20 18:38:40 +00:00
arch-avx-1-2.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-2.s
gas/
2008-08-20 18:38:40 +00:00
arch-avx-1-3.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-3.s
gas/
2009-02-04 16:03:31 +00:00
arch-avx-1-4.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-4.s
gas/
2009-02-04 16:03:31 +00:00
arch-avx-1-5.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-5.s
gas/
2009-02-04 16:03:31 +00:00
arch-avx-1-6.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-6.s
gas/
2009-02-04 16:03:31 +00:00
arch-avx-1-7.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-7.s
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-8.l
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1-8.s
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1.d
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
arch-avx-1.s
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
2018-03-08 08:47:32 +01:00
att-regs.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
att-regs.s
2009-09-01 H.J. Lu <hongjiu.lu@intel.com>
2009-09-01 23:59:10 +00:00
avx-16bit.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
avx-16bit.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
avx-gather-intel.d
Update AVX tests.
2011-08-19 19:27:53 +00:00
avx-gather.d
Update AVX tests.
2011-08-19 19:27:53 +00:00
avx-gather.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx-intel.d
x86: use template for AVX/AVX512 floating point comparison insns
2020-03-09 10:13:43 +01:00
avx-scalar-2.d
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
avx-scalar-2.s
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
avx-scalar-intel.d
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
avx-scalar.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
avx-scalar.s
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
avx-wig.d
x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode
2018-11-06 11:44:31 +01:00
avx-wig.s
x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode
2018-11-06 11:44:31 +01:00
avx.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
avx.s
x86: use template for AVX/AVX512 floating point comparison insns
2020-03-09 10:13:43 +01:00
avx2-intel.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx2-wig.d
x86: add more VexWIG
2018-11-06 11:39:42 +01:00
avx2-wig.s
x86: add more VexWIG
2018-11-06 11:39:42 +01:00
avx2.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx2.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx256int-intel.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx256int.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx256int.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
avx512_4fmaps-intel.d
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
avx512_4fmaps-warn.l
x86: adjust 4-XMM-register-group related warning
2018-03-08 08:27:28 +01:00
avx512_4fmaps-warn.s
Remove VL variants for 4FMAPS and 4VNNIW insns.
2018-01-11 03:09:47 +03:00
avx512_4fmaps.d
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
avx512_4fmaps.s
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
avx512_4vnniw-intel.d
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
avx512_4vnniw.d
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
avx512_4vnniw.s
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
avx512_bf16.d
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
avx512_bf16.s
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
avx512_bf16_vl-inval.l
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
avx512_bf16_vl-inval.s
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
avx512_bf16_vl.d
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-21 08:25:31 +01:00
avx512_bf16_vl.s
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-21 08:25:31 +01:00
avx512_vpopcntdq-intel.d
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512_vpopcntdq.d
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512_vpopcntdq.s
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512bitalg-intel.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
avx512bitalg.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
avx512bitalg.s
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
avx512bitalg_vl-intel.d
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512bitalg_vl.d
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512bitalg_vl.s
x86: drop VecESize
2018-03-28 14:25:07 +02:00
avx512bw-intel.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
avx512bw-opts-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw-opts.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw-opts.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw-wig.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw-wig1-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw-wig1.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
avx512bw.s
x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10 14:53:05 +01:00
avx512bw_vl-intel.d
x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10 14:53:05 +01:00
avx512bw_vl-opts-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl-opts.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl-opts.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl-wig.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl-wig1-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl-wig1.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
avx512bw_vl.d
x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10 14:53:05 +01:00
avx512bw_vl.s
x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10 14:53:05 +01:00
avx512cd-intel.d
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
avx512cd.d
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
avx512cd.s
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
avx512cd_vl-intel.d
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
avx512cd_vl.d
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
avx512cd_vl.s
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
avx512dq-intel.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512dq-inval.l
x86/Intel: improve diagnostics for ambiguous VCVT* operands
2020-02-17 08:56:18 +01:00
avx512dq-inval.s
x86/Intel: improve diagnostics for ambiguous VCVT* operands
2020-02-17 08:56:18 +01:00
avx512dq-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512dq.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512dq.s
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512dq_vl-intel.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512dq_vl.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512dq_vl.s
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
avx512er-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512er-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512er.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512er.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512f-16bit.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
avx512f-16bit.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
avx512f-intel.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
avx512f-nondef.d
Update x86 gas tests for mingw
2013-11-18 14:37:23 -08:00
avx512f-nondef.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512f-opts-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512f-opts.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512f-opts.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
avx512f-plain.l
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
avx512f-plain.s
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
avx512f-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
avx512f-ymm.d
x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
2018-04-26 08:48:01 +02:00
avx512f-ymm.s
x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
2018-04-26 08:48:01 +02:00
avx512f.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
avx512f.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
avx512f_gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512f_gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512f_gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512f_vaes-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512f_vaes-wig.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512f_vaes-wig1-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512f_vaes-wig1.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512f_vaes.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512f_vaes.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512f_vl-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-opts-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-opts.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-opts.s
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-wig.s
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-wig1-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl-wig1.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
avx512f_vl.d
x86: disambiguate disassembly of certain AVX512 insns
2015-04-23 16:42:40 +02:00
avx512f_vl.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
avx512f_vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512f_vpclmulqdq-wig.s
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512f_vpclmulqdq-wig1-intel.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512f_vpclmulqdq-wig1.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512f_vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512f_vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512ifma-intel.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512ifma.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512ifma.s
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512ifma_vl-intel.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512ifma_vl.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512ifma_vl.s
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
avx512pf-intel.d
Fix memory size for gather/scatter instructions
2014-03-20 08:13:30 -07:00
avx512pf.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
avx512pf.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
avx512vbmi-intel.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vbmi.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vbmi.s
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vbmi2-intel.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi2.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi2.s
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi2_vl-intel.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi2_vl.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi2_vl.s
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
avx512vbmi_vl-intel.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vbmi_vl.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vbmi_vl.s
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
avx512vl-1.l
Require another match for AVX512VL
2016-05-25 15:04:47 -07:00
avx512vl-1.s
Require another match for AVX512VL
2016-05-25 15:04:47 -07:00
avx512vl-2.l
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
avx512vl-2.s
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
avx512vl-ambig.l
x86/Intel: improve diagnostics for ambiguous VCVT* operands
2020-02-17 08:56:18 +01:00
avx512vl-ambig.s
x86/Intel: improve diagnostics for ambiguous VCVT* operands
2020-02-17 08:56:18 +01:00
avx512vl-plain.l
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
avx512vl-plain.s
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
avx512vl_gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512vl_gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512vl_gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
avx512vl_vaes-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512vl_vaes-wig.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512vl_vaes-wig1-intel.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512vl_vaes-wig1.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512vl_vaes.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
avx512vl_vaes.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
avx512vl_vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512vl_vpclmulqdq-wig.s
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512vl_vpclmulqdq-wig1-intel.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512vl_vpclmulqdq-wig1.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
avx512vl_vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512vl_vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
avx512vnni-intel.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
avx512vnni.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
avx512vnni.s
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
avx512vnni_vl-intel.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
avx512vnni_vl.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
avx512vnni_vl.s
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
bad-size.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
bad-size.s
Add --size-check=[error|warning].
2011-03-16 12:58:26 +00:00
bad-size.warn
gas/
2011-03-18 11:16:28 +00:00
bmi-16bit.d
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
bmi-16bit.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
bmi-intel.d
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
bmi.d
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
bmi.s
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
bmi2-16bit.d
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
bmi2-16bit.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
bmi2-intel.d
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
bmi2.d
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
bmi2.s
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
bnd.l
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
bnd.s
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
bss.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
bss.s
gas/
2005-04-01 07:50:24 +00:00
bundle-bad.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
bundle-bad.l
bundle_lock message tidy
2017-11-07 17:01:17 +10:30
bundle-bad.s
gas/
2012-05-29 16:32:11 +00:00
bundle-lock.d
gas/
2012-05-29 16:32:11 +00:00
bundle-lock.s
gas/
2012-05-29 16:32:11 +00:00
bundle.d
* gas/i386/bundle-lock.d: Ignore trailing nops.
2012-03-15 01:36:29 +00:00
bundle.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
cdr.d
Ignore MOD field for control/debug register move
2014-09-22 09:38:53 -07:00
cdr.s
Ignore MOD field for control/debug register move
2014-09-22 09:38:53 -07:00
cet-ibt-inval.l
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
cet-ibt-inval.s
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
cet-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
cet-shstk-inval.l
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
cet-shstk-inval.s
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
cet.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
cet.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
cldemote-intel.d
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
cldemote.d
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
cldemote.s
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
clflushopt-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
clflushopt.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
clflushopt.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
clmul-intel.d
gas/
2008-04-04 16:34:23 +00:00
clmul.d
gas/
2008-04-04 16:34:23 +00:00
clmul.s
gas/
2008-04-04 16:34:23 +00:00
clwb-intel.d
Add clwb instruction
2014-11-17 05:56:37 -08:00
clwb.d
Add clwb instruction
2014-11-17 05:56:37 -08:00
clwb.s
Add clwb instruction
2014-11-17 05:56:37 -08:00
clzero.d
Add znver1 processor
2015-03-17 21:49:15 +05:30
clzero.s
Add znver1 processor
2015-03-17 21:49:15 +05:30
code16.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
code16.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
code64-inval.l
i386: Support .code64 directive only with 64-bit bfd
2017-10-24 07:47:43 -07:00
code64-inval.s
i386: Support .code64 directive only with 64-bit bfd
2017-10-24 07:47:43 -07:00
code64.d
i386: Support .code64 directive only with 64-bit bfd
2017-10-24 07:47:43 -07:00
code64.s
i386: Support .code64 directive only with 64-bit bfd
2017-10-24 07:47:43 -07:00
compat-intel.d
gas/
2007-12-24 05:27:39 +00:00
compat.d
gas/
2007-12-24 05:27:39 +00:00
compat.s
binutils/
2007-12-22 14:06:31 +00:00
cr-err.l
gas/
2005-03-02 08:01:32 +00:00
cr-err.s
gas/
2005-03-02 08:01:32 +00:00
crc32-intel.d
gas/
2007-05-03 21:07:16 +00:00
crc32.d
gas/
2007-05-03 21:07:16 +00:00
crc32.s
gas/
2007-05-03 21:07:16 +00:00
crx.d
gas/
2005-03-02 08:01:32 +00:00
crx.s
gas/
2005-03-02 08:01:32 +00:00
cvtsi2sX.l
x86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-24 09:46:27 +02:00
cvtsi2sX.s
x86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-24 09:46:27 +02:00
debug1.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
debug1.s
Don't generate .debug_line section if it isn't empty.
2010-07-05 15:07:20 +00:00
disassem.d
i386: Check vector length for EVEX broadcast instructions
2019-06-19 10:01:42 -07:00
disassem.s
i386: Check vector length for EVEX broadcast instructions
2019-06-19 10:01:42 -07:00
disp-intel.d
gas/
2009-09-15 18:41:24 +00:00
disp.d
gas/
2009-09-15 18:41:24 +00:00
disp.s
gas/
2009-09-15 18:41:24 +00:00
disp32.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
disp32.s
Don't use vec_disp8 encoding with the .d32 suffix
2016-04-04 21:19:27 -07:00
divide.d
x86: Add explicit -mx86-used-note=[yes|no] to tests
2018-08-31 04:35:57 -07:00
divide.s
* gas/i386/divide.s: Test line comment starting with '/'.
2005-11-07 06:03:50 +00:00
dw2-compress-1.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
dw2-compress-1.s
Update year range in copyright notice of binutils files
2020-01-01 18:42:54 +10:30
dw2-compress-2.d
Add addr2line, objcopy and strip tests for compressed debug sections.
2010-07-14 19:46:01 +00:00
dw2-compress-2.s
Add addr2line, objcopy and strip tests for compressed debug sections.
2010-07-14 19:46:01 +00:00
dw2-compress-3.s
Add a testcase for PR gas/18087
2015-03-18 09:39:02 -07:00
dw2-compress-3a.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
dw2-compress-3b.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
dw2-compressed-1.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
dw2-compressed-2.d
Add SHF_COMPRESSED support to gas and objcopy
2015-04-08 07:54:09 -07:00
dw2-compressed-3a.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
dw2-compressed-3b.d
Update the assembler to use a version of 3 when generating the header of the .debug_line section.
2018-12-03 17:26:41 +00:00
enqcmd-intel.d
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
enqcmd-inval.l
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
enqcmd-inval.s
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
enqcmd.d
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
enqcmd.s
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
ept-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
ept.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
ept.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
equ-bad.l
x86: restrict use of register aliases
2020-06-08 08:37:47 +02:00
equ-bad.s
x86: restrict use of register aliases
2020-06-08 08:37:47 +02:00
equ.d
Properly handle ".equ symbol, reg + NUM" in x86 Intel syntax.
2010-04-21 18:09:52 +00:00
equ.s
Properly handle ".equ symbol, reg + NUM" in x86 Intel syntax.
2010-04-21 18:09:52 +00:00
evex-lig-2.d
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
evex-lig-2.s
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
evex-lig.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
evex-lig256-intel.d
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
2015-06-01 09:51:28 +02:00
evex-lig256.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
evex-lig512-intel.d
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
2015-06-01 09:51:28 +02:00
evex-lig512.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
evex-no-scale-32.d
x86: Replace evex-no-scale.s with evex-no-scale-[32|64].s
2018-08-10 10:23:11 -07:00
evex-no-scale-32.s
x86: Replace evex-no-scale.s with evex-no-scale-[32|64].s
2018-08-10 10:23:11 -07:00
evex-no-scale-64.d
x86: Don't display eiz with no scale
2020-07-15 07:18:49 -07:00
evex-no-scale-64.s
x86: Replace evex-no-scale.s with evex-no-scale-[32|64].s
2018-08-10 10:23:11 -07:00
evex-wig.s
x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode
2018-11-06 11:45:49 +01:00
evex-wig1-intel.d
x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode
2018-11-06 11:45:49 +01:00
evex-wig1.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
evex.d
x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit mode
2018-09-14 11:25:13 -07:00
evex.s
x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit mode
2018-09-14 10:49:53 -07:00
f16c-intel.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
f16c.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
f16c.s
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
fence-as-lock-add-no.d
Add option -mfence-as-lock-add=[no|yes].
2016-01-29 15:46:50 +03:00
fence-as-lock-add-yes.d
Add option -mfence-as-lock-add=[no|yes].
2016-01-29 15:46:50 +03:00
fence-as-lock-add.s
Add option -mfence-as-lock-add=[no|yes].
2016-01-29 15:46:50 +03:00
float.l
…
float.s
…
fma-intel.d
Add new FMA tests.
2009-01-06 01:10:49 +00:00
fma-scalar-intel.d
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
fma-scalar.d
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
fma-scalar.s
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
fma.d
Add new FMA tests.
2009-01-06 01:10:49 +00:00
fma.s
Add new FMA tests.
2009-01-06 01:10:49 +00:00
fma4.d
2009-12-11 Quentin Neill <quentin.neill@amd.com>
2009-12-11 20:38:51 +00:00
fma4.s
2009-12-11 Quentin Neill <quentin.neill@amd.com>
2009-12-11 20:38:51 +00:00
fp.d
PR24944, gas doesn't read enough digits when parsing a floating point number
2019-11-20 21:59:33 +10:30
fp.s
PR24944, gas doesn't read enough digits when parsing a floating point number
2019-11-20 21:59:33 +10:30
fpu-bad.d
X86: Properly handle bad FPU opcode
2016-11-07 14:58:38 -08:00
fpu-bad.s
X86: Properly handle bad FPU opcode
2016-11-07 14:58:38 -08:00
fpu.l
x86: x87-related adjustments
2018-04-26 08:45:35 +02:00
fpu.s
x86: x87-related adjustments
2018-04-26 08:45:35 +02:00
fsgs-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
fsgs.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
fsgs.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
general.l
x86: also disallow non-byte/-word registers with byte/word suffix
2020-02-12 10:59:32 +01:00
general.s
x86: also disallow non-byte/-word registers with byte/word suffix
2020-02-12 10:59:32 +01:00
gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
got-no-relax.d
x86: prevent undue use of GOT32X and alike relocations
2020-01-30 17:03:22 +01:00
got.d
x86: prevent undue use of GOT32X and alike relocations
2020-01-30 17:03:22 +01:00
got.s
x86: prevent undue use of GOT32X and alike relocations
2020-01-30 17:03:22 +01:00
gotpc.d
Properly fold _GLOBAL_OFFSET_TABLE_ in Intel syntax.
2010-11-03 14:18:43 +00:00
gotpc.s
Properly fold _GLOBAL_OFFSET_TABLE_ in Intel syntax.
2010-11-03 14:18:43 +00:00
hle-intel.d
ix86: allow HLE store of accumulator to absolute address
2018-03-22 08:33:38 +01:00
hle.d
ix86: allow HLE store of accumulator to absolute address
2018-03-22 08:33:38 +01:00
hle.s
ix86: allow HLE store of accumulator to absolute address
2018-03-22 08:33:38 +01:00
hlebad.l
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
hlebad.s
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
i386-intel.d
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
i386.d
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
i386.exp
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
i386.s
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
iamcu-1.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
iamcu-1.s
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
iamcu-2.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
iamcu-2.s
Add Intel MCU support to gas
2015-05-11 11:12:39 -07:00
iamcu-3.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
iamcu-3.s
Add Intel MCU support to gas
2015-05-11 11:12:39 -07:00
iamcu-4.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
iamcu-4.s
X86: Allow additional ISAs for IAMCU in assembler
2016-09-07 09:22:19 -07:00
iamcu-5.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
iamcu-5.s
X86: Allow additional ISAs for IAMCU in assembler
2016-09-07 09:22:19 -07:00
iamcu-inval-1.l
Add Intel MCU support to gas
2015-05-11 11:12:39 -07:00
iamcu-inval-1.s
Add Intel MCU support to gas
2015-05-11 11:12:39 -07:00
ifunc-2.l
gas/
2010-12-02 13:25:13 +00:00
ifunc-2.s
gas/
2010-12-02 13:25:13 +00:00
ifunc-3.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
ifunc-3.s
* gas/elf/bad-group.s: Add section attributes.
2012-02-14 01:01:30 +00:00
ifunc.d
gas/
2009-07-16 17:37:26 +00:00
ifunc.s
gas/
2009-07-16 17:37:26 +00:00
immed32.d
gas/testsuite/
2007-04-27 04:22:02 +00:00
immed32.s
gas/
2005-07-26 15:34:11 +00:00
immed64.d
Check flag_code instead of use_rela_relocations for 64bit.
2010-09-03 17:38:38 +00:00
immed64.s
Check flag_code instead of use_rela_relocations for 64bit.
2010-09-03 17:38:38 +00:00
intel-cmps.s
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-cmps16.d
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-cmps32.d
x86/Intel: correct CMPSD test cases' regexp closing paren placement
2019-11-14 08:45:26 +01:00
intel-cmps64.d
x86/Intel: correct CMPSD test cases' regexp closing paren placement
2019-11-14 08:45:26 +01:00
intel-expr.d
x86/Intel: support "mmword ptr"
2019-12-09 13:31:39 +01:00
intel-expr.s
x86/Intel: support "mmword ptr"
2019-12-09 13:31:39 +01:00
intel-got32.d
Don't call section_symbol() with expr_section.
2010-07-03 22:15:58 +00:00
intel-got32.s
Don't call section_symbol() with expr_section.
2010-07-03 22:15:58 +00:00
intel-got64.d
Don't call section_symbol() with expr_section.
2010-07-03 22:15:58 +00:00
intel-got64.s
Don't call section_symbol() with expr_section.
2010-07-03 22:15:58 +00:00
intel-intel.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
intel-movs.s
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-movs16.d
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-movs32.d
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-movs64.d
x86/Intel: extend MOVSD/CMPSD testsuite coverage
2019-11-14 08:44:57 +01:00
intel-regs.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
intel-regs.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
intel.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
intel.e
x86: Remove support for old (<= 2.8.1) versions of gcc
2018-03-08 06:31:52 -08:00
intel.s
x86: Remove support for old (<= 2.8.1) versions of gcc
2018-03-08 06:31:52 -08:00
intel16.d
gas/
2009-04-20 06:31:50 +00:00
intel16.s
gas/
2009-04-20 06:31:50 +00:00
intelbad.l
x86: also disallow non-byte/-word registers with byte/word suffix
2020-02-12 10:59:32 +01:00
intelbad.s
x86/Intel: fix "near ptr" / "far ptr" handling
2019-12-09 13:31:07 +01:00
intelok.d
x86/Intel: support "mmword ptr"
2019-12-09 13:31:39 +01:00
intelok.e
x86/Intel: support "mmword ptr"
2019-12-09 13:31:39 +01:00
intelok.s
x86/Intel: support "mmword ptr"
2019-12-09 13:31:39 +01:00
intelpic.d
Call symbol_same_p to check to if 2 symbols are the same.
2009-12-08 03:14:29 +00:00
intelpic.s
Call symbol_same_p to check to if 2 symbols are the same.
2009-12-08 03:14:29 +00:00
inval-16.l
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
inval-16.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
inval-avx.l
x86/Intel: improve diagnostics for ambiguous VCVT* operands
2020-02-17 08:56:18 +01:00
inval-avx.s
gas/
2009-01-06 01:03:27 +00:00
inval-avx512f.l
gas: Adjust x86 tests for PECOFF
2020-05-26 14:18:08 -07:00
inval-avx512f.s
gas: Adjust x86 tests for PECOFF
2020-05-26 14:18:08 -07:00
inval-avx512vl.l
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
inval-avx512vl.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
inval-crc32.l
x86: testsuite adjustments after commit 1a0351246a
2020-01-21 14:41:05 +01:00
inval-crc32.s
x86: testsuite adjustments after commit 1a0351246a
2020-01-21 14:41:05 +01:00
inval-ept.l
gas/
2008-05-02 16:53:40 +00:00
inval-ept.s
gas/
2008-05-02 16:53:40 +00:00
inval-equ-1.l
gas/
2008-03-03 15:28:58 +00:00
inval-equ-1.s
gas/
2008-03-03 15:28:58 +00:00
inval-equ-2.l
Fix PR17493, attempted output of *GAS `reg' section* symbol
2014-10-18 23:07:07 +10:30
inval-equ-2.s
gas/
2008-03-03 15:28:58 +00:00
inval-invpcid.l
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
inval-invpcid.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
inval-movbe.l
gas/
2008-05-02 16:53:40 +00:00
inval-movbe.s
gas/
2008-05-02 16:53:40 +00:00
inval-pseudo.l
x86: Check pseudo prefix without instruction
2017-12-17 09:49:11 -08:00
inval-pseudo.s
x86: Check pseudo prefix without instruction
2017-12-17 09:49:11 -08:00
inval-reg.l
Add CheckRegSize to instructions which require register size check.
2010-10-14 18:45:10 +00:00
inval-reg.s
Add CheckRegSize to instructions which require register size check.
2010-10-14 18:45:10 +00:00
inval-rep.l
Optimize REP prefix check
2013-02-28 20:50:19 +00:00
inval-rep.s
Optimize REP prefix check
2013-02-28 20:50:19 +00:00
inval-seg.l
x86/Intel: issue diagnostics for redundant segment override prefixes
2017-11-30 11:46:26 +01:00
inval-seg.s
x86/Intel: issue diagnostics for redundant segment override prefixes
2017-11-30 11:46:26 +01:00
inval.l
x86: also disallow non-byte/-word registers with byte/word suffix
2020-02-12 10:59:32 +01:00
inval.s
x86: also disallow non-byte/-word registers with byte/word suffix
2020-02-12 10:59:32 +01:00
invpcid-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
invpcid.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
invpcid.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
jump.d
gas/
2010-06-22 07:43:41 +00:00
jump.s
gas/
2010-06-22 07:43:41 +00:00
jump16.d
i386: Issue a warning to IRET without suffix for .code16gcc
2019-05-02 10:47:04 -07:00
jump16.e
i386: Issue a warning to IRET without suffix for .code16gcc
2019-05-02 10:47:04 -07:00
jump16.s
i386: Issue a warning to IRET without suffix for .code16gcc
2019-05-02 10:47:04 -07:00
k1om-inval.l
Add initial Intel K1OM support.
2011-07-22 20:22:38 +00:00
k1om-inval.s
Add initial Intel K1OM support.
2011-07-22 20:22:38 +00:00
k1om.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
katmai.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
katmai.s
gas/testsuite/
2007-10-23 22:52:09 +00:00
l1om-inval.l
bfd/
2009-07-25 14:58:58 +00:00
l1om-inval.s
bfd/
2009-07-25 14:58:58 +00:00
l1om.d
Remove x86 NaCl target support
2020-06-30 08:56:14 -07:00
lea-optimize.d
x86: optimize away pointless segment overrides
2020-02-14 14:03:19 +01:00
lea.d
x86: extend LEA's segment override warning
2020-02-14 14:02:05 +01:00
lea.e
x86: extend LEA's segment override warning
2020-02-14 14:02:05 +01:00
lea.s
x86: extend LEA's segment override warning
2020-02-14 14:02:05 +01:00
lfence-byte.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-byte.e
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-byte.s
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-indbr-a.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-indbr-b.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-indbr-c.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-indbr.e
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-indbr.s
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
lfence-load.d
Improve -mlfence-after-load
2020-04-26 14:26:24 +08:00
lfence-load.e
Improve -mlfence-after-load
2020-04-26 14:26:24 +08:00
lfence-load.s
Improve -mlfence-after-load
2020-04-26 14:26:24 +08:00
lfence-ret-a.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
lfence-ret-b.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
lfence-ret-c.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
lfence-ret-d.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
lfence-ret.s
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
list-1.l
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
list-1.s
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
list-2.l
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
list-2.s
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
list-3.l
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
list-3.s
Add tests for PR gas/9966 and PR gas/11356.
2010-03-09 02:00:58 +00:00
localpic.d
x86: Force relocation against local absolute symbol
2020-04-01 05:41:06 -07:00
localpic.s
x86: Force relocation against local absolute symbol
2020-04-01 05:41:06 -07:00
lock-1-intel.d
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
lock-1.d
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
lock-1.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
lockbad-1.l
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
lockbad-1.s
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
long-1-intel.d
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
long-1.d
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
long-1.s
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
lwp-16bit.d
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
lwp-16bit.s
x86: allow VEX et al encodings in 16-bit (protected) mode
2019-06-27 08:49:40 +02:00
lwp.d
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
2010-03-23 02:56:24 +00:00
lwp.s
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
2010-03-23 02:56:24 +00:00
mem-intel.d
gas/testsuite/
2007-08-30 15:13:46 +00:00
mem.d
gas/
2007-08-28 17:36:34 +00:00
mem.s
gas/
2007-08-28 17:36:34 +00:00
mixed-mode-reloc.s
gas/
2005-09-28 15:31:21 +00:00
mixed-mode-reloc32.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
mixed-mode-reloc64.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
modrm.l
…
modrm.s
…
movbe-intel.d
gas/
2008-05-02 16:53:40 +00:00
movbe.d
gas/
2008-05-02 16:53:40 +00:00
movbe.s
gas/
2008-05-02 16:53:40 +00:00
movdir-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
movdir.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
movdir.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
movdir64b-reg.l
Enable Intel MOVDIRI, MOVDIR64B instructions
2018-05-07 16:57:48 -07:00
movdir64b-reg.s
Enable Intel MOVDIRI, MOVDIR64B instructions
2018-05-07 16:57:48 -07:00
movx16.l
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movx16.s
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movx32.l
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movx32.s
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movx64.l
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movx64.s
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
movz.s
x86: allow suffix-less movzw and 64-bit movzb
2016-07-01 09:01:41 +02:00
movz32.d
x86: allow suffix-less movzw and 64-bit movzb
2016-07-01 09:01:41 +02:00
movz64.d
x86: allow suffix-less movzw and 64-bit movzb
2016-07-01 09:01:41 +02:00
mpx-16bit.d
x86: correct MPX insn w/o base or index encoding in 16-bit mode
2020-03-06 08:50:56 +01:00
mpx-16bit.s
x86: correct MPX insn w/o base or index encoding in 16-bit mode
2020-03-06 08:50:56 +01:00
mpx-add-bnd-prefix.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
mpx-add-bnd-prefix.e
x86: fix "REP RET" with -madd-bnd-prefix
2018-07-11 10:23:48 +02:00
mpx-add-bnd-prefix.s
x86: fix "REP RET" with -madd-bnd-prefix
2018-07-11 10:23:48 +02:00
mpx-inval-1.l
x86: adjust ignored prefix warning for branches
2019-12-27 09:39:58 +01:00
mpx-inval-1.s
Support Intel MPX
2013-07-24 15:47:25 +00:00
mpx-inval-2.l
x86/MPX: fix address size handling
2016-07-01 09:06:16 +02:00
mpx-inval-2.s
x86/MPX: fix address size handling
2016-07-01 09:06:16 +02:00
mpx.d
i386-dis: Add 2 tests with invalid bnd register
2017-06-15 08:21:48 -07:00
mpx.s
i386-dis: Add 2 tests with invalid bnd register
2017-06-15 08:21:48 -07:00
mwaitx-bdver4.d
Add support for monitorx/mwaitx instructions
2015-06-30 07:50:12 -07:00
mwaitx-reg.l
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
mwaitx-reg.s
Add support for monitorx/mwaitx instructions
2015-06-30 07:50:12 -07:00
mwaitx.s
Add support for monitorx/mwaitx instructions
2015-06-30 07:50:12 -07:00
naked.d
Rewrite prefix processing.
2009-11-13 20:42:10 +00:00
naked.s
…
no87-2.l
gas/
2009-07-24 15:41:20 +00:00
no87-2.s
gas/
2009-07-24 15:41:20 +00:00
no87-3.l
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
no87-3.s
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
no87.l
gas/
2009-07-24 15:41:20 +00:00
no87.s
gas/
2009-07-24 15:41:20 +00:00
noavx-1.l
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
noavx-1.s
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
noavx-2.l
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
noavx-2.s
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
noavx-3.l
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
noavx-3.s
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
noavx-4.d
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
noavx-4.s
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
noavx512-1.l
Add .noavx512XX directives to x86 assembler
2016-05-29 07:56:23 -07:00
noavx512-1.s
Add .noavx512XX directives to x86 assembler
2016-05-29 07:56:23 -07:00
noavx512-2.l
x86: correct VFPCLASSP{S,D} operand size handling
2020-02-12 16:20:56 +01:00
noavx512-2.s
x86: correct VFPCLASSP{S,D} operand size handling
2020-02-12 16:20:56 +01:00
noextreg.d
x86: Pass -O0 to assembler in noextreg.d
2019-07-19 11:07:59 -07:00
noextreg.s
x86: ignore high register select bit(s) in 32- and 16-bit modes
2017-11-16 13:56:45 +01:00
nommx-1.l
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
nommx-1.s
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
nommx-2.l
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nommx-2.s
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nommx-3.l
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nommx-3.s
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nop-1-suffix.d
x86: fix processing of -M disassembler option
2020-06-26 16:42:55 +02:00
nop-1.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-1.s
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-2.s
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-3.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-3.s
gas: Rename .nop directive to .nops
2018-02-27 14:46:03 -08:00
nop-4.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-4.s
gas: Rename .nop directive to .nops
2018-02-27 14:46:03 -08:00
nop-5.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-5.s
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-6.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
nop-6.s
gas: Rename .nop directive to .nops
2018-02-27 14:46:03 -08:00
nop-bad-1.l
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nop-bad-1.s
gas: Rename .nop directive to .nops
2018-02-27 14:46:03 -08:00
nops-1-core2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1-i386-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1-i386.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1-k8.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-1.s
gas/
2006-06-23 21:47:36 +00:00
nops-2-core2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-2-i386.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-2.s
gas/
2008-01-22 19:16:45 +00:00
nops-3-i386.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-3-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-3.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-3.s
* gas/i386/nops-3.s: Don't use .align.
2007-03-31 03:22:38 +00:00
nops-4-i386.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-4-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-4.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-4.s
gas/
2007-07-23 20:03:23 +00:00
nops-4a-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-5-i686.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-5.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-5.s
gas/
2008-10-12 12:37:09 +00:00
nops-6.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-6.s
Also update cpu_arch_isa_flags for ISA extensions.
2011-02-08 18:12:25 +00:00
nops-7.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops-7.s
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
nops.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
nops16-1.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
nops16-1.s
gas/
2007-07-23 20:03:23 +00:00
noreg-intel64.d
x86-64: adjust far indirect branch handling
2020-06-09 08:47:31 +02:00
noreg-intel64.l
x86-64: adjust far indirect branch handling
2020-06-09 08:47:31 +02:00
noreg-intel64.s
x86-64: adjust far indirect branch handling
2020-06-09 08:47:31 +02:00
noreg16-data32.d
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg16.d
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg16.l
x86: replace adhoc ambiguous operand checking for CRC32
2020-01-21 08:30:05 +01:00
noreg16.s
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg32-data16.d
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg32-data16.e
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg32.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
noreg32.l
x86: replace adhoc ambiguous operand checking for CRC32
2020-01-21 08:30:05 +01:00
noreg32.s
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg64-data16.d
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg64-data16.e
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg64-rex64.d
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
noreg64.d
x86-64: adjust far indirect branch handling
2020-06-09 08:47:31 +02:00
noreg64.l
x86: Allow integer conversion without suffix in AT&T syntax
2020-03-03 07:39:35 -08:00
noreg64.s
x86: operand sizing prefixes can disambiguate insns
2020-06-25 09:29:29 +02:00
nosse-1.l
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
nosse-1.s
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
nosse-2.l
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nosse-2.s
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nosse-3.l
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nosse-3.s
Reimplement .no87/.nommx/.nosse/.noavx directives
2016-05-25 10:26:13 -07:00
nosse-4.l
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
nosse-4.s
Update x86 CPU_XXX_FLAGS handling
2016-05-27 10:05:57 -07:00
nosse-5.d
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
nosse-5.s
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
note.d
Remove i386_elf_emit_arch_note
2015-05-01 08:29:16 -07:00
note.s
Remove i386_elf_emit_arch_note
2015-05-01 08:29:16 -07:00
notrack-intel.d
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
notrack.d
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
notrack.s
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
notrackbad.l
x86: adjust ignored prefix warning for branches
2019-12-27 09:39:58 +01:00
notrackbad.s
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
omit-lock-no.d
Add -momit_lock_prefix=[no|yes] option
2014-08-06 08:32:01 -07:00
omit-lock-yes.d
Add -momit_lock_prefix=[no|yes] option
2014-08-06 08:32:01 -07:00
omit-lock.s
Remove type directive
2014-08-12 15:53:48 -07:00
opcode-intel.d
x86: correct UDn
2017-11-23 10:59:48 +01:00
opcode-suffix.d
x86: don't omit disambiguating suffixes from "fi*"
2017-11-24 08:42:04 +01:00
opcode.d
x86: don't omit disambiguating suffixes from "fi*"
2017-11-24 08:42:04 +01:00
opcode.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
optimize-1.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-1.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-1a.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-2.d
x86: optimize AND/OR with twice the same register
2019-07-01 08:35:08 +02:00
optimize-2.s
x86: optimize AND/OR with twice the same register
2019-07-01 08:35:08 +02:00
optimize-2b.d
x86: optimize AND/OR with twice the same register
2019-07-01 08:35:08 +02:00
optimize-3.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-3.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-4.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-4.s
x86: Optimize with EVEX128 encoding for AVX512VL
2018-03-08 19:57:48 -08:00
optimize-5.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-5.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
optimize-6.s
x86: Correctly optimize EVEX to 128-bit VEX/EVEX
2019-03-17 07:25:22 +08:00
optimize-6a.l
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
optimize-6a.s
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
optimize-6b.d
x86: Correctly optimize EVEX to 128-bit VEX/EVEX
2019-03-17 07:25:22 +08:00
optimize-7.l
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
optimize-7.s
x86: Optimize EVEX vector load/store instructions
2019-03-18 08:58:19 +08:00
opts-intel.d
x86: fix swapped operand handling for BNDMOV
2018-03-22 08:32:50 +01:00
opts.d
x86: fix swapped operand handling for BNDMOV
2018-03-22 08:32:50 +01:00
opts.s
x86: fix swapped operand handling for BNDMOV
2018-03-22 08:32:50 +01:00
ospke.d
Implement Intel OSPKE instructions
2015-12-09 08:01:57 -08:00
ospke.s
Implement Intel OSPKE instructions
2015-12-09 08:01:57 -08:00
oversized16.l
x86: warn about insns exceeding the 15-byte limit
2019-07-01 08:24:57 +02:00
oversized16.s
x86: warn about insns exceeding the 15-byte limit
2019-07-01 08:24:57 +02:00
oversized64.l
x86: warn about insns exceeding the 15-byte limit
2019-07-01 08:24:57 +02:00
oversized64.s
x86: warn about insns exceeding the 15-byte limit
2019-07-01 08:24:57 +02:00
padlock.d
2005-11-04 H.J. Lu <hongjiu.lu@intel.com>
2005-11-04 19:53:02 +00:00
padlock.s
Added new instructions for next version of VIA PadLock core.
2004-07-30 12:36:38 +00:00
pconfig-intel.d
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
pconfig.d
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
pconfig.s
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
pcrel-elf.d
Add -mshared option to x86 ELF assembler
2015-05-15 03:30:53 -07:00
pcrel.d
…
pcrel.s
…
pr12589-1.d
Add a testase for PR gas/12589.
2011-03-17 13:16:44 +00:00
pr12589-1.s
Add a testase for PR gas/12589.
2011-03-17 13:16:44 +00:00
pr19498.d
Add a testcase for PR gas/19498
2016-04-04 20:45:30 -07:00
pr19498.s
Add a testcase for PR gas/19498
2016-04-04 20:45:30 -07:00
prefetch-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
prefetch.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
prefetch.s
gas/testsuite/
2012-08-07 18:22:04 +00:00
prefetchwt1-intel.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
prefetchwt1.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
prefetchwt1.s
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
prefix.d
x86: consistently print prefixes explicitly which are invalid with VEX etc
2020-06-09 08:59:04 +02:00
prefix.s
x86: consistently print prefixes explicitly which are invalid with VEX etc
2020-06-09 08:59:04 +02:00
prefix32.l
x86: also refuse data size prefix on SIMD insns
2020-06-25 09:25:12 +02:00
prefix32.s
x86: also refuse data size prefix on SIMD insns
2020-06-25 09:25:12 +02:00
prefix64.l
x86: also refuse data size prefix on SIMD insns
2020-06-25 09:25:12 +02:00
prefix64.s
x86: also refuse data size prefix on SIMD insns
2020-06-25 09:25:12 +02:00
property-1.d
Change the output of readelf's note display so that the "Data size" column header is left justified.
2019-08-08 17:04:31 +01:00
property-1.s
elf: Add PT_GNU_PROPERTY segment type
2018-12-14 04:55:34 -08:00
property-2.d
Change the output of readelf's note display so that the "Data size" column header is left justified.
2019-08-08 17:04:31 +01:00
property-2.s
x86: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16
2019-04-08 17:04:16 -07:00
property-3.d
x86: Mark cvtpi2ps and cvtpi2pd as MMX
2020-02-19 04:54:45 -08:00
property-3.s
x86: Mark cvtpi2ps and cvtpi2pd as MMX
2020-02-19 04:54:45 -08:00
pseudos-bad.l
x86: don't ignore mandatory pseudo prefixes
2020-06-09 08:46:22 +02:00
pseudos-bad.s
x86: don't ignore mandatory pseudo prefixes
2020-06-09 08:46:22 +02:00
pseudos.d
x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)
2020-07-28 04:04:34 -07:00
pseudos.s
x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)
2020-07-28 04:04:34 -07:00
ptwrite-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
ptwrite.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
ptwrite.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
rdpid-intel.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
rdpid.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
rdpid.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
rdrnd-intel.d
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
rdrnd.d
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
rdrnd.s
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
rdseed-intel.d
Append "#pass" to gas/i386/rdseed-intel.d
2012-07-31 20:46:07 +00:00
rdseed.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
rdseed.s
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
reg-bad.l
Terminate register name when reporting bad register
2012-08-14 17:01:46 +00:00
reg-bad.s
Terminate register name when reporting bad register
2012-08-14 17:01:46 +00:00
reg-intel.d
gas/testsuite/
2007-08-29 15:34:42 +00:00
reg.d
gas/testsuite/
2007-08-29 15:34:42 +00:00
reg.s
gas/testsuite/
2007-08-29 15:34:42 +00:00
relax-1.d
* gas/i386/relax-1.s: Use .p2align, not .align.
2010-10-26 22:18:38 +00:00
relax-1.s
* gas/i386/relax-1.s: Use .p2align, not .align.
2010-10-26 22:18:38 +00:00
relax-2.d
* gas/i386/relax-1.s: Use .p2align, not .align.
2010-10-26 22:18:38 +00:00
relax-2.s
* gas/i386/relax-1.s: Use .p2align, not .align.
2010-10-26 22:18:38 +00:00
relax-3.d
Add -mshared option to x86 ELF assembler
2015-05-15 03:30:53 -07:00
relax-3.s
Add -mshared option to x86 ELF assembler
2015-05-15 03:30:53 -07:00
relax-4.d
Add -mshared option to x86 ELF assembler
2015-05-15 03:30:53 -07:00
relax-5.d
x86: Change PLT32 reloc against section to PC32
2020-07-19 11:30:20 -07:00
relax-5.s
x86: Resolve PLT32 reloc aganst local symbol to section
2020-02-13 13:44:29 -08:00
relax.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
relax.s
…
reloc.d
gas/testsuite/
2008-12-18 22:47:32 +00:00
reloc.s
…
reloc32.d
Preserve addend for R_386_GOT32 and R_X86_64_GOT32
2016-05-20 06:01:28 -07:00
reloc32.l
x86: Properly handle PLT expression in directive
2018-12-19 12:22:12 -08:00
reloc32.s
x86: Properly handle PLT expression in directive
2018-12-19 12:22:12 -08:00
reloc64.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
reloc64.l
x86: Properly handle PLT expression in directive
2018-12-19 12:22:12 -08:00
reloc64.s
x86: Properly handle PLT expression in directive
2018-12-19 12:22:12 -08:00
rep-suffix.d
gas/testsuite/
2012-07-02 18:12:28 +00:00
rep-suffix.s
gas/testsuite/
2012-07-02 18:12:28 +00:00
rep.d
Rewrite prefix processing.
2009-11-13 20:42:10 +00:00
rep.s
2006-03-23 H.J. Lu <hongjiu.lu@intel.com>
2006-03-24 05:07:53 +00:00
rept.d
Move gas/all/rept.[ds] to gas/i386
2012-06-07 14:52:42 +00:00
rept.s
Move gas/all/rept.[ds] to gas/i386
2012-06-07 14:52:42 +00:00
rex.d
gas run_dump_test rename not-target and not-skip
2018-09-15 16:24:18 +09:30
rex.s
x86: relax redundant REX prefix check
2018-06-01 08:39:54 +02:00
rexw.d
binutils/
2008-04-03 14:03:21 +00:00
rexw.s
binutils/
2008-04-03 14:03:21 +00:00
rtm-intel.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
rtm.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
rtm.s
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
se1.d
x86: Add Intel ENCLV to assembler and disassembler
2018-10-05 11:56:42 -07:00
se1.s
x86: Add Intel ENCLV to assembler and disassembler
2018-10-05 11:56:42 -07:00
secrel.d
* config/tc-i386.c (lex_got): Provide implementation for PE
2012-08-07 13:47:19 +00:00
secrel.s
* config/tc-i386.c (lex_got): Provide implementation for PE
2012-08-07 13:47:19 +00:00
segment.l
gas/testsuite/
2005-03-29 19:30:47 +00:00
segment.s
gas/testsuite/
2005-03-29 19:30:47 +00:00
serialize.d
Add support for intel SERIALIZE instruction
2020-04-02 05:48:36 -07:00
serialize.s
Add support for intel SERIALIZE instruction
2020-04-02 05:48:36 -07:00
sg.l
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
sg.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
sha.d
Support Intel SHA
2013-07-25 16:16:35 +00:00
sha.s
Support Intel SHA
2013-07-25 16:16:35 +00:00
sib-intel.d
gas/testsuite/
2007-09-20 20:13:26 +00:00
sib.d
gas/testsuite/
2007-09-20 20:13:26 +00:00
sib.s
gas/testsuite/
2007-09-20 20:13:26 +00:00
simd-intel.d
Replace Xmmword with Qword on cvttps2pi
2013-07-08 16:24:21 +00:00
simd-suffix.d
gas/testsuite/
2008-05-22 20:52:54 +00:00
simd.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
simd.s
Replace Xmmword with Qword on cvttps2pi
2013-07-08 16:24:21 +00:00
size-1.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
size-1.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
size-2.d
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
size-2.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
size-3.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
size-3.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
size-4.d
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
size-4.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
smap.d
Implement Intel SMAP instructions
2013-02-19 19:10:31 +00:00
smap.s
Implement Intel SMAP instructions
2013-02-19 19:10:31 +00:00
smx.d
gas/testsuite/
2007-10-05 19:04:06 +00:00
smx.s
gas/testsuite/
2007-10-05 19:04:06 +00:00
space1.l
2009-11-04 H.J. Lu <hongjiu.lu@intel.com>
2009-11-04 18:52:03 +00:00
space1.s
2009-11-04 H.J. Lu <hongjiu.lu@intel.com>
2009-11-04 18:52:03 +00:00
sse-check-error.l
x86: drop SSE4a from SSE check again
2020-06-16 10:34:55 +02:00
sse-check-error.s
gas/
2008-04-10 17:53:40 +00:00
sse-check-none.d
x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
2018-03-08 08:35:01 +01:00
sse-check-none.s
x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
2018-03-08 08:35:01 +01:00
sse-check-warn.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
sse-check-warn.e
x86: drop SSE4a from SSE check again
2020-06-16 10:34:55 +02:00
sse-check.d
x86: further refine SSE check (SSE4a, SHA, GFNI)
2019-12-11 09:42:29 +01:00
sse-check.s
x86: drop SSE4a from SSE check again
2020-06-16 10:34:55 +02:00
sse-noavx.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
sse-noavx.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
sse2-16bit.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
sse2-16bit.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
sse2.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
sse2.s
2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
2008-04-23 14:34:05 +00:00
sse2avx-opts-intel.d
x86: fix swapped operand handling for BNDMOV
2018-03-22 08:32:50 +01:00
sse2avx-opts.d
x86: fix swapped operand handling for BNDMOV
2018-03-22 08:32:50 +01:00
sse2avx.d
x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S,D} and PTWRITE
2020-06-25 09:27:21 +02:00
sse2avx.s
x86: also refuse data size prefix on SIMD insns
2020-06-25 09:25:12 +02:00
sse3-intel.d
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
sse3.d
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
sse3.s
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
sse4_1-intel.d
gas/testsuite/
2007-09-12 13:20:31 +00:00
sse4_1.d
gas/testsuite/
2007-09-12 13:20:31 +00:00
sse4_1.s
gas/testsuite/
2007-09-12 13:20:31 +00:00
sse4_2-intel.d
gas/
2007-08-09 13:50:51 +00:00
sse4_2.d
gas/
2007-08-09 13:50:51 +00:00
sse4_2.s
gas/
2007-08-09 13:50:51 +00:00
ssemmx2.d
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
2007-07-04 15:44:11 +00:00
ssemmx2.s
…
ssse3.d
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
2009-09-14 14:44:58 +00:00
ssse3.s
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
2009-09-14 14:44:58 +00:00
stN.l
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
stN.s
i386: Append ".p2align 4,0" to gas tests
2018-05-06 19:09:12 -07:00
string-bad.l
x86/Intel: correct MOVSD and CMPSD handling
2019-10-07 08:38:01 +02:00
string-bad.s
x86: string insns don't allow displacements
2017-11-14 08:40:48 +01:00
string-ok.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
string-ok.e
x86: string insns don't allow displacements
2017-11-14 08:40:48 +01:00
string-ok.s
x86: string insns don't allow displacements
2017-11-14 08:40:48 +01:00
sub.d
Expect addend as signed
2012-05-17 16:36:22 +00:00
sub.s
…
suffix-bad.l
x86/Intel: don't accept bogus instructions
2016-07-01 09:03:02 +02:00
suffix-bad.s
x86/Intel: don't accept bogus instructions
2016-07-01 09:03:02 +02:00
suffix-intel.d
Properly handle suffix for iret and sysret
2014-09-10 09:39:24 -07:00
suffix.d
Properly handle suffix for iret and sysret
2014-09-10 09:39:24 -07:00
suffix.s
Properly handle suffix for iret and sysret
2014-09-10 09:39:24 -07:00
svme.d
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
svme.s
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
svme64.d
gas/
2007-09-06 12:28:12 +00:00
tbm-16bit.d
x86: add missing test
2019-06-27 12:40:08 +02:00
tbm-16bit.s
x86: add missing test
2019-06-27 12:40:08 +02:00
tbm-intel.d
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
tbm.d
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
tbm.s
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
tlsd.d
gas/testsuite/
2007-04-27 04:22:02 +00:00
tlsd.s
gas/
2005-05-09 15:41:47 +00:00
tlsnopic.d
gas/testsuite/
2008-12-18 22:47:32 +00:00
tlsnopic.s
…
tlspic.d
gas/testsuite/
2007-04-27 04:22:02 +00:00
tlspic.s
gas/
2005-05-09 15:41:47 +00:00
tsxldtrk.d
x86: Correct xsusldtrk mnemonic
2020-06-14 05:18:35 -07:00
tsxldtrk.s
x86: Correct xsusldtrk mnemonic
2020-06-14 05:18:35 -07:00
unique.d
x86: Run unique tests only for ELF targets
2020-02-06 04:44:39 -08:00
unique.s
ELF: Add support for unique section ID to assembler
2020-02-02 17:08:01 -08:00
unspec.l
x86: fold a few XOP templates
2018-03-22 08:29:45 +01:00
unspec.s
x86: fold a few XOP templates
2018-03-22 08:29:45 +01:00
unspec64.l
x86: correct operand size match checks for BMI/BMI2 insns
2018-03-08 08:51:18 +01:00
unspec64.s
x86: correct operand size match checks for BMI/BMI2 insns
2018-03-08 08:51:18 +01:00
vaes-intel.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
vaes.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
vaes.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
vex-lig-2.d
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
vex-lig-2.s
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
vgather-check-error.l
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
vgather-check-error.s
The VGATHER group of instructions requires that all three involved
2012-08-07 16:55:00 +00:00
vgather-check-none.d
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
vgather-check-none.s
The VGATHER group of instructions requires that all three involved
2012-08-07 16:55:00 +00:00
vgather-check-warn.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
vgather-check-warn.e
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
vgather-check.d
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
vgather-check.s
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
vmfunc.d
Add vmfunc
2012-01-13 22:19:32 +00:00
vmfunc.s
Add vmfunc
2012-01-13 22:19:32 +00:00
vmx.d
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
vmx.s
x86: add missing IgnoreSize
2020-03-06 08:49:45 +01:00
vp2intersect-intel.d
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
vp2intersect-inval-bcast.l
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
vp2intersect-inval-bcast.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
vp2intersect.d
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
vp2intersect.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
waitpkg-intel.d
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
waitpkg.d
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
waitpkg.s
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
wbnoinvd-intel.d
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
wbnoinvd.d
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
wbnoinvd.s
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
white.l
gas/
2006-12-06 18:15:45 +00:00
white.s
…
x86-64-addend.d
Preserve addend for R_386_GOT32 and R_X86_64_GOT32
2016-05-20 06:01:28 -07:00
x86-64-addend.s
Preserve addend for R_386_GOT32 and R_X86_64_GOT32
2016-05-20 06:01:28 -07:00
x86-64-addr32-intel.d
x86: Don't display eiz with no scale
2020-07-15 07:18:49 -07:00
x86-64-addr32.d
x86: Don't display eiz with no scale
2020-07-15 07:18:49 -07:00
x86-64-addr32.s
x86-64: Zero-extend lower 32 bits displacement to 64 bits
2020-07-15 07:18:45 -07:00
x86-64-adx-intel.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-adx.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-adx.s
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-aes-intel.d
binutils/
2008-04-03 14:03:21 +00:00
x86-64-aes.d
binutils/
2008-04-03 14:03:21 +00:00
x86-64-aes.s
binutils/
2008-04-03 14:03:21 +00:00
x86-64-align-branch-1.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-1a.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1b.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1c.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1d.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1e.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1f.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1g.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1h.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-1i.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-2.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-2a.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-2b.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-2c.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-3.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-3.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-4.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-4a.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-4b.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-5.d
x86: Updated align branch tests for Darwin and i686-pc-elf
2020-01-14 08:59:37 -08:00
x86-64-align-branch-6.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-7.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-7.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-8.d
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-8.s
i386: Add tests for -malign-branch-boundary and -malign-branch
2019-12-12 12:03:45 -08:00
x86-64-align-branch-9.d
x86: Improve -malign-branch
2020-03-03 06:21:37 -08:00
x86-64-align-branch-9.s
x86: Improve -malign-branch
2020-03-03 06:21:37 -08:00
x86-64-amdfam10.d
gas/
2007-09-12 07:31:47 +00:00
x86-64-amdfam10.s
gas/
2007-09-12 07:31:47 +00:00
x86-64-arch-1.d
gas/
2008-01-23 19:05:12 +00:00
x86-64-arch-1.s
gas/
2008-01-23 19:05:12 +00:00
x86-64-arch-2-1.l
Add x86-64-arch-2-1/x86-64-arch-2-2 tests
2012-09-20 14:43:20 +00:00
x86-64-arch-2-1.s
Add x86-64-arch-2-1/x86-64-arch-2-2 tests
2012-09-20 14:43:20 +00:00
x86-64-arch-2-2.l
Add x86-64-arch-2-1/x86-64-arch-2-2 tests
2012-09-20 14:43:20 +00:00
x86-64-arch-2-2.s
Add x86-64-arch-2-1/x86-64-arch-2-2 tests
2012-09-20 14:43:20 +00:00
x86-64-arch-2-bdver1.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
x86-64-arch-2-bdver2.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
x86-64-arch-2-bdver3.d
Add AMD bdver3 support.
2012-10-09 08:43:06 +00:00
x86-64-arch-2-bdver4.d
Add AMD bdver4 support.
2013-09-30 17:02:07 +00:00
x86-64-arch-2-btver1.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
x86-64-arch-2-btver2.d
Add missing Cpu flags in bd and bt cores
2012-09-25 13:12:34 +00:00
x86-64-arch-2-lzcnt.d
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
2012-09-20 11:53:33 +00:00
x86-64-arch-2-prefetchw.d
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
2012-09-20 11:53:33 +00:00
x86-64-arch-2.d
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
2012-09-20 11:53:33 +00:00
x86-64-arch-2.s
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
2012-09-20 11:53:33 +00:00
x86-64-arch-3-znver1.d
x86: support further AMD Zen2 instructions
2019-11-07 09:29:14 +01:00
x86-64-arch-3-znver2.d
x86: adjust register names printed for MONITOR/MWAIT
2019-11-07 09:28:20 +01:00
x86-64-arch-3.d
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
x86-64-arch-3.s
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
x86-64-avx-gather-intel.d
Update AVX tests.
2011-08-19 19:27:53 +00:00
x86-64-avx-gather.d
Update AVX tests.
2011-08-19 19:27:53 +00:00
x86-64-avx-gather.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx-scalar-2.d
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
x86-64-avx-scalar-2.s
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
x86-64-avx-scalar-intel.d
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
x86-64-avx-scalar.d
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 09:31:17 -07:00
x86-64-avx-scalar.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-avx-swap-2.d
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-avx-swap-2.s
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-avx-swap-intel.d
gas/
2008-12-23 15:14:15 +00:00
x86-64-avx-swap.d
gas/
2008-12-23 15:14:15 +00:00
x86-64-avx-swap.s
gas/
2008-12-23 15:14:15 +00:00
x86-64-avx-wig.d
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
2018-11-06 11:43:55 +01:00
x86-64-avx-wig.s
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
2018-11-06 11:43:55 +01:00
x86-64-avx.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-avx2-intel.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx2-wig.d
x86: add more VexWIG
2018-11-06 11:39:42 +01:00
x86-64-avx2-wig.s
x86: add more VexWIG
2018-11-06 11:39:42 +01:00
x86-64-avx2.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx2.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx256int-intel.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx256int.d
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx256int.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-avx512_4fmaps-intel.d
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
x86-64-avx512_4fmaps-warn.l
x86: adjust 4-XMM-register-group related warning
2018-03-08 08:27:28 +01:00
x86-64-avx512_4fmaps-warn.s
Enable Intel AVX512_4FMAPS instructions
2016-11-02 12:25:34 -07:00
x86-64-avx512_4fmaps.d
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
x86-64-avx512_4fmaps.s
x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 14:53:43 +01:00
x86-64-avx512_4vnniw-intel.d
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
x86-64-avx512_4vnniw.d
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
x86-64-avx512_4vnniw.s
Enable Intel AVX512_4VNNIW instructions
2016-11-02 12:31:25 -07:00
x86-64-avx512_bf16.d
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
x86-64-avx512_bf16.s
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
x86-64-avx512_bf16_vl-inval.l
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
x86-64-avx512_bf16_vl-inval.s
x86: Support Intel AVX512 BF16
2019-04-05 11:03:13 -07:00
x86-64-avx512_bf16_vl.d
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-21 08:25:31 +01:00
x86-64-avx512_bf16_vl.s
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-21 08:25:31 +01:00
x86-64-avx512_vpopcntdq-intel.d
Enable Intel AVX512_VPOPCNTDQ instructions
2017-01-12 08:44:24 -08:00
x86-64-avx512_vpopcntdq.d
Enable Intel AVX512_VPOPCNTDQ instructions
2017-01-12 08:44:24 -08:00
x86-64-avx512_vpopcntdq.s
Enable Intel AVX512_VPOPCNTDQ instructions
2017-01-12 08:44:24 -08:00
x86-64-avx512bitalg-intel.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bitalg.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bitalg.s
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bitalg_vl-intel.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bitalg_vl.d
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bitalg_vl.s
Enable Intel AVX512_BITALG instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512bw-intel.d
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512bw-opts-intel.d
X86: Remove the .s suffix from EVEX vpextrw
2016-11-09 14:00:18 -08:00
x86-64-avx512bw-opts.d
X86: Remove the .s suffix from EVEX vpextrw
2016-11-09 14:00:18 -08:00
x86-64-avx512bw-opts.s
X86: Remove the .s suffix from EVEX vpextrw
2016-11-09 14:00:18 -08:00
x86-64-avx512bw-wig.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw-wig1-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw-wig1.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw.d
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512bw.s
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512bw_vl-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-opts-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-opts.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-opts.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-wig.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-wig1-intel.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl-wig1.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl.d
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512bw_vl.s
Add support for AVX512BW instructions and their AVX512VL versions.
2014-07-22 10:23:44 -07:00
x86-64-avx512cd-intel.d
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
x86-64-avx512cd.d
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
x86-64-avx512cd.s
Change cpu for vptestnmd and vptestnmq instructions.
2014-02-20 07:53:55 -08:00
x86-64-avx512cd_vl-intel.d
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512cd_vl.d
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512cd_vl.s
Add support for AVX512VL versions of AVX512CD instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512dq-intel.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512dq-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512dq.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512dq.s
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512dq_vl-intel.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512dq_vl.d
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512dq_vl.s
Fix memory operand size for vcvtt?ps2u?qq instructions
2015-07-22 13:26:21 -07:00
x86-64-avx512er-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512er-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512er.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512er.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512f-intel.d
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512f-nondef.d
Update x86 gas tests for mingw
2013-11-18 14:37:23 -08:00
x86-64-avx512f-nondef.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512f-opts-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512f-opts.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512f-opts.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-avx512f-rcig.s
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrd-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrd.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrne-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrne.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigru-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigru.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrz-intel.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f-rcigrz.d
Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
2014-09-16 08:45:28 -07:00
x86-64-avx512f.d
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512f.s
x86: replace NoRex64 on VEX-encoded insns
2020-03-06 08:53:18 +01:00
x86-64-avx512f_gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512f_gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512f_gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512f_vaes-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vaes-wig.s
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vaes-wig1-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vaes-wig1.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vaes.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vaes.s
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512f_vl-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-opts-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-opts.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-opts.s
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-wig.s
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-wig1-intel.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl-wig1.d
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
2014-07-22 10:23:40 -07:00
x86-64-avx512f_vl.d
x86: disambiguate disassembly of certain AVX512 insns
2015-04-23 16:42:40 +02:00
x86-64-avx512f_vl.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
x86-64-avx512f_vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512f_vpclmulqdq-wig.s
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512f_vpclmulqdq-wig1-intel.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512f_vpclmulqdq-wig1.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512f_vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512f_vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512ifma-intel.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512ifma.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512ifma.s
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512ifma_vl-intel.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512ifma_vl.d
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512ifma_vl.s
Add AVX512IFMA instructions
2014-11-17 06:03:24 -08:00
x86-64-avx512pf-intel.d
Fix memory size for gather/scatter instructions
2014-03-20 08:13:30 -07:00
x86-64-avx512pf.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
x86-64-avx512pf.s
x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
2018-07-31 10:55:17 +02:00
x86-64-avx512vbmi-intel.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vbmi.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vbmi.s
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vbmi2-intel.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi2.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi2.s
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi2_vl-intel.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi2_vl.d
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi2_vl.s
Enable Intel AVX512_VBMI2 instructions.
2017-10-23 15:58:07 +03:00
x86-64-avx512vbmi_vl-intel.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vbmi_vl.d
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vbmi_vl.s
Add AVX512VBMI instructions
2014-11-17 06:03:41 -08:00
x86-64-avx512vl-1.l
Require another match for AVX512VL
2016-05-25 15:04:47 -07:00
x86-64-avx512vl-1.s
Require another match for AVX512VL
2016-05-25 15:04:47 -07:00
x86-64-avx512vl-2.l
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
x86-64-avx512vl-2.s
Append ".p2align 4" to some x86 directive tests
2016-05-26 07:55:38 -07:00
x86-64-avx512vl_gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512vl_gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512vl_gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx512vl_vaes-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512vl_vaes-wig.s
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512vl_vaes-wig1-intel.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512vl_vaes-wig1.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512vl_vaes.d
Add Disp8MemShift for AVX512 VAES instructions.
2017-11-23 18:25:49 +03:00
x86-64-avx512vl_vaes.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vl_vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512vl_vpclmulqdq-wig.s
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512vl_vpclmulqdq-wig1-intel.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512vl_vpclmulqdq-wig1.d
Enable Intel VPCLMULQDQ instruction.
2017-10-23 15:58:18 +03:00
x86-64-avx512vl_vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512vl_vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-avx512vnni-intel.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vnni.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vnni.s
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vnni_vl-intel.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vnni_vl.d
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx512vnni_vl.s
Enable Intel AVX512_VNNI instructions.
2017-10-23 15:58:18 +03:00
x86-64-avx_gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx_gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-avx_gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-bmi-intel.d
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
x86-64-bmi.d
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
x86-64-bmi.s
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
x86-64-bmi2-intel.d
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
x86-64-bmi2.d
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
x86-64-bmi2.s
Fix rorx in BMI2.
2011-06-30 15:44:55 +00:00
x86-64-branch-2.d
gas: Fix some x86_64 testcases for Solaris not using R_X86_64_PLT32 [PR25732]
2020-04-01 14:10:34 +02:00
x86-64-branch-2.s
x86-64: honor vendor specifics for near RET
2020-01-30 11:36:33 +01:00
x86-64-branch-3.d
gas: Fix some x86_64 testcases for Solaris not using R_X86_64_PLT32 [PR25732]
2020-04-01 14:10:34 +02:00
x86-64-branch-3.s
x86-64: Intel64 adjustments for insns dealing with far pointers
2020-02-12 16:19:03 +01:00
x86-64-branch-4.l
x86-64: honor vendor specifics for near RET
2020-01-30 11:36:33 +01:00
x86-64-branch-4.s
x86-64: honor vendor specifics for near RET
2020-01-30 11:36:33 +01:00
x86-64-branch-5.l
x86-64: Intel64 adjustments for insns dealing with far pointers
2020-02-12 16:19:03 +01:00
x86-64-branch-5.s
x86-64: Intel64 adjustments for insns dealing with far pointers
2020-02-12 16:19:03 +01:00
x86-64-branch.d
x86-64: honor vendor specifics for near RET
2020-01-30 11:36:33 +01:00
x86-64-branch.s
x86-64: honor vendor specifics for near RET
2020-01-30 11:36:33 +01:00
x86-64-bundle.d
* gas/i386/bundle-lock.d: Ignore trailing nops.
2012-03-15 01:36:29 +00:00
x86-64-bundle.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-cbw-intel.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-cbw.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-cbw.s
opcodes/
2006-12-01 14:56:11 +00:00
x86-64-cdr.d
Ignore MOD field for control/debug register move
2014-09-22 09:38:53 -07:00
x86-64-cet-ibt-inval.l
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
x86-64-cet-ibt-inval.s
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
x86-64-cet-intel.d
x86/Intel: accept memory operand size specifiers for CET insns
2018-07-11 10:25:40 +02:00
x86-64-cet-shstk-inval.l
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
x86-64-cet-shstk-inval.s
Replace CET bit with IBT and SHSTK bits.
2018-01-17 19:48:28 +03:00
x86-64-cet.d
x86/Intel: accept memory operand size specifiers for CET insns
2018-07-11 10:25:40 +02:00
x86-64-cet.s
x86/Intel: accept memory operand size specifiers for CET insns
2018-07-11 10:25:40 +02:00
x86-64-cldemote-intel.d
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
x86-64-cldemote.d
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
x86-64-cldemote.s
Enable Intel CLDEMOTE instruction.
2018-04-17 11:56:34 +02:00
x86-64-clflushopt-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-clflushopt.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-clflushopt.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-clmul-intel.d
gas/
2008-04-04 16:34:23 +00:00
x86-64-clmul.d
gas/
2008-04-04 16:34:23 +00:00
x86-64-clmul.s
gas/
2008-04-04 16:34:23 +00:00
x86-64-clwb-intel.d
Add clwb instruction
2014-11-17 05:56:37 -08:00
x86-64-clwb.d
Add clwb instruction
2014-11-17 05:56:37 -08:00
x86-64-clwb.s
Add clwb instruction
2014-11-17 05:56:37 -08:00
x86-64-clzero.d
Add znver1 processor
2015-03-17 21:49:15 +05:30
x86-64-crc32-intel.d
gas/
2007-05-03 21:07:16 +00:00
x86-64-crc32.d
gas/
2007-05-03 21:07:16 +00:00
x86-64-crc32.s
gas/
2007-05-03 21:07:16 +00:00
x86-64-crx-suffix.d
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
x86-64-crx.d
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
x86-64-crx.s
gas/testsuite/
2006-02-11 17:00:59 +00:00
x86-64-default-suffix-avx.d
x86: Allow integer conversion without suffix in AT&T syntax
2020-03-03 07:39:35 -08:00
x86-64-default-suffix.d
x86: Allow integer conversion without suffix in AT&T syntax
2020-03-03 07:39:35 -08:00
x86-64-default-suffix.s
x86: Allow integer conversion without suffix in AT&T syntax
2020-03-03 07:39:35 -08:00
x86-64-disassem.d
i386: Check vector length for EVEX broadcast instructions
2019-06-19 10:01:42 -07:00
x86-64-disassem.s
i386: Check vector length for EVEX broadcast instructions
2019-06-19 10:01:42 -07:00
x86-64-disp-intel.d
gas/
2009-10-20 22:18:19 +00:00
x86-64-disp.d
gas/
2009-10-20 22:18:19 +00:00
x86-64-disp.s
gas/
2009-09-15 18:41:24 +00:00
x86-64-disp32.d
x86: Pass -O0 to assembler for some tests
2019-03-18 09:19:45 +08:00
x86-64-disp32.s
Don't use vec_disp8 encoding with the .d32 suffix
2016-04-04 21:19:27 -07:00
x86-64-drx-suffix.d
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
x86-64-drx.d
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
x86-64-drx.s
gas/testsuite/
2006-02-11 18:08:35 +00:00
x86-64-dw2-compress-2.d
Add addr2line, objcopy and strip tests for compressed debug sections.
2010-07-14 19:46:01 +00:00
x86-64-dw2-compress-2.s
Add addr2line, objcopy and strip tests for compressed debug sections.
2010-07-14 19:46:01 +00:00
x86-64-dw2-compressed-2.d
Add SHF_COMPRESSED support to gas and objcopy
2015-04-08 07:54:09 -07:00
x86-64-enqcmd-intel.d
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
x86-64-enqcmd-inval.l
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
x86-64-enqcmd-inval.s
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
x86-64-enqcmd.d
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
x86-64-enqcmd.s
Add support for Intel ENQCMD[S] instructions
2019-06-04 08:50:46 -07:00
x86-64-ept-intel.d
gas/
2008-05-02 16:53:40 +00:00
x86-64-ept.d
gas/
2008-05-02 16:53:40 +00:00
x86-64-ept.s
gas/
2008-05-02 16:53:40 +00:00
x86-64-equ-bad.l
x86: restrict use of register aliases
2020-06-08 08:37:47 +02:00
x86-64-equ-bad.s
x86: restrict use of register aliases
2020-06-08 08:37:47 +02:00
x86-64-equ.d
Properly handle EVEX register aliases
2014-07-17 08:54:05 -07:00
x86-64-equ.s
Properly handle EVEX register aliases
2014-07-17 08:54:05 -07:00
x86-64-evex-lig-2.d
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
x86-64-evex-lig-2.s
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
x86-64-evex-lig.s
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-evex-lig256-intel.d
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
2015-06-01 09:51:28 +02:00
x86-64-evex-lig256.d
x86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-24 09:46:27 +02:00
x86-64-evex-lig512-intel.d
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
2015-06-01 09:51:28 +02:00
x86-64-evex-lig512.d
x86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-24 09:46:27 +02:00
x86-64-evex-wig.s
x86: adjust {,E}VEX.W handling outside of 64-bit mode
2018-11-06 11:42:54 +01:00
x86-64-evex-wig1-intel.d
x86: adjust {,E}VEX.W handling outside of 64-bit mode
2018-11-06 11:42:54 +01:00
x86-64-evex-wig1.d
x86: adjust {,E}VEX.W handling outside of 64-bit mode
2018-11-06 11:42:54 +01:00
x86-64-evex-wig2.d
x86: Check non-WIG EVEX instruction encoding with -mevexwig=1
2018-09-14 12:21:19 -07:00
x86-64-evex-wig2.s
x86: Check non-WIG EVEX instruction encoding with -mevexwig=1
2018-09-14 12:21:19 -07:00
x86-64-f16c-intel.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-f16c.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-f16c.s
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-fence-as-lock-add-no.d
Add option -mfence-as-lock-add=[no|yes].
2016-01-29 15:46:50 +03:00
x86-64-fence-as-lock-add-yes.d
Add option -mfence-as-lock-add=[no|yes].
2016-01-29 15:46:50 +03:00
x86-64-fma-intel.d
Add new FMA tests.
2009-01-06 01:10:49 +00:00
x86-64-fma-scalar-intel.d
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
x86-64-fma-scalar.d
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
x86-64-fma-scalar.s
Allow VL=1 on scalar FMA instructions.
2010-01-28 15:33:23 +00:00
x86-64-fma.d
Add new FMA tests.
2009-01-06 01:10:49 +00:00
x86-64-fma.s
Add new FMA tests.
2009-01-06 01:10:49 +00:00
x86-64-fma4.d
2009-12-11 Quentin Neill <quentin.neill@amd.com>
2009-12-11 20:38:51 +00:00
x86-64-fma4.s
2009-12-11 Quentin Neill <quentin.neill@amd.com>
2009-12-11 20:38:51 +00:00
x86-64-fsgs-intel.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-fsgs.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-fsgs.s
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-fxsave-intel.d
Support fxsave64 and fxrstor64.
2009-12-04 07:51:41 +00:00
x86-64-fxsave.d
Support fxsave64 and fxrstor64.
2009-12-04 07:51:41 +00:00
x86-64-fxsave.s
Support fxsave64 and fxrstor64.
2009-12-04 07:51:41 +00:00
x86-64-gfni-intel.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-gfni.d
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-gfni.s
Enable Intel GFNI instructions.
2017-10-23 15:58:13 +03:00
x86-64-gidt.d
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
2006-05-09 17:05:55 +00:00
x86-64-gidt.s
gas/testsuite/
2006-05-09 16:05:40 +00:00
x86-64-gotpcrel-2.d
x86: Put back BFD_RELOC_X86_64_GOTPCREL
2018-12-09 07:22:14 -08:00
x86-64-gotpcrel-2.s
x86: Put back BFD_RELOC_X86_64_GOTPCREL
2018-12-09 07:22:14 -08:00
x86-64-gotpcrel-no-relax.d
Add -mrelax-relocations= to x86 assembler
2016-02-03 08:25:15 -08:00
x86-64-gotpcrel.d
Add -mrelax-relocations= to x86 assembler
2016-02-03 08:25:15 -08:00
x86-64-gotpcrel.s
Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
2015-10-22 04:49:38 -07:00
x86-64-hle-intel.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-hle.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-hle.s
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-hlebad.l
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-hlebad.s
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-ifunc.d
gas/
2009-07-16 17:37:26 +00:00
x86-64-intel64.d
x86-64: Intel64 adjustments for insns dealing with far pointers
2020-02-12 16:19:03 +01:00
x86-64-intel64.s
x86-64: Intel64 adjustments for insns dealing with far pointers
2020-02-12 16:19:03 +01:00
x86-64-inval-avx.l
gas/
2009-01-06 01:03:27 +00:00
x86-64-inval-avx.s
gas/
2009-01-06 01:03:27 +00:00
x86-64-inval-avx512f.l
x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL
2019-05-28 10:05:44 -07:00
x86-64-inval-avx512f.s
x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL
2019-05-28 10:05:44 -07:00
x86-64-inval-avx512vl.l
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-inval-avx512vl.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-inval-crc32.l
x86: testsuite adjustments after commit 1a0351246a
2020-01-21 14:41:05 +01:00
x86-64-inval-crc32.s
x86: testsuite adjustments after commit 1a0351246a
2020-01-21 14:41:05 +01:00
x86-64-inval-ept.l
gas/
2008-05-02 16:53:40 +00:00
x86-64-inval-ept.s
gas/
2008-05-02 16:53:40 +00:00
x86-64-inval-invpcid.l
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-inval-invpcid.s
Support AVX Programming Reference (June, 2011).
2011-06-10 21:27:40 +00:00
x86-64-inval-movbe.l
gas/
2008-05-02 16:53:40 +00:00
x86-64-inval-movbe.s
gas/
2008-05-02 16:53:40 +00:00
x86-64-inval-rep.l
Optimize REP prefix check
2013-02-28 20:50:19 +00:00
x86-64-inval-rep.s
Optimize REP prefix check
2013-02-28 20:50:19 +00:00
x86-64-inval-seg.l
Revert "x86: Update segment register check in Intel syntax"
2017-11-30 11:44:27 +01:00
x86-64-inval-seg.s
Revert "x86: Update segment register check in Intel syntax"
2017-11-30 11:44:27 +01:00
x86-64-inval.l
x86: Check for more than 2 memory references
2018-07-27 06:35:09 -07:00
x86-64-inval.s
x86: Check for more than 2 memory references
2018-07-27 06:35:09 -07:00
x86-64-invpcid-intel.d
x86/Intel: accept "oword ptr" for INVPCID
2018-06-01 08:37:24 +02:00
x86-64-invpcid.d
x86/Intel: accept "oword ptr" for INVPCID
2018-06-01 08:37:24 +02:00
x86-64-invpcid.s
x86/Intel: accept "oword ptr" for INVPCID
2018-06-01 08:37:24 +02:00
x86-64-io-intel.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-io-suffix.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-io.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-io.s
opcodes/
2006-12-01 15:00:12 +00:00
x86-64-jump.d
x86-64/Intel: fix CALL/JMP with dword operand
2019-12-04 10:44:27 +01:00
x86-64-jump.s
x86-64/Intel: fix CALL/JMP with dword operand
2019-12-04 10:44:27 +01:00
x86-64-lfence-byte.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-byte.e
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-byte.s
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-indbr-a.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-indbr-b.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-indbr-c.d
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-indbr.e
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-indbr.s
i386: Add tests for lfence with load/indirect branch/ret
2020-03-11 09:49:13 -07:00
x86-64-lfence-load.d
Improve -mlfence-after-load
2020-04-26 14:26:24 +08:00
x86-64-lfence-load.s
Improve -mlfence-after-load
2020-04-26 14:26:24 +08:00
x86-64-lfence-ret-a.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-lfence-ret-b.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-lfence-ret-c.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-lfence-ret-d.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-lfence-ret-e.d
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-lfence-ret.s
Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are invalid in SGX enclaves.
2020-05-18 10:23:59 +08:00
x86-64-localpic.d
x86: Force relocation against local absolute symbol
2020-04-01 05:41:06 -07:00
x86-64-localpic.s
x86: Force relocation against local absolute symbol
2020-04-01 05:41:06 -07:00
x86-64-lock-1-intel.d
Allow lock on cmpxch16b.
2009-11-19 15:26:42 +00:00
x86-64-lock-1.d
Allow lock on cmpxch16b.
2009-11-19 15:26:42 +00:00
x86-64-lock-1.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-lockbad-1.l
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
x86-64-lockbad-1.s
Check destination operand for lockable instructions.
2009-11-14 06:04:34 +00:00
x86-64-long-1-intel.d
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
x86-64-long-1.d
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
x86-64-long-1.s
Properly handle multiple opcode prefixes
2014-05-05 14:25:14 -07:00
x86-64-lwp.d
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
2010-03-23 02:56:24 +00:00
x86-64-lwp.s
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
2010-03-23 02:56:24 +00:00
x86-64-mem-intel.d
gas/testsuite/
2007-08-30 15:13:46 +00:00
x86-64-mem.d
gas/
2007-08-28 17:36:34 +00:00
x86-64-mem.s
gas/
2007-08-28 17:36:34 +00:00
x86-64-movbe-intel.d
gas/
2008-05-02 16:53:40 +00:00
x86-64-movbe.d
gas/
2008-05-02 16:53:40 +00:00
x86-64-movbe.s
gas/
2008-05-02 16:53:40 +00:00
x86-64-movd-intel.d
x86: bogus VMOVD with 64-bit operands should only allow for registers
2018-03-08 08:26:35 +01:00
x86-64-movd.d
x86: bogus VMOVD with 64-bit operands should only allow for registers
2018-03-08 08:26:35 +01:00
x86-64-movd.s
x86: bogus VMOVD with 64-bit operands should only allow for registers
2018-03-08 08:26:35 +01:00
x86-64-movdir-intel.d
x86/Intel: extend MOVDIRI testing
2019-12-04 10:41:43 +01:00
x86-64-movdir.d
x86/Intel: extend MOVDIRI testing
2019-12-04 10:41:43 +01:00
x86-64-movdir.s
x86/Intel: extend MOVDIRI testing
2019-12-04 10:41:43 +01:00
x86-64-movdir64b-reg.l
Enable Intel MOVDIRI, MOVDIR64B instructions
2018-05-07 16:57:48 -07:00
x86-64-movdir64b-reg.s
Enable Intel MOVDIRI, MOVDIR64B instructions
2018-05-07 16:57:48 -07:00
x86-64-movsxd-intel.d
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
x86-64-movsxd-intel64-intel.d
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-intel64-inval.l
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-intel64-inval.s
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-intel64.d
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-intel64.s
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-inval.l
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd-inval.s
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-movsxd.d
x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
2020-02-14 14:27:28 +01:00
x86-64-movsxd.s
x86-64: Properly encode and decode movsxd
2020-01-27 04:38:29 -08:00
x86-64-mpx-add-bnd-prefix.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
x86-64-mpx-add-bnd-prefix.e
x86: fix "REP RET" with -madd-bnd-prefix
2018-07-11 10:23:48 +02:00
x86-64-mpx-add-bnd-prefix.s
x86: fix "REP RET" with -madd-bnd-prefix
2018-07-11 10:23:48 +02:00
x86-64-mpx-addr32.d
Update x86 gas tests for mingw
2013-11-18 14:37:23 -08:00
x86-64-mpx-addr32.s
Support Intel MPX
2013-07-24 15:47:25 +00:00
x86-64-mpx-branch-1.d
x86-64: correct / adjust prefix emission
2019-12-27 09:39:17 +01:00
x86-64-mpx-branch-1.s
x86-64: correct / adjust prefix emission
2019-12-27 09:39:17 +01:00
x86-64-mpx-branch-2.d
x86-64: correct / adjust prefix emission
2019-12-27 09:39:17 +01:00
x86-64-mpx-branch-2.s
x86-64: correct / adjust prefix emission
2019-12-27 09:39:17 +01:00
x86-64-mpx-inval-1.l
Run write_object_file after errors
2014-06-16 12:34:45 +09:30
x86-64-mpx-inval-1.s
Support Intel MPX
2013-07-24 15:47:25 +00:00
x86-64-mpx-inval-2.l
x86: fold RegEip/RegRip and RegEiz/RegRiz
2018-08-06 08:34:36 +02:00
x86-64-mpx-inval-2.s
Update x86-64-mpx-inval-2 test for COFF
2017-03-06 15:00:52 -08:00
x86-64-mpx.d
x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressing
2018-09-13 11:03:35 +02:00
x86-64-mpx.s
x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressing
2018-09-13 11:03:35 +02:00
x86-64-mwaitx-bdver4.d
x86: adjust register names printed for MONITOR/MWAIT
2019-11-07 09:28:20 +01:00
x86-64-mwaitx-reg.l
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
x86-64-mwaitx-reg.s
Add support for monitorx/mwaitx instructions
2015-06-30 07:50:12 -07:00
x86-64-mwaitx.s
Add support for monitorx/mwaitx instructions
2015-06-30 07:50:12 -07:00
x86-64-nop-1.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nop-2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nop-3.d
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
2019-04-10 09:48:43 +02:00
x86-64-nop-4.d
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
2019-04-10 09:48:43 +02:00
x86-64-nop-5.d
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
2019-04-10 09:48:43 +02:00
x86-64-nop-6.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
x86-64-nops-1-core2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-1-g64.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-1-k8.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-1-pentium.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-1.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-3.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-4-core2.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-4-k8.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-4.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-5-k8.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-5.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops-7.d
x86: Rewrite NOP generation for fill and alignment
2018-03-07 04:18:56 -08:00
x86-64-nops.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-nops.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-notrack-intel.d
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
x86-64-notrack.d
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
x86-64-notrack.s
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
x86-64-notrackbad.l
x86: adjust ignored prefix warning for branches
2019-12-27 09:39:58 +01:00
x86-64-notrackbad.s
x86: Remove restriction on NOTRACK prefix position
2017-09-09 05:32:11 -07:00
x86-64-opcode-bad.d
Check invalid mask registers
2016-10-20 15:26:23 -07:00
x86-64-opcode-bad.s
Check invalid mask registers
2016-10-20 15:26:23 -07:00
x86-64-opcode-inval-intel.d
Stop "objdump -d" from disassembling past a symbolic address.
2015-06-22 16:53:27 +01:00
x86-64-opcode-inval.d
Stop "objdump -d" from disassembling past a symbolic address.
2015-06-22 16:53:27 +01:00
x86-64-opcode-inval.s
binutils/
2008-04-03 14:03:21 +00:00
x86-64-opcode.d
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-opcode.s
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-optimize-1.d
x86-64: also optimize ANDQ with immediate fitting in 7 bits
2019-06-25 09:35:17 +02:00
x86-64-optimize-1.s
x86-64: also optimize ANDQ with immediate fitting in 7 bits
2019-06-25 09:35:17 +02:00
x86-64-optimize-2.d
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-optimize-2.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
x86-64-optimize-2a.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
x86-64-optimize-2b.d
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-optimize-2b.s
x86: Correct EVEX to 128-bit EVEX optimization
2019-03-19 21:11:21 +08:00
x86-64-optimize-3.d
i386: Also check R12-R15 registers when optimizing testq to testb
2019-12-12 12:31:26 -08:00
x86-64-optimize-3.s
i386: Also check R12-R15 registers when optimizing testq to testb
2019-12-12 12:31:26 -08:00
x86-64-optimize-3b.d
i386: Also check R12-R15 registers when optimizing testq to testb
2019-12-12 12:31:26 -08:00
x86-64-optimize-4.d
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
x86-64-optimize-4.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
x86-64-optimize-5.d
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-optimize-5.s
x86: Optimize EVEX vector load/store instructions
2019-03-18 08:58:19 +08:00
x86-64-optimize-6.d
x86-64: optimize certain commutative VEX-encoded insns
2019-07-01 08:33:56 +02:00
x86-64-optimize-6.s
x86: optimize EVEX packed integer logical instructions
2019-07-01 08:31:14 +02:00
x86-64-optimize-7.s
x86: Correctly optimize EVEX to 128-bit VEX/EVEX
2019-03-17 07:25:22 +08:00
x86-64-optimize-7a.l
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
x86-64-optimize-7a.s
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
x86-64-optimize-7b.d
x86: Correctly optimize EVEX to 128-bit VEX/EVEX
2019-03-17 07:25:22 +08:00
x86-64-optimize-8.l
ix86: Disable AVX512F when disabling AVX2
2019-03-19 21:08:31 +08:00
x86-64-optimize-8.s
x86: Optimize EVEX vector load/store instructions
2019-03-18 08:58:19 +08:00
x86-64-opts-intel.d
gas/testsuite/
2009-01-12 16:04:11 +00:00
x86-64-opts.d
gas/testsuite/
2009-01-12 16:04:11 +00:00
x86-64-opts.s
gas/testsuite/
2009-01-12 16:04:11 +00:00
x86-64-ospke.d
Implement Intel OSPKE instructions
2015-12-09 08:01:57 -08:00
x86-64-pconfig-intel.d
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
x86-64-pconfig.d
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
x86-64-pconfig.s
Enable Intel PCONFIG instruction.
2018-01-23 20:09:35 +03:00
x86-64-pcrel.d
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
x86-64-pcrel.s
bfd/
2005-06-17 08:03:59 +00:00
x86-64-pr20141.d
Enable VREX for AVX512 directives
2016-05-25 10:49:25 -07:00
x86-64-pr20141.s
Enable VREX for AVX512 directives
2016-05-25 10:49:25 -07:00
x86-64-prefetch-intel.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-prefetch.d
Add Intel AVX-512 support
2013-07-26 17:20:25 +00:00
x86-64-prefetchwt1-intel.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
x86-64-prefetchwt1.d
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
x86-64-prefetchwt1.s
Add support for CPUID PREFETCHWT1
2014-02-21 08:04:00 -08:00
x86-64-property-1.d
Change the output of readelf's note display so that the "Data size" column header is left justified.
2019-08-08 17:04:31 +01:00
x86-64-property-2.d
Change the output of readelf's note display so that the "Data size" column header is left justified.
2019-08-08 17:04:31 +01:00
x86-64-property-3.d
x86: Mark cvtpi2ps and cvtpi2pd as MMX
2020-02-19 04:54:45 -08:00
x86-64-pseudos-bad.l
x86-64: REX prefix is invalid with VEX etc
2020-06-25 09:26:28 +02:00
x86-64-pseudos-bad.s
x86-64: REX prefix is invalid with VEX etc
2020-06-25 09:26:28 +02:00
x86-64-pseudos.d
x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)
2020-07-28 04:04:34 -07:00
x86-64-pseudos.s
x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)
2020-07-28 04:04:34 -07:00
x86-64-ptwrite-intel.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-ptwrite.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-ptwrite.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-rdpid-intel.d
Enable Intel RDPID instruction.
2016-05-10 21:38:39 +03:00
x86-64-rdpid.d
Enable Intel RDPID instruction.
2016-05-10 21:38:39 +03:00
x86-64-rdpid.s
Enable Intel RDPID instruction.
2016-05-10 21:38:39 +03:00
x86-64-rdrnd-intel.d
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
x86-64-rdrnd.d
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
x86-64-rdrnd.s
Replace rdrnd with rdrand.
2010-07-05 17:14:22 +00:00
x86-64-rdseed-intel.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-rdseed.d
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-rdseed.s
Implement RDRSEED, ADX and PRFCHW instructions
2012-07-16 12:58:29 +00:00
x86-64-reg-bad.l
mingw gas testsuite fix
2017-11-21 00:09:23 +10:30
x86-64-reg-bad.s
x86-64: don't allow use of %axl as accumulator
2017-11-15 08:48:51 +01:00
x86-64-reg-intel.d
x86-64: don't allow use of %axl as accumulator
2017-11-15 08:48:51 +01:00
x86-64-reg.d
x86-64: don't allow use of %axl as accumulator
2017-11-15 08:48:51 +01:00
x86-64-reg.s
x86-64: don't allow use of %axl as accumulator
2017-11-15 08:48:51 +01:00
x86-64-relax-1.d
* gas/i386/x86-64-relax-1.s: Use .balign. not .align.
2010-10-26 22:38:57 +00:00
x86-64-relax-1.s
* gas/i386/x86-64-relax-1.s: Use .balign. not .align.
2010-10-26 22:38:57 +00:00
x86-64-relax-2.d
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
2019-04-10 09:48:43 +02:00
x86-64-relax-3.d
Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86
2019-04-10 09:48:43 +02:00
x86-64-relax-4.d
x86: Change PLT32 reloc against section to PC32
2020-07-19 11:30:20 -07:00
x86-64-relax-4.s
x86: Resolve PLT32 reloc aganst local symbol to section
2020-02-13 13:44:29 -08:00
x86-64-rep-suffix.d
gas/testsuite/
2012-07-02 18:12:28 +00:00
x86-64-rep-suffix.s
gas/testsuite/
2012-07-02 18:12:28 +00:00
x86-64-rep.d
Rewrite prefix processing.
2009-11-13 20:42:10 +00:00
x86-64-rep.s
gas/testsuite/
2006-03-07 20:18:06 +00:00
x86-64-rip-intel.d
gas/
2007-09-17 14:46:12 +00:00
x86-64-rip.d
gas/
2007-09-17 14:46:12 +00:00
x86-64-rip.s
gas/
2007-09-17 14:46:12 +00:00
x86-64-rtm-intel.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-rtm.d
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-rtm.s
Implement Intel Transactional Synchronization Extensions
2012-02-08 18:20:41 +00:00
x86-64-se1.d
x86: Add Intel ENCLV to assembler and disassembler
2018-10-05 11:56:42 -07:00
x86-64-se1.s
x86: Add Intel ENCLV to assembler and disassembler
2018-10-05 11:56:42 -07:00
x86-64-segment.l
gas/testsuite/
2005-03-29 19:30:47 +00:00
x86-64-segment.s
gas/testsuite/
2005-03-29 19:30:47 +00:00
x86-64-segovr.d
Despite them being ignored by the CPU, gas issues segment override
2012-08-07 16:57:49 +00:00
x86-64-segovr.s
Despite them being ignored by the CPU, gas issues segment override
2012-08-07 16:57:49 +00:00
x86-64-serialize.d
Add support for intel SERIALIZE instruction
2020-04-02 05:48:36 -07:00
x86-64-sha.d
Update x86 gas tests for mingw
2013-11-18 14:37:23 -08:00
x86-64-sha.s
Support Intel SHA
2013-07-25 16:16:35 +00:00
x86-64-sib-intel.d
gas/testsuite/
2008-01-24 15:11:35 +00:00
x86-64-sib.d
gas/testsuite/
2008-01-24 15:11:35 +00:00
x86-64-sib.s
gas/testsuite/
2008-01-24 15:11:35 +00:00
x86-64-simd-intel.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-simd-suffix.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-simd.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-simd.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-size-1.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
x86-64-size-2.d
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
x86-64-size-3.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
x86-64-size-4.d
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
x86-64-size-5.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
x86-64-size-5.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
x86-64-size-inval-1.l
Fix whitespace in gas listing errors and warnings
2014-05-22 18:53:22 +09:30
x86-64-size-inval-1.s
Add x86 size relocation support to gas
2013-01-17 04:28:48 +00:00
x86-64-smap.d
Implement Intel SMAP instructions
2013-02-19 19:10:31 +00:00
x86-64-specific-reg.l
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
x86-64-specific-reg.s
x86: eliminate ImmExt abuse
2019-11-12 09:08:32 +01:00
x86-64-sse-check-error.l
x86: drop SSE4a from SSE check again
2020-06-16 10:34:55 +02:00
x86-64-sse-check-error.s
gas/
2008-04-10 17:53:40 +00:00
x86-64-sse-check-none.d
x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
2018-03-08 08:35:01 +01:00
x86-64-sse-check-warn.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
x86-64-sse-check.d
x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
2018-03-08 08:35:01 +01:00
x86-64-sse-noavx.d
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-sse-noavx.s
x86: improve handling of insns with ambiguous operand sizes
2020-01-21 08:28:25 +01:00
x86-64-sse2avx-opts-intel.d
Update gas/i386/sse2avx-opts.d, gas/i386/sse2avx-opts-intel.d,
2009-01-12 16:53:08 +00:00
x86-64-sse2avx-opts.d
Update gas/i386/sse2avx-opts.d, gas/i386/sse2avx-opts-intel.d,
2009-01-12 16:53:08 +00:00
x86-64-sse2avx.d
x86-64: honor REX prefixes for SSE2AVX
2020-06-25 09:25:52 +02:00
x86-64-sse2avx.s
x86-64: honor REX prefixes for SSE2AVX
2020-06-25 09:25:52 +02:00
x86-64-sse3-intel.d
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
x86-64-sse3.d
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
x86-64-sse3.s
x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
2020-02-17 08:57:54 +01:00
x86-64-sse4_1-intel.d
gas/testsuite/
2008-01-04 18:03:02 +00:00
x86-64-sse4_1.d
gas/testsuite/
2008-01-04 18:03:02 +00:00
x86-64-sse4_1.s
gas/testsuite/
2007-09-12 13:20:31 +00:00
x86-64-sse4_2-intel.d
x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-28 10:53:35 +01:00
x86-64-sse4_2.d
x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-28 10:53:35 +01:00
x86-64-sse4_2.s
x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-28 10:53:35 +01:00
x86-64-ssse3.d
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
2009-09-14 14:44:58 +00:00
x86-64-ssse3.s
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
2009-09-14 14:44:58 +00:00
x86-64-stack-intel.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-stack-suffix.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-stack.d
Properly display extra data/address size prefixes
2014-05-09 10:58:00 -07:00
x86-64-stack.s
gas/testsuite/
2012-08-06 22:08:25 +00:00
x86-64-suffix-bad.l
x86: fix register check in check_qword_reg()
2016-07-05 11:14:51 +02:00
x86-64-suffix-bad.s
x86: fix register check in check_qword_reg()
2016-07-05 11:14:51 +02:00
x86-64-suffix-intel.d
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-suffix.d
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-suffix.e
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-suffix.s
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86-64-sysenter-amd.d
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
x86-64-sysenter-amd.l
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
x86-64-sysenter-amd.s
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
x86-64-sysenter-intel.d
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
x86-64-sysenter-mixed.d
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
2020-01-09 11:38:01 +01:00
x86-64-sysenter.d
x86: Accept Intel64 only instruction by default
2020-02-10 08:37:36 -08:00
x86-64-tbm-intel.d
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
x86-64-tbm.d
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
x86-64-tbm.s
Add TBM testsuite files missing from last commit.
2011-01-17 22:17:16 +00:00
x86-64-tsxldtrk.d
x86: Correct xsusldtrk mnemonic
2020-06-14 05:18:35 -07:00
x86-64-unique.d
x86: Run unique tests only for ELF targets
2020-02-06 04:44:39 -08:00
x86-64-unwind.d
Fix assembler tests to work with toolchains that have been configured with --enable-generate-build-notes.
2019-07-03 15:26:32 +01:00
x86-64-unwind.s
bfd/
2004-10-08 13:55:11 +00:00
x86-64-vaes-intel.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
x86-64-vaes.d
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
x86-64-vaes.s
Enable Intel VAES instructions.
2017-10-23 15:58:18 +03:00
x86-64-vex-lig-2.d
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
x86-64-vex-lig-2.s
x86: fix various non-LIG templates
2018-11-06 11:42:08 +01:00
x86-64-vgather-check-error.l
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
x86-64-vgather-check-error.s
The VGATHER group of instructions requires that all three involved
2012-08-07 16:55:00 +00:00
x86-64-vgather-check-none.d
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
x86-64-vgather-check-none.s
The VGATHER group of instructions requires that all three involved
2012-08-07 16:55:00 +00:00
x86-64-vgather-check-warn.d
gas run_dump_test rename stderr and error-output
2018-09-15 16:24:18 +09:30
x86-64-vgather-check-warn.e
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
x86-64-vgather-check.d
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
x86-64-vgather-check.s
x86: Check invalid XMM register in AVX512 gathers
2017-10-26 11:18:25 -07:00
x86-64-vmfunc.d
Add vmfunc
2012-01-13 22:19:32 +00:00
x86-64-vmx.d
gas/
2005-07-15 13:49:53 +00:00
x86-64-vmx.s
gas/
2005-07-15 13:49:53 +00:00
x86-64-vp2intersect-intel.d
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-vp2intersect-inval-bcast.l
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-vp2intersect-inval-bcast.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-vp2intersect.d
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-vp2intersect.s
Enable Intel AVX512_VP2INTERSECT insn
2019-06-04 08:58:31 -07:00
x86-64-vpclmulqdq-intel.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-vpclmulqdq.d
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-vpclmulqdq.s
x86: add missing pseudo ops for VPCLMULQDQ ISA extension
2019-07-01 08:28:58 +02:00
x86-64-w64-pcrel.d
2008-07-09 Kai Tietz <kai.tietz@onevision.com>
2008-07-09 10:28:12 +00:00
x86-64-waitpkg-intel.d
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
x86-64-waitpkg.d
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
x86-64-waitpkg.s
x86: refine TPAUSE and UMWAIT
2020-03-06 08:48:48 +01:00
x86-64-wbnoinvd-intel.d
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
x86-64-wbnoinvd.d
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
x86-64-wbnoinvd.s
Enable Intel WBNOINVD instruction.
2018-01-23 20:05:33 +03:00
x86-64-xop.d
x86: add disassembler support for XOP VPCOM* pseudo-ops
2017-11-14 08:43:26 +01:00
x86-64-xop.s
2010-02-10 Quentin Neill <quentin.neill@amd.com>
2010-02-11 05:06:14 +00:00
x86-64-xsave-intel.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-xsave.d
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-xsave.s
Support AVX Programming Reference (June, 2010)
2010-07-01 21:55:02 +00:00
x86-64-xsavec-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-xsavec.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-xsavec.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-xsaves-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-xsaves.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86-64-xsaves.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
x86_64-intel.d
x86: restrict %tr<N> visibility
2020-06-08 08:39:57 +02:00
x86_64.d
x86: restrict %tr<N> visibility
2020-06-08 08:39:57 +02:00
x86_64.e
x86-64: also diagnose far returns / IRET with ambiguous operand size
2020-01-30 11:35:20 +01:00
x86_64.s
x86: restrict %tr<N> visibility
2020-06-08 08:39:57 +02:00
xmmhi32.d
gas/i386/xmmhi32.d: Also allow dir32 relocation
2018-05-06 19:16:47 -07:00
xmmhi32.s
x86: properly force / avoid forcing EVEX encoding
2018-04-26 08:49:41 +02:00
xmmhi64.d
x86: properly force / avoid forcing EVEX encoding
2018-04-26 08:49:41 +02:00
xmmhi64.s
x86: don't ignore mandatory pseudo prefixes
2020-06-09 08:46:22 +02:00
xmmword.l
x86: add CVT{,T}PS2PI cases to xmmwords test
2019-06-25 09:35:17 +02:00
xmmword.s
x86: add CVT{,T}PS2PI cases to xmmwords test
2019-06-25 09:35:17 +02:00
xop.d
x86: add disassembler support for XOP VPCOM* pseudo-ops
2017-11-14 08:43:26 +01:00
xop.s
2010-02-10 Quentin Neill <quentin.neill@amd.com>
2010-02-11 05:06:14 +00:00
xop32reg.d
x86: add disassembler support for XOP VPCOM* pseudo-ops
2017-11-14 08:43:26 +01:00
xop32reg.s
X86: Ignore REX_B bit for 32-bit XOP instructions
2016-11-28 09:21:05 -08:00
xsave-intel.d
x86: CpuXSAVE is a prereq for various other features
2018-04-26 08:48:56 +02:00
xsave.d
x86: CpuXSAVE is a prereq for various other features
2018-04-26 08:48:56 +02:00
xsave.s
x86: CpuXSAVE is a prereq for various other features
2018-04-26 08:48:56 +02:00
xsavec-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
xsavec.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
xsavec.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
xsaves-intel.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
xsaves.d
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
xsaves.s
Add clflushopt, xsaves, xsavec, xrstors
2014-02-12 07:50:24 -08:00
2cd5bade18