235 lines
5.7 KiB
C
235 lines
5.7 KiB
C
/* Blackfin Parallel Port Interface (PPI) model
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For "old style" PPIs on BF53x/etc... parts.
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Copyright (C) 2010-2011 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "sim-main.h"
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#include "devices.h"
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#include "dv-bfin_ppi.h"
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#include "gui.h"
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/* XXX: TX is merely a stub. */
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struct bfin_ppi
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{
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/* This top portion matches common dv_bfin struct. */
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bu32 base;
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struct hw *dma_master;
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bool acked;
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struct hw_event *handler;
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char saved_byte;
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int saved_count;
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/* GUI state. */
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void *gui_state;
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int color;
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/* Order after here is important -- matches hardware MMR layout. */
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bu16 BFIN_MMR_16(control);
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bu16 BFIN_MMR_16(status);
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bu16 BFIN_MMR_16(count);
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bu16 BFIN_MMR_16(delay);
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bu16 BFIN_MMR_16(frame);
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};
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#define mmr_base() offsetof(struct bfin_ppi, control)
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#define mmr_offset(mmr) (offsetof(struct bfin_ppi, mmr) - mmr_base())
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static const char * const mmr_names[] =
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{
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"PPI_CONTROL", "PPI_STATUS", "PPI_COUNT", "PPI_DELAY", "PPI_FRAME",
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};
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#define mmr_name(off) mmr_names[(off) / 4]
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static void
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bfin_ppi_gui_setup (struct bfin_ppi *ppi)
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{
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int bpp;
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/* If we are in RX mode, nothing to do. */
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if (!(ppi->control & PORT_DIR))
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return;
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bpp = bfin_gui_color_depth (ppi->color);
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ppi->gui_state = bfin_gui_setup (ppi->gui_state,
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ppi->control & PORT_EN,
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(ppi->count + 1) / (bpp / 8),
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ppi->frame,
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ppi->color);
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}
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static unsigned
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bfin_ppi_io_write_buffer (struct hw *me, const void *source, int space,
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address_word addr, unsigned nr_bytes)
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{
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struct bfin_ppi *ppi = hw_data (me);
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bu32 mmr_off;
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bu32 value;
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bu16 *valuep;
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value = dv_load_2 (source);
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mmr_off = addr - ppi->base;
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valuep = (void *)((unsigned long)ppi + mmr_base() + mmr_off);
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HW_TRACE_WRITE ();
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dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
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switch (mmr_off)
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{
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case mmr_offset(control):
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*valuep = value;
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bfin_ppi_gui_setup (ppi);
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break;
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case mmr_offset(count):
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case mmr_offset(delay):
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case mmr_offset(frame):
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*valuep = value;
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break;
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case mmr_offset(status):
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dv_w1c_2 (valuep, value, (1 << 10));
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break;
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default:
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dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
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break;
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}
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return nr_bytes;
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}
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static unsigned
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bfin_ppi_io_read_buffer (struct hw *me, void *dest, int space,
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address_word addr, unsigned nr_bytes)
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{
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struct bfin_ppi *ppi = hw_data (me);
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bu32 mmr_off;
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bu16 *valuep;
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mmr_off = addr - ppi->base;
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valuep = (void *)((unsigned long)ppi + mmr_base() + mmr_off);
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HW_TRACE_READ ();
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dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
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switch (mmr_off)
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{
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case mmr_offset(control):
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case mmr_offset(count):
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case mmr_offset(delay):
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case mmr_offset(frame):
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case mmr_offset(status):
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dv_store_2 (dest, *valuep);
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break;
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default:
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dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
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break;
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}
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return nr_bytes;
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}
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static unsigned
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bfin_ppi_dma_read_buffer (struct hw *me, void *dest, int space,
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unsigned_word addr, unsigned nr_bytes)
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{
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HW_TRACE_DMA_READ ();
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return 0;
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}
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static unsigned
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bfin_ppi_dma_write_buffer (struct hw *me, const void *source,
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int space, unsigned_word addr,
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unsigned nr_bytes,
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int violate_read_only_section)
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{
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struct bfin_ppi *ppi = hw_data (me);
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HW_TRACE_DMA_WRITE ();
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return bfin_gui_update (ppi->gui_state, source, nr_bytes);
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}
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static const struct hw_port_descriptor bfin_ppi_ports[] =
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{
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{ "stat", 0, 0, output_port, },
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{ NULL, 0, 0, 0, },
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};
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static void
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attach_bfin_ppi_regs (struct hw *me, struct bfin_ppi *ppi)
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{
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address_word attach_address;
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int attach_space;
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unsigned attach_size;
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reg_property_spec reg;
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if (hw_find_property (me, "reg") == NULL)
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hw_abort (me, "Missing \"reg\" property");
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if (!hw_find_reg_array_property (me, "reg", 0, ®))
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hw_abort (me, "\"reg\" property must contain three addr/size entries");
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hw_unit_address_to_attach_address (hw_parent (me),
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®.address,
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&attach_space, &attach_address, me);
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hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
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if (attach_size != BFIN_MMR_PPI_SIZE)
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hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_PPI_SIZE);
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hw_attach_address (hw_parent (me),
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0, attach_space, attach_address, attach_size, me);
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ppi->base = attach_address;
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}
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static void
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bfin_ppi_finish (struct hw *me)
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{
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struct bfin_ppi *ppi;
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const char *color;
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ppi = HW_ZALLOC (me, struct bfin_ppi);
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set_hw_data (me, ppi);
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set_hw_io_read_buffer (me, bfin_ppi_io_read_buffer);
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set_hw_io_write_buffer (me, bfin_ppi_io_write_buffer);
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set_hw_dma_read_buffer (me, bfin_ppi_dma_read_buffer);
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set_hw_dma_write_buffer (me, bfin_ppi_dma_write_buffer);
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set_hw_ports (me, bfin_ppi_ports);
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attach_bfin_ppi_regs (me, ppi);
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/* Initialize the PPI. */
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if (hw_find_property (me, "color"))
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color = hw_find_string_property (me, "color");
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else
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color = NULL;
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ppi->color = bfin_gui_color (color);
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}
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const struct hw_descriptor dv_bfin_ppi_descriptor[] =
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{
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{"bfin_ppi", bfin_ppi_finish,},
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{NULL, NULL},
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};
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