523 lines
17 KiB
C
523 lines
17 KiB
C
/* GNU/Linux on ARM target support.
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Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "target.h"
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#include "value.h"
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#include "gdbtypes.h"
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#include "floatformat.h"
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#include "gdbcore.h"
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#include "frame.h"
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#include "regcache.h"
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/* For arm_linux_skip_solib_resolver. */
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#include "symtab.h"
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#include "symfile.h"
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#include "objfiles.h"
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#ifdef GET_LONGJMP_TARGET
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/* Figure out where the longjmp will land. We expect that we have
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just entered longjmp and haven't yet altered r0, r1, so the
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arguments are still in the registers. (A1_REGNUM) points at the
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jmp_buf structure from which we extract the pc (JB_PC) that we will
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land at. The pc is copied into ADDR. This routine returns true on
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success. */
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#define LONGJMP_TARGET_SIZE sizeof(int)
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#define JB_ELEMENT_SIZE sizeof(int)
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#define JB_SL 18
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#define JB_FP 19
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#define JB_SP 20
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#define JB_PC 21
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int
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arm_get_longjmp_target (CORE_ADDR * pc)
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{
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CORE_ADDR jb_addr;
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char buf[LONGJMP_TARGET_SIZE];
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jb_addr = read_register (A1_REGNUM);
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if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
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LONGJMP_TARGET_SIZE))
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return 0;
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*pc = extract_address (buf, LONGJMP_TARGET_SIZE);
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return 1;
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}
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#endif /* GET_LONGJMP_TARGET */
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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void
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arm_linux_extract_return_value (struct type *type,
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char regbuf[REGISTER_BYTES],
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char *valbuf)
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{
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/* ScottB: This needs to be looked at to handle the different
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floating point emulators on ARM Linux. Right now the code
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assumes that fetch inferior registers does the right thing for
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GDB. I suspect this won't handle NWFPE registers correctly, nor
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will the default ARM version (arm_extract_return_value()). */
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int regnum = (TYPE_CODE_FLT == TYPE_CODE (type)) ? F0_REGNUM : A1_REGNUM;
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memcpy (valbuf, ®buf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
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}
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/* Note: ScottB
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This function does not support passing parameters using the FPA
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variant of the APCS. It passes any floating point arguments in the
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general registers and/or on the stack.
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FIXME: This and arm_push_arguments should be merged. However this
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function breaks on a little endian host, big endian target
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using the COFF file format. ELF is ok.
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ScottB. */
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/* Addresses for calling Thumb functions have the bit 0 set.
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Here are some macros to test, set, or clear bit 0 of addresses. */
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#define IS_THUMB_ADDR(addr) ((addr) & 1)
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#define MAKE_THUMB_ADDR(addr) ((addr) | 1)
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#define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
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CORE_ADDR
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arm_linux_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
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int struct_return, CORE_ADDR struct_addr)
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{
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char *fp;
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int argnum, argreg, nstack_size;
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/* Walk through the list of args and determine how large a temporary
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stack is required. Need to take care here as structs may be
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passed on the stack, and we have to to push them. */
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nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
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if (struct_return) /* The struct address goes in A1. */
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nstack_size += REGISTER_SIZE;
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/* Walk through the arguments and add their size to nstack_size. */
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for (argnum = 0; argnum < nargs; argnum++)
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{
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int len;
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struct type *arg_type;
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arg_type = check_typedef (VALUE_TYPE (args[argnum]));
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len = TYPE_LENGTH (arg_type);
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/* ANSI C code passes float arguments as integers, K&R code
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passes float arguments as doubles. Correct for this here. */
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if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && REGISTER_SIZE == len)
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nstack_size += FP_REGISTER_VIRTUAL_SIZE;
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else
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nstack_size += len;
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}
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/* Allocate room on the stack, and initialize our stack frame
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pointer. */
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fp = NULL;
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if (nstack_size > 0)
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{
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sp -= nstack_size;
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fp = (char *) sp;
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}
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/* Initialize the integer argument register pointer. */
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argreg = A1_REGNUM;
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/* The struct_return pointer occupies the first parameter passing
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register. */
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if (struct_return)
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write_register (argreg++, struct_addr);
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/* Process arguments from left to right. Store as many as allowed
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in the parameter passing registers (A1-A4), and save the rest on
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the temporary stack. */
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for (argnum = 0; argnum < nargs; argnum++)
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{
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int len;
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char *val;
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double dbl_arg;
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CORE_ADDR regval;
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enum type_code typecode;
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struct type *arg_type, *target_type;
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arg_type = check_typedef (VALUE_TYPE (args[argnum]));
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target_type = TYPE_TARGET_TYPE (arg_type);
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len = TYPE_LENGTH (arg_type);
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typecode = TYPE_CODE (arg_type);
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val = (char *) VALUE_CONTENTS (args[argnum]);
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/* ANSI C code passes float arguments as integers, K&R code
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passes float arguments as doubles. The .stabs record for
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for ANSI prototype floating point arguments records the
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type as FP_INTEGER, while a K&R style (no prototype)
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.stabs records the type as FP_FLOAT. In this latter case
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the compiler converts the float arguments to double before
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calling the function. */
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if (TYPE_CODE_FLT == typecode && REGISTER_SIZE == len)
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{
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/* Float argument in buffer is in host format. Read it and
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convert to DOUBLEST, and store it in target double. */
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DOUBLEST dblval;
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len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
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floatformat_to_doublest (HOST_FLOAT_FORMAT, val, &dblval);
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store_floating (&dbl_arg, len, dblval);
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val = (char *) &dbl_arg;
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}
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/* If the argument is a pointer to a function, and it is a Thumb
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function, set the low bit of the pointer. */
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if (TYPE_CODE_PTR == typecode
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&& NULL != target_type
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&& TYPE_CODE_FUNC == TYPE_CODE (target_type))
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{
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CORE_ADDR regval = extract_address (val, len);
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if (arm_pc_is_thumb (regval))
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store_address (val, len, MAKE_THUMB_ADDR (regval));
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}
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/* Copy the argument to general registers or the stack in
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register-sized pieces. Large arguments are split between
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registers and stack. */
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while (len > 0)
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{
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int partial_len = len < REGISTER_SIZE ? len : REGISTER_SIZE;
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if (argreg <= ARM_LAST_ARG_REGNUM)
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{
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/* It's an argument being passed in a general register. */
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regval = extract_address (val, partial_len);
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write_register (argreg++, regval);
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}
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else
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{
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/* Push the arguments onto the stack. */
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write_memory ((CORE_ADDR) fp, val, REGISTER_SIZE);
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fp += REGISTER_SIZE;
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}
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len -= partial_len;
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val += partial_len;
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}
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}
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/* Return adjusted stack pointer. */
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return sp;
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}
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/*
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Dynamic Linking on ARM Linux
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----------------------------
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Note: PLT = procedure linkage table
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GOT = global offset table
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As much as possible, ELF dynamic linking defers the resolution of
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jump/call addresses until the last minute. The technique used is
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inspired by the i386 ELF design, and is based on the following
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constraints.
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1) The calling technique should not force a change in the assembly
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code produced for apps; it MAY cause changes in the way assembly
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code is produced for position independent code (i.e. shared
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libraries).
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2) The technique must be such that all executable areas must not be
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modified; and any modified areas must not be executed.
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To do this, there are three steps involved in a typical jump:
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1) in the code
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2) through the PLT
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3) using a pointer from the GOT
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When the executable or library is first loaded, each GOT entry is
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initialized to point to the code which implements dynamic name
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resolution and code finding. This is normally a function in the
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program interpreter (on ARM Linux this is usually ld-linux.so.2,
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but it does not have to be). On the first invocation, the function
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is located and the GOT entry is replaced with the real function
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address. Subsequent calls go through steps 1, 2 and 3 and end up
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calling the real code.
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1) In the code:
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b function_call
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bl function_call
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This is typical ARM code using the 26 bit relative branch or branch
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and link instructions. The target of the instruction
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(function_call is usually the address of the function to be called.
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In position independent code, the target of the instruction is
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actually an entry in the PLT when calling functions in a shared
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library. Note that this call is identical to a normal function
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call, only the target differs.
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2) In the PLT:
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The PLT is a synthetic area, created by the linker. It exists in
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both executables and libraries. It is an array of stubs, one per
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imported function call. It looks like this:
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PLT[0]:
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str lr, [sp, #-4]! @push the return address (lr)
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ldr lr, [pc, #16] @load from 6 words ahead
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add lr, pc, lr @form an address for GOT[0]
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ldr pc, [lr, #8]! @jump to the contents of that addr
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The return address (lr) is pushed on the stack and used for
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calculations. The load on the second line loads the lr with
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&GOT[3] - . - 20. The addition on the third leaves:
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lr = (&GOT[3] - . - 20) + (. + 8)
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lr = (&GOT[3] - 12)
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lr = &GOT[0]
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On the fourth line, the pc and lr are both updated, so that:
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pc = GOT[2]
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lr = &GOT[0] + 8
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= &GOT[2]
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NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
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"tight", but allows us to keep all the PLT entries the same size.
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PLT[n+1]:
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ldr ip, [pc, #4] @load offset from gotoff
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add ip, pc, ip @add the offset to the pc
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ldr pc, [ip] @jump to that address
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gotoff: .word GOT[n+3] - .
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The load on the first line, gets an offset from the fourth word of
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the PLT entry. The add on the second line makes ip = &GOT[n+3],
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which contains either a pointer to PLT[0] (the fixup trampoline) or
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a pointer to the actual code.
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3) In the GOT:
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The GOT contains helper pointers for both code (PLT) fixups and
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data fixups. The first 3 entries of the GOT are special. The next
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M entries (where M is the number of entries in the PLT) belong to
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the PLT fixups. The next D (all remaining) entries belong to
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various data fixups. The actual size of the GOT is 3 + M + D.
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The GOT is also a synthetic area, created by the linker. It exists
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in both executables and libraries. When the GOT is first
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initialized , all the GOT entries relating to PLT fixups are
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pointing to code back at PLT[0].
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The special entries in the GOT are:
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GOT[0] = linked list pointer used by the dynamic loader
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GOT[1] = pointer to the reloc table for this module
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GOT[2] = pointer to the fixup/resolver code
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The first invocation of function call comes through and uses the
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fixup/resolver code. On the entry to the fixup/resolver code:
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ip = &GOT[n+3]
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lr = &GOT[2]
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stack[0] = return address (lr) of the function call
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[r0, r1, r2, r3] are still the arguments to the function call
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This is enough information for the fixup/resolver code to work
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with. Before the fixup/resolver code returns, it actually calls
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the requested function and repairs &GOT[n+3]. */
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/* Find the minimal symbol named NAME, and return both the minsym
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struct and its objfile. This probably ought to be in minsym.c, but
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everything there is trying to deal with things like C++ and
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SOFUN_ADDRESS_MAYBE_TURQUOISE, ... Since this is so simple, it may
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be considered too special-purpose for general consumption. */
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static struct minimal_symbol *
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find_minsym_and_objfile (char *name, struct objfile **objfile_p)
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{
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struct objfile *objfile;
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ALL_OBJFILES (objfile)
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{
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struct minimal_symbol *msym;
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ALL_OBJFILE_MSYMBOLS (objfile, msym)
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{
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if (SYMBOL_NAME (msym)
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&& STREQ (SYMBOL_NAME (msym), name))
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{
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*objfile_p = objfile;
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return msym;
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}
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}
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}
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return 0;
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}
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static CORE_ADDR
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skip_hurd_resolver (CORE_ADDR pc)
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{
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/* The HURD dynamic linker is part of the GNU C library, so many
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GNU/Linux distributions use it. (All ELF versions, as far as I
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know.) An unresolved PLT entry points to "_dl_runtime_resolve",
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which calls "fixup" to patch the PLT, and then passes control to
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the function.
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We look for the symbol `_dl_runtime_resolve', and find `fixup' in
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the same objfile. If we are at the entry point of `fixup', then
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we set a breakpoint at the return address (at the top of the
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stack), and continue.
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It's kind of gross to do all these checks every time we're
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called, since they don't change once the executable has gotten
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started. But this is only a temporary hack --- upcoming versions
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of Linux will provide a portable, efficient interface for
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debugging programs that use shared libraries. */
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struct objfile *objfile;
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struct minimal_symbol *resolver
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= find_minsym_and_objfile ("_dl_runtime_resolve", &objfile);
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if (resolver)
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{
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struct minimal_symbol *fixup
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= lookup_minimal_symbol ("fixup", 0, objfile);
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if (fixup && SYMBOL_VALUE_ADDRESS (fixup) == pc)
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return (SAVED_PC_AFTER_CALL (get_current_frame ()));
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}
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return 0;
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}
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/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c.
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This function:
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1) decides whether a PLT has sent us into the linker to resolve
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a function reference, and
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2) if so, tells us where to set a temporary breakpoint that will
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trigger when the dynamic linker is done. */
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CORE_ADDR
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arm_linux_skip_solib_resolver (CORE_ADDR pc)
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{
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CORE_ADDR result;
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/* Plug in functions for other kinds of resolvers here. */
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result = skip_hurd_resolver (pc);
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if (result)
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return result;
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return 0;
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}
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/* The constants below were determined by examining the following files
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in the linux kernel sources:
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arch/arm/kernel/signal.c
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- see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
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include/asm-arm/unistd.h
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- see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
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#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
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#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
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/* arm_linux_in_sigtramp determines if PC points at one of the
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instructions which cause control to return to the Linux kernel upon
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return from a signal handler. FUNC_NAME is unused. */
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int
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arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
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{
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unsigned long inst;
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inst = read_memory_integer (pc, 4);
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return (inst == ARM_LINUX_SIGRETURN_INSTR
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|| inst == ARM_LINUX_RT_SIGRETURN_INSTR);
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}
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/* arm_linux_sigcontext_register_address returns the address in the
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sigcontext of register REGNO given a stack pointer value SP and
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program counter value PC. The value 0 is returned if PC is not
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pointing at one of the signal return instructions or if REGNO is
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not saved in the sigcontext struct. */
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CORE_ADDR
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arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
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{
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unsigned long inst;
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CORE_ADDR reg_addr = 0;
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inst = read_memory_integer (pc, 4);
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if (inst == ARM_LINUX_SIGRETURN_INSTR || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
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{
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CORE_ADDR sigcontext_addr;
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/* The sigcontext structure is at different places for the two
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signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
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it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
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it is at SP+8. For the latter instruction, it may also be
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the case that the address of this structure may be determined
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by reading the 4 bytes at SP, but I'm not convinced this is
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reliable.
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In any event, these magic constants (0 and 8) may be
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determined by examining struct sigframe and struct
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rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
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sources. */
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if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
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sigcontext_addr = sp + 8;
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else /* inst == ARM_LINUX_SIGRETURN_INSTR */
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sigcontext_addr = sp + 0;
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/* The layout of the sigcontext structure for ARM GNU/Linux is
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in include/asm-arm/sigcontext.h in the Linux kernel sources.
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There are three 4-byte fields which precede the saved r0
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field. (This accounts for the 12 in the code below.) The
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sixteen registers (4 bytes per field) follow in order. The
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PSR value follows the sixteen registers which accounts for
|
|
the constant 19 below. */
|
|
|
|
if (0 <= regno && regno <= PC_REGNUM)
|
|
reg_addr = sigcontext_addr + 12 + (4 * regno);
|
|
else if (regno == PS_REGNUM)
|
|
reg_addr = sigcontext_addr + 19 * 4;
|
|
}
|
|
|
|
return reg_addr;
|
|
}
|
|
|
|
void
|
|
_initialize_arm_linux_tdep (void)
|
|
{
|
|
}
|