95b965212b
Contribute the following change:
2003-09-24 Dave Brolley <brolley@redhat.com>
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
Use cgen_bitset_intersect_p.
1137 lines
27 KiB
C
1137 lines
27 KiB
C
/* m32c opcode support. -*- C -*-
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Copyright 2005 Free Software Foundation, Inc.
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Contributed by Red Hat Inc; developed under contract from Renesas
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This file is part of the GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* This file is an addendum to m32c.cpu. Heavy use of C code isn't
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appropriate in .cpu files, so it resides here. This especially applies
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to assembly/disassembly where parsing/printing can be quite involved.
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Such things aren't really part of the specification of the cpu, per se,
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so .cpu files provide the general framework and .opc files handle the
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nitty-gritty details as necessary.
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Each section is delimited with start and end markers.
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<arch>-opc.h additions use: "-- opc.h"
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<arch>-opc.c additions use: "-- opc.c"
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<arch>-asm.c additions use: "-- asm.c"
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<arch>-dis.c additions use: "-- dis.c"
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<arch>-ibd.h additions use: "-- ibd.h". */
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/* -- opc.h */
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/* Needed for RTL's 'ext' and 'trunc' operators. */
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#include "cgen-types.h"
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#include "cgen-ops.h"
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/* We can't use the default hash size because many bits are used by
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operands. */
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#define CGEN_DIS_HASH_SIZE 1
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#define CGEN_DIS_HASH(buf, value) 0
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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#define CGEN_VALIDATE_INSN_SUPPORTED
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extern int m32c_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
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#define CGEN_ASM_HASH_SIZE 0xffff
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#define CGEN_ASM_HASH(mnem) m32c_asm_hash ((mnem))
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/* -- */
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/* -- opc.c */
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static unsigned int
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m32c_asm_hash (const char *mnem)
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{
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unsigned int h;
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/* The length of the mnemonic for the Jcnd insns is 1. Hash jsri. */
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if (mnem[0] == 'j' && mnem[1] != 's')
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return 'j';
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/* Don't hash scCND */
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if (mnem[0] == 's' && mnem[1] == 'c')
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return 's';
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/* Don't hash bmCND */
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if (mnem[0] == 'b' && mnem[1] == 'm')
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return 'b';
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for (h = 0; *mnem && *mnem != ' ' && *mnem != ':'; ++mnem)
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h += *mnem;
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return h % CGEN_ASM_HASH_SIZE;
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}
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/* -- asm.c */
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#include "safe-ctype.h"
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#define MACH_M32C 5 /* Must match md_begin. */
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static int
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m32c_cgen_isa_register (const char **strp)
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{
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int u;
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const char *s = *strp;
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static char * m32c_register_names [] =
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{
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"r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
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"a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
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"drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
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"dma1", "dra0", "dra1", "dsa0", "dsa1", 0
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};
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for (u = 0; m32c_register_names[u]; u++)
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{
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int len = strlen (m32c_register_names[u]);
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if (memcmp (m32c_register_names[u], s, len) == 0
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&& (s[len] == 0 || ! ISALNUM (s[len])))
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return 1;
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}
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return 0;
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}
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#define PARSE_UNSIGNED \
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do \
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{ \
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/* Don't successfully parse literals beginning with '['. */ \
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if (**strp == '[') \
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return "Invalid literal"; /* Anything -- will not be seen. */ \
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\
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
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if (errmsg) \
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return errmsg; \
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} \
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while (0)
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#define PARSE_SIGNED \
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do \
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{ \
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/* Don't successfully parse literals beginning with '['. */ \
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if (**strp == '[') \
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return "Invalid literal"; /* Anything -- will not be seen. */ \
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\
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
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if (errmsg) \
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return errmsg; \
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} \
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while (0)
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static const char *
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parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, unsigned long *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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PARSE_UNSIGNED;
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if (value > 0x3f)
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return _("imm:6 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, unsigned long *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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long have_zero = 0;
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if (strncasecmp (*strp, "%dsp8(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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return _("%dsp8() takes a symbolic address, not a number");
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}
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*valuep = value;
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return errmsg;
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}
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if (strncmp (*strp, "0x0", 3) == 0
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|| (**strp == '0' && *(*strp + 1) != 'x'))
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have_zero = 1;
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PARSE_UNSIGNED;
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if (value > 0xff)
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return _("dsp:8 immediate is out of range");
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/* If this field may require a relocation then use larger dsp16. */
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if (! have_zero && value == 0)
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return _("dsp:8 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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long have_zero = 0;
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if (strncmp (*strp, "0x0", 3) == 0
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|| (**strp == '0' && *(*strp + 1) != 'x'))
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have_zero = 1;
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PARSE_SIGNED;
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if (value < -8 || value > 7)
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return _("Immediate is out of range -8 to 7");
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/* If this field may require a relocation then use larger dsp16. */
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if (! have_zero && value == 0)
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return _("Immediate is out of range -8 to 7");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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long have_zero = 0;
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if (strncmp (*strp, "0x0", 3) == 0
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|| (**strp == '0' && *(*strp + 1) != 'x'))
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have_zero = 1;
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PARSE_SIGNED;
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if (value < -7 || value > 8)
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return _("Immediate is out of range -7 to 8");
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/* If this field may require a relocation then use larger dsp16. */
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if (! have_zero && value == 0)
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return _("Immediate is out of range -7 to 8");
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*valuep = -value;
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return 0;
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}
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static const char *
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parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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if (strncasecmp (*strp, "%hi8(", 5) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 5;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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PARSE_SIGNED;
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if (value <= 255 && value > 127)
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value -= 0x100;
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if (value < -128 || value > 127)
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return _("dsp:8 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, unsigned long *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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long have_zero = 0;
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if (strncasecmp (*strp, "%dsp16(", 7) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 7;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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return _("%dsp16() takes a symbolic address, not a number");
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}
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*valuep = value;
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return errmsg;
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}
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/* Don't successfully parse literals beginning with '['. */
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if (**strp == '[')
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return "Invalid literal"; /* Anything -- will not be seen. */
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/* Don't successfully parse register names. */
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if (m32c_cgen_isa_register (strp))
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return "Invalid literal"; /* Anything -- will not be seen. */
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if (strncmp (*strp, "0x0", 3) == 0
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|| (**strp == '0' && *(*strp + 1) != 'x'))
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have_zero = 1;
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
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if (errmsg)
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return errmsg;
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if (value > 0xffff)
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return _("dsp:16 immediate is out of range");
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/* If this field may require a relocation then use larger dsp24. */
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if (cd->machs == MACH_M32C && ! have_zero && value == 0
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&& (strncmp (*strp, "[a", 2) == 0
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|| **strp == ','
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|| **strp == 0))
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return _("dsp:16 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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if (strncasecmp (*strp, "%lo16(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value &= 0xffff;
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}
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*valuep = value;
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return errmsg;
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}
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if (strncasecmp (*strp, "%hi16(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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PARSE_SIGNED;
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if (value <= 65535 && value > 32767)
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value -= 0x10000;
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if (value < -32768 || value > 32767)
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return _("dsp:16 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, unsigned long *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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/* Don't successfully parse literals beginning with '['. */
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if (**strp == '[')
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return "Invalid literal"; /* Anything -- will not be seen. */
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/* Don't successfully parse register names. */
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if (m32c_cgen_isa_register (strp))
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return "Invalid literal"; /* Anything -- will not be seen. */
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
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if (errmsg)
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return errmsg;
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if (value > 0xfffff)
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return _("dsp:20 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, unsigned long *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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|
||
/* Don't successfully parse literals beginning with '['. */
|
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if (**strp == '[')
|
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return "Invalid literal"; /* Anything -- will not be seen. */
|
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/* Don't successfully parse register names. */
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if (m32c_cgen_isa_register (strp))
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return "Invalid literal"; /* Anything -- will not be seen. */
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
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if (errmsg)
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return errmsg;
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if (value > 0xffffff)
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return _("dsp:24 immediate is out of range");
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*valuep = value;
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return 0;
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}
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|
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/* This should only be used for #imm->reg. */
|
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static const char *
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parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
|
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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PARSE_SIGNED;
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if (value <= 0xffffff && value > 0x7fffff)
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value -= 0x1000000;
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if (value > 0xffffff)
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return _("dsp:24 immediate is out of range");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
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int opindex, signed long *valuep)
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{
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const char *errmsg = 0;
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signed long value;
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
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if (errmsg)
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return errmsg;
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*valuep = value;
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return 0;
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}
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static const char *
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parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
|
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int opindex, signed long *valuep)
|
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{
|
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const char *errmsg = 0;
|
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signed long value;
|
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
|
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if (errmsg)
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return errmsg;
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if (value < 1 || value > 2)
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return _("immediate is out of range 1-2");
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*valuep = value;
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return 0;
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}
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static const char *
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parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
|
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int opindex, signed long *valuep)
|
||
{
|
||
const char *errmsg = 0;
|
||
signed long value;
|
||
|
||
errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
|
||
if (errmsg)
|
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return errmsg;
|
||
|
||
if (value < 1 || value > 8)
|
||
return _("immediate is out of range 1-8");
|
||
|
||
*valuep = value;
|
||
return 0;
|
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}
|
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|
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static const char *
|
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parse_lab_5_3 (CGEN_CPU_DESC cd,
|
||
const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED,
|
||
int opinfo,
|
||
enum cgen_parse_operand_result *type_addr,
|
||
bfd_vma *valuep)
|
||
{
|
||
const char *errmsg = 0;
|
||
bfd_vma value;
|
||
enum cgen_parse_operand_result op_res;
|
||
|
||
errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
|
||
opinfo, & op_res, & value);
|
||
|
||
if (type_addr)
|
||
*type_addr = op_res;
|
||
|
||
if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
|
||
{
|
||
/* This is a hack; the field cannot handle near-zero signed
|
||
offsets that CGEN wants to put in to indicate an "empty"
|
||
operand at first. */
|
||
*valuep = 2;
|
||
return 0;
|
||
}
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
if (value < 2 || value > 9)
|
||
return _("immediate is out of range 2-9");
|
||
|
||
*valuep = value;
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
const char *errmsg = 0;
|
||
unsigned long value;
|
||
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
if (value > 15)
|
||
return _("Bit number for indexing general register is out of range 0-15");
|
||
|
||
*valuep = value;
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep,
|
||
unsigned bits)
|
||
{
|
||
const char *errmsg = 0;
|
||
unsigned long bit;
|
||
unsigned long base;
|
||
const char *newp = *strp;
|
||
unsigned long long bitbase;
|
||
|
||
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
if (*newp != ',')
|
||
return "Missing base for bit,base:8";
|
||
|
||
++newp;
|
||
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
|
||
|
||
if (bitbase >= (1ull << bits))
|
||
return _("bit,base is out of range");
|
||
|
||
*valuep = bitbase;
|
||
*strp = newp;
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, signed long *valuep,
|
||
unsigned bits)
|
||
{
|
||
const char *errmsg = 0;
|
||
unsigned long bit;
|
||
signed long base;
|
||
const char *newp = *strp;
|
||
long long bitbase;
|
||
long long limit;
|
||
|
||
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
if (*newp != ',')
|
||
return "Missing base for bit,base:8";
|
||
|
||
++newp;
|
||
errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
bitbase = (long long)bit + ((long long)base * 8);
|
||
|
||
limit = 1ll << (bits - 1);
|
||
if (bitbase < -limit || bitbase >= limit)
|
||
return _("bit,base is out of range");
|
||
|
||
*valuep = bitbase;
|
||
*strp = newp;
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
|
||
}
|
||
|
||
static const char *
|
||
parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, unsigned long *valuep)
|
||
{
|
||
return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
|
||
}
|
||
|
||
static const char *
|
||
parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, signed long *valuep)
|
||
{
|
||
return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
|
||
}
|
||
|
||
static const char *
|
||
parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, signed long *valuep)
|
||
{
|
||
return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
|
||
}
|
||
|
||
static const char *
|
||
parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex, signed long *valuep)
|
||
{
|
||
return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
|
||
}
|
||
|
||
/* Parse the suffix as :<char> or as nothing followed by a whitespace. */
|
||
|
||
static const char *
|
||
parse_suffix (const char **strp, char suffix)
|
||
{
|
||
const char *newp = *strp;
|
||
|
||
if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
|
||
newp = *strp + 2;
|
||
|
||
if (ISSPACE (*newp))
|
||
{
|
||
*strp = newp;
|
||
return 0;
|
||
}
|
||
|
||
return "Invalid suffix"; /* Anything -- will not be seen. */
|
||
}
|
||
|
||
static const char *
|
||
parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
return parse_suffix (strp, 's');
|
||
}
|
||
|
||
static const char *
|
||
parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
return parse_suffix (strp, 'g');
|
||
}
|
||
|
||
static const char *
|
||
parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
return parse_suffix (strp, 'q');
|
||
}
|
||
|
||
static const char *
|
||
parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
return parse_suffix (strp, 'z');
|
||
}
|
||
|
||
/* Parse an empty suffix. Fail if the next char is ':'. */
|
||
|
||
static const char *
|
||
parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
if (**strp == ':')
|
||
return "Unexpected suffix";
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep)
|
||
{
|
||
const char *errmsg;
|
||
signed long value;
|
||
signed long junk;
|
||
const char *newp = *strp;
|
||
|
||
/* Parse r0[hl]. */
|
||
errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
if (*newp != ',')
|
||
return _("not a valid r0l/r0h pair");
|
||
++newp;
|
||
|
||
/* Parse the second register in the pair. */
|
||
if (value == 0) /* r0l */
|
||
errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
|
||
else
|
||
errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
*strp = newp;
|
||
*valuep = ! value;
|
||
return 0;
|
||
}
|
||
|
||
/* Accept .b or .w in any case. */
|
||
|
||
static const char *
|
||
parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
|
||
{
|
||
if (**strp == '.'
|
||
&& (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
|
||
|| *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
|
||
{
|
||
*strp += 2;
|
||
return NULL;
|
||
}
|
||
|
||
return _("Invalid size specifier");
|
||
}
|
||
|
||
/* Special check to ensure that instruction exists for given machine. */
|
||
|
||
int
|
||
m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
|
||
const CGEN_INSN *insn)
|
||
{
|
||
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
|
||
CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
|
||
|
||
/* If attributes are absent, assume no restriction. */
|
||
if (machs == 0)
|
||
machs = ~0;
|
||
|
||
return ((machs & cd->machs)
|
||
&& cgen_bitset_intersect_p (& isas, cd->isas));
|
||
}
|
||
|
||
/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
|
||
|
||
static const char *
|
||
parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED,
|
||
unsigned long *valuep,
|
||
int push)
|
||
{
|
||
const char *errmsg = 0;
|
||
int regno = 0;
|
||
|
||
*valuep = 0;
|
||
while (**strp && **strp != ')')
|
||
{
|
||
if (**strp == 'r' || **strp == 'R')
|
||
{
|
||
++*strp;
|
||
regno = **strp - '0';
|
||
if (regno > 4)
|
||
errmsg = _("Register number is not valid");
|
||
}
|
||
else if (**strp == 'a' || **strp == 'A')
|
||
{
|
||
++*strp;
|
||
regno = **strp - '0';
|
||
if (regno > 2)
|
||
errmsg = _("Register number is not valid");
|
||
regno = **strp - '0' + 4;
|
||
}
|
||
|
||
else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
|
||
{
|
||
regno = 6;
|
||
++*strp;
|
||
}
|
||
|
||
else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
|
||
{
|
||
regno = 7;
|
||
++*strp;
|
||
}
|
||
|
||
if (push) /* Mask is reversed for push. */
|
||
*valuep |= 0x80 >> regno;
|
||
else
|
||
*valuep |= 1 << regno;
|
||
|
||
++*strp;
|
||
if (**strp == ',')
|
||
{
|
||
if (*(*strp + 1) == ')')
|
||
break;
|
||
++*strp;
|
||
}
|
||
}
|
||
|
||
if (!*strp)
|
||
errmsg = _("Register list is not valid");
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
#define POP 0
|
||
#define PUSH 1
|
||
|
||
static const char *
|
||
parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED,
|
||
unsigned long *valuep)
|
||
{
|
||
return parse_regset (cd, strp, opindex, valuep, POP);
|
||
}
|
||
|
||
static const char *
|
||
parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
const char **strp,
|
||
int opindex ATTRIBUTE_UNUSED,
|
||
unsigned long *valuep)
|
||
{
|
||
return parse_regset (cd, strp, opindex, valuep, PUSH);
|
||
}
|
||
|
||
/* -- dis.c */
|
||
|
||
#include "elf/m32c.h"
|
||
#include "elf-bfd.h"
|
||
|
||
/* Always print the short insn format suffix as ':<char>'. */
|
||
|
||
static void
|
||
print_suffix (void * dis_info, char suffix)
|
||
{
|
||
disassemble_info *info = dis_info;
|
||
|
||
(*info->fprintf_func) (info->stream, ":%c", suffix);
|
||
}
|
||
|
||
static void
|
||
print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_suffix (dis_info, 's');
|
||
}
|
||
|
||
|
||
static void
|
||
print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_suffix (dis_info, 'g');
|
||
}
|
||
|
||
static void
|
||
print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_suffix (dis_info, 'q');
|
||
}
|
||
|
||
static void
|
||
print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_suffix (dis_info, 'z');
|
||
}
|
||
|
||
/* Print the empty suffix. */
|
||
|
||
static void
|
||
print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info ATTRIBUTE_UNUSED,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
return;
|
||
}
|
||
|
||
static void
|
||
print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = dis_info;
|
||
|
||
if (value == 0)
|
||
(*info->fprintf_func) (info->stream, "r0h,r0l");
|
||
else
|
||
(*info->fprintf_func) (info->stream, "r0l,r0h");
|
||
}
|
||
|
||
static void
|
||
print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
unsigned long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = dis_info;
|
||
|
||
(*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
|
||
}
|
||
|
||
static void
|
||
print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
signed long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = dis_info;
|
||
|
||
(*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
|
||
}
|
||
|
||
static void
|
||
print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value ATTRIBUTE_UNUSED,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
/* Always print the size as '.w'. */
|
||
disassemble_info *info = dis_info;
|
||
|
||
(*info->fprintf_func) (info->stream, ".w");
|
||
}
|
||
|
||
#define POP 0
|
||
#define PUSH 1
|
||
|
||
static void print_pop_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
|
||
static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
|
||
|
||
/* Print a set of registers, R0,R1,A0,A1,SB,FB. */
|
||
|
||
static void
|
||
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED,
|
||
int push)
|
||
{
|
||
static char * m16c_register_names [] =
|
||
{
|
||
"r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
|
||
};
|
||
disassemble_info *info = dis_info;
|
||
int mask;
|
||
int index = 0;
|
||
char* comma = "";
|
||
|
||
if (push)
|
||
mask = 0x80;
|
||
else
|
||
mask = 1;
|
||
|
||
if (value & mask)
|
||
{
|
||
(*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
|
||
comma = ",";
|
||
}
|
||
|
||
for (index = 1; index <= 7; ++index)
|
||
{
|
||
if (push)
|
||
mask >>= 1;
|
||
else
|
||
mask <<= 1;
|
||
|
||
if (value & mask)
|
||
{
|
||
(*info->fprintf_func) (info->stream, "%s%s", comma,
|
||
m16c_register_names [index]);
|
||
comma = ",";
|
||
}
|
||
}
|
||
}
|
||
|
||
static void
|
||
print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_regset (cd, dis_info, value, attrs, pc, length, POP);
|
||
}
|
||
|
||
static void
|
||
print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
|
||
}
|
||
|
||
static void
|
||
print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
signed long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = dis_info;
|
||
|
||
(*info->fprintf_func) (info->stream, "%ld", -value);
|
||
}
|