abf874aafe
2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
779 lines
24 KiB
Plaintext
779 lines
24 KiB
Plaintext
# This shell script emits a C file. -*- C -*-
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# Copyright (C) 1991-2020 Free Software Foundation, Inc.
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#
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# This file is part of the GNU Binutils.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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# MA 02110-1301, USA.
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#
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# This file is sourced from elf.em, and defines extra arm-elf
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# specific routines.
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#
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test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
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fragment <<EOF
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#include "ldctor.h"
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#include "elf/arm.h"
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#include "elf32-arm.h"
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static struct elf32_arm_params params =
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{
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NULL, /* thumb_entry_symbol */
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0, /* byteswap_code */
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0${TARGET1_IS_REL}, /* target1_is_rel */
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"${TARGET2_TYPE}", /* target2_type */
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0, /* fix_v4bx */
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0, /* use_blx */
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BFD_ARM_VFP11_FIX_DEFAULT, /* vfp11_denorm_fix */
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BFD_ARM_STM32L4XX_FIX_NONE, /* stm32l4xx_fix */
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0, /* no_enum_size_warning */
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0, /* no_wchar_size_warning */
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0, /* pic_veneer */
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-1, /* fix_cortex_a8 */
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1, /* fix_arm1176 */
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-1, /* merge_exidx_entries */
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0, /* cmse_implib */
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NULL /* in_implib_bfd */
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};
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static char *in_implib_filename = NULL;
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static void
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gld${EMULATION_NAME}_before_parse (void)
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{
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#ifndef TARGET_ /* I.e., if not generic. */
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ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
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#endif /* not TARGET_ */
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input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
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config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
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config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
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link_info.check_relocs_after_open_input = TRUE;
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link_info.relro = DEFAULT_LD_Z_RELRO;
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}
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static void
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gld${EMULATION_NAME}_set_symbols (void)
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{
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/* PR 19106: The section resizing code in gldarmelf_after_allocation
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is effectively the same as relaxation, so prevent early memory
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region checks which produce bogus error messages.
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Note - this test has nothing to do with symbols. It is just here
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because this is the first emulation routine that is called after
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the command line has been parsed. */
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if (!bfd_link_relocatable (&link_info))
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TARGET_ENABLE_RELAXATION;
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}
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static void
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arm_elf_before_allocation (void)
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{
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bfd_elf32_arm_set_byteswap_code (&link_info, params.byteswap_code);
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/* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
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due to architecture version. */
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bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
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/* Choose type of STM32L4XX erratum fix, or warn if specified fix is
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unnecessary due to architecture version. */
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bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
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/* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
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bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
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/* Ensure the output sections of veneers needing a dedicated one is not
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removed. */
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bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
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/* We should be able to set the size of the interworking stub section. We
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can't do it until later if we have dynamic sections, though. */
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if (elf_hash_table (&link_info)->dynobj == NULL)
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{
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/* Here we rummage through the found bfds to collect glue information. */
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LANG_FOR_EACH_INPUT_STATEMENT (is)
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{
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/* Initialise mapping tables for code/data. */
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bfd_elf32_arm_init_maps (is->the_bfd);
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if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
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&link_info)
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|| !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
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|| !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
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&link_info))
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/* xgettext:c-format */
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einfo (_("%P: errors encountered processing file %s\n"),
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is->filename);
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}
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/* We have seen it all. Allocate it, and carry on. */
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bfd_elf32_arm_allocate_interworking_sections (& link_info);
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}
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/* Call the standard elf routine. */
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gld${EMULATION_NAME}_before_allocation ();
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}
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/* Fake input file for stubs. */
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static lang_input_statement_type *stub_file;
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/* Whether we need to call gldarm_layout_sections_again. */
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static int need_laying_out = 0;
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/* Maximum size of a group of input sections that can be handled by
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one stub section. A value of +/-1 indicates the bfd back-end
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should use a suitable default size. */
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static bfd_signed_vma group_size = 1;
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struct hook_stub_info
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{
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lang_statement_list_type add;
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asection *input_section;
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};
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/* Traverse the linker tree to find the spot where the stub goes. */
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static bfd_boolean
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hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
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{
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lang_statement_union_type *l;
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bfd_boolean ret;
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for (; (l = *lp) != NULL; lp = &l->header.next)
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{
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switch (l->header.type)
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{
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case lang_constructors_statement_enum:
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ret = hook_in_stub (info, &constructor_list.head);
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if (ret)
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return ret;
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break;
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case lang_output_section_statement_enum:
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ret = hook_in_stub (info,
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&l->output_section_statement.children.head);
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if (ret)
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return ret;
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break;
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case lang_wild_statement_enum:
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ret = hook_in_stub (info, &l->wild_statement.children.head);
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if (ret)
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return ret;
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break;
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case lang_group_statement_enum:
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ret = hook_in_stub (info, &l->group_statement.children.head);
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if (ret)
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return ret;
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break;
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case lang_input_section_enum:
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if (l->input_section.section == info->input_section)
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{
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/* We've found our section. Insert the stub immediately
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after its associated input section. */
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*(info->add.tail) = l->header.next;
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l->header.next = info->add.head;
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return TRUE;
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}
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break;
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case lang_data_statement_enum:
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case lang_reloc_statement_enum:
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case lang_object_symbols_statement_enum:
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case lang_output_statement_enum:
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case lang_target_statement_enum:
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case lang_input_statement_enum:
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case lang_assignment_statement_enum:
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case lang_padding_statement_enum:
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case lang_address_statement_enum:
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case lang_fill_statement_enum:
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break;
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default:
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FAIL ();
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break;
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}
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}
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return FALSE;
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}
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/* Call-back for elf32_arm_size_stubs. */
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/* Create a new stub section, and arrange for it to be linked
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immediately after INPUT_SECTION. */
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static asection *
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elf32_arm_add_stub_section (const char * stub_sec_name,
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asection * output_section,
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asection * after_input_section,
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unsigned int alignment_power)
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{
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asection *stub_sec;
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flagword flags;
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lang_output_section_statement_type *os;
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struct hook_stub_info info;
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flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
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| SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP
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| SEC_LINKER_CREATED);
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stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
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stub_sec_name, flags);
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if (stub_sec == NULL)
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goto err_ret;
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bfd_set_section_alignment (stub_sec, alignment_power);
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os = lang_output_section_get (output_section);
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info.input_section = after_input_section;
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lang_list_init (&info.add);
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lang_add_section (&info.add, stub_sec, NULL, os);
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if (info.add.head == NULL)
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goto err_ret;
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if (after_input_section == NULL)
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{
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lang_statement_union_type **lp = &os->children.head;
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lang_statement_union_type *l, *lprev = NULL;
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for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
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if (lprev)
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lprev->header.next = info.add.head;
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else
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os->children.head = info.add.head;
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return stub_sec;
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}
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else
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{
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if (hook_in_stub (&info, &os->children.head))
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return stub_sec;
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}
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err_ret:
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einfo (_("%X%P: can not make stub section: %E\n"));
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return NULL;
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}
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/* Another call-back for elf_arm_size_stubs. */
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static void
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gldarm_layout_sections_again (void)
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{
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/* If we have changed sizes of the stub sections, then we need
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to recalculate all the section offsets. This may mean we need to
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add even more stubs. */
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ldelf_map_segments (TRUE);
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need_laying_out = -1;
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}
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static void
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build_section_lists (lang_statement_union_type *statement)
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{
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if (statement->header.type == lang_input_section_enum)
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{
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asection *i = statement->input_section.section;
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if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
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&& (i->flags & SEC_EXCLUDE) == 0
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&& i->output_section != NULL
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&& i->output_section->owner == link_info.output_bfd)
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elf32_arm_next_input_section (& link_info, i);
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}
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}
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static int
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compare_output_sec_vma (const void *a, const void *b)
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{
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asection *asec = *(asection **) a, *bsec = *(asection **) b;
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asection *aout = asec->output_section, *bout = bsec->output_section;
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bfd_vma avma, bvma;
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/* If there's no output section for some reason, compare equal. */
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if (!aout || !bout)
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return 0;
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avma = aout->vma + asec->output_offset;
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bvma = bout->vma + bsec->output_offset;
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if (avma > bvma)
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return 1;
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else if (avma < bvma)
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return -1;
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return 0;
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}
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static void
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gld${EMULATION_NAME}_after_allocation (void)
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{
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int ret;
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/* Build a sorted list of input text sections, then use that to process
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the unwind table index. */
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unsigned int list_size = 10;
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asection **sec_list = (asection **)
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xmalloc (list_size * sizeof (asection *));
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unsigned int sec_count = 0;
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LANG_FOR_EACH_INPUT_STATEMENT (is)
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{
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bfd *abfd = is->the_bfd;
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asection *sec;
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if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
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continue;
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for (sec = abfd->sections; sec != NULL; sec = sec->next)
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{
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asection *out_sec = sec->output_section;
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if (out_sec
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&& elf_section_data (sec)
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&& elf_section_type (sec) == SHT_PROGBITS
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&& (elf_section_flags (sec) & SHF_EXECINSTR) != 0
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&& (sec->flags & SEC_EXCLUDE) == 0
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&& sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
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&& out_sec != bfd_abs_section_ptr)
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{
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if (sec_count == list_size)
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{
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list_size *= 2;
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sec_list = (asection **)
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xrealloc (sec_list, list_size * sizeof (asection *));
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}
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sec_list[sec_count++] = sec;
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}
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}
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}
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qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
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if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
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params.merge_exidx_entries))
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need_laying_out = 1;
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free (sec_list);
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/* bfd_elf32_discard_info just plays with debugging sections,
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ie. doesn't affect any code, so we can delay resizing the
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sections. It's likely we'll resize everything in the process of
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adding stubs. */
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ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
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if (ret < 0)
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{
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einfo (_("%X%P: .eh_frame/.stab edit: %E\n"));
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return;
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}
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else if (ret > 0)
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need_laying_out = 1;
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/* If generating a relocatable output file, then we don't
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have to examine the relocs. */
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if (stub_file != NULL && !bfd_link_relocatable (&link_info))
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{
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ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
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if (ret != 0)
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{
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if (ret < 0)
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{
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einfo (_("%X%P: could not compute sections lists "
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"for stub generation: %E\n"));
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return;
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}
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lang_for_each_statement (build_section_lists);
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/* Call into the BFD backend to do the real work. */
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if (! elf32_arm_size_stubs (link_info.output_bfd,
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stub_file->the_bfd,
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& link_info,
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group_size,
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& elf32_arm_add_stub_section,
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& gldarm_layout_sections_again))
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{
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einfo (_("%X%P: can not size stub section: %E\n"));
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return;
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}
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}
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}
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if (need_laying_out != -1)
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ldelf_map_segments (need_laying_out);
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}
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static void
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gld${EMULATION_NAME}_finish (void)
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{
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struct bfd_link_hash_entry * h;
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{
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LANG_FOR_EACH_INPUT_STATEMENT (is)
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{
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/* Figure out where VFP11 erratum veneers (and the labels returning
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from same) have been placed. */
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bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
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/* Figure out where STM32L4XX erratum veneers (and the labels returning
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from them) have been placed. */
|
|
bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
|
|
}
|
|
}
|
|
|
|
if (!bfd_link_relocatable (&link_info))
|
|
{
|
|
/* Now build the linker stubs. */
|
|
if (stub_file->the_bfd->sections != NULL)
|
|
{
|
|
if (! elf32_arm_build_stubs (& link_info))
|
|
einfo (_("%X%P: can not build stubs: %E\n"));
|
|
}
|
|
}
|
|
|
|
finish_default ();
|
|
|
|
if (params.thumb_entry_symbol)
|
|
{
|
|
h = bfd_link_hash_lookup (link_info.hash, params.thumb_entry_symbol,
|
|
FALSE, FALSE, TRUE);
|
|
}
|
|
else
|
|
{
|
|
struct elf_link_hash_entry * eh;
|
|
|
|
if (!entry_symbol.name)
|
|
return;
|
|
|
|
h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
|
|
FALSE, FALSE, TRUE);
|
|
eh = (struct elf_link_hash_entry *)h;
|
|
if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
|
|
!= ST_BRANCH_TO_THUMB)
|
|
return;
|
|
}
|
|
|
|
|
|
if (h != (struct bfd_link_hash_entry *) NULL
|
|
&& (h->type == bfd_link_hash_defined
|
|
|| h->type == bfd_link_hash_defweak)
|
|
&& h->u.def.section->output_section != NULL)
|
|
{
|
|
static char buffer[32];
|
|
bfd_vma val;
|
|
|
|
/* Special procesing is required for a Thumb entry symbol. The
|
|
bottom bit of its address must be set. */
|
|
val = (h->u.def.value
|
|
+ bfd_section_vma (h->u.def.section->output_section)
|
|
+ h->u.def.section->output_offset);
|
|
|
|
val |= 1;
|
|
|
|
/* Now convert this value into a string and store it in entry_symbol
|
|
where the lang_finish() function will pick it up. */
|
|
buffer[0] = '0';
|
|
buffer[1] = 'x';
|
|
|
|
sprintf_vma (buffer + 2, val);
|
|
|
|
if (params.thumb_entry_symbol != NULL && entry_symbol.name != NULL
|
|
&& entry_from_cmdline)
|
|
einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
|
|
params.thumb_entry_symbol, entry_symbol.name);
|
|
entry_symbol.name = buffer;
|
|
}
|
|
else
|
|
einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
|
|
h->root.string);
|
|
}
|
|
|
|
/* This is a convenient point to tell BFD about target specific flags.
|
|
After the output has been created, but before inputs are read. */
|
|
static void
|
|
arm_elf_create_output_section_statements (void)
|
|
{
|
|
if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
|
|
{
|
|
/* The arm backend needs special fields in the output hash structure.
|
|
These will only be created if the output format is an arm format,
|
|
hence we do not support linking and changing output formats at the
|
|
same time. Use a link followed by objcopy to change output formats. */
|
|
einfo (_("%F%P: error: cannot change output format "
|
|
"whilst linking %s binaries\n"), "ARM");
|
|
return;
|
|
}
|
|
|
|
if (in_implib_filename)
|
|
{
|
|
params.in_implib_bfd = bfd_openr (in_implib_filename,
|
|
bfd_get_target (link_info.output_bfd));
|
|
|
|
if (params.in_implib_bfd == NULL)
|
|
einfo (_("%F%P: %s: can't open: %E\n"), in_implib_filename);
|
|
|
|
if (!bfd_check_format (params.in_implib_bfd, bfd_object))
|
|
einfo (_("%F%P: %s: not a relocatable file: %E\n"), in_implib_filename);
|
|
}
|
|
|
|
bfd_elf32_arm_set_target_params (link_info.output_bfd, &link_info, ¶ms);
|
|
|
|
stub_file = lang_add_input_file ("linker stubs",
|
|
lang_input_file_is_fake_enum,
|
|
NULL);
|
|
stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
|
|
if (stub_file->the_bfd == NULL
|
|
|| ! bfd_set_arch_mach (stub_file->the_bfd,
|
|
bfd_get_arch (link_info.output_bfd),
|
|
bfd_get_mach (link_info.output_bfd)))
|
|
{
|
|
einfo (_("%F%P: can not create BFD: %E\n"));
|
|
return;
|
|
}
|
|
|
|
stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
|
|
ldlang_add_file (stub_file);
|
|
|
|
/* Also use the stub file for stubs placed in a single output section. */
|
|
bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
|
|
bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
|
|
}
|
|
|
|
EOF
|
|
|
|
# Define some shell vars to insert bits of code into the standard elf
|
|
# parse_args and list_options functions.
|
|
#
|
|
PARSE_AND_LIST_PROLOGUE='
|
|
#define OPTION_THUMB_ENTRY 301
|
|
#define OPTION_BE8 302
|
|
#define OPTION_TARGET1_REL 303
|
|
#define OPTION_TARGET1_ABS 304
|
|
#define OPTION_TARGET2 305
|
|
#define OPTION_FIX_V4BX 306
|
|
#define OPTION_USE_BLX 307
|
|
#define OPTION_VFP11_DENORM_FIX 308
|
|
#define OPTION_NO_ENUM_SIZE_WARNING 309
|
|
#define OPTION_PIC_VENEER 310
|
|
#define OPTION_FIX_V4BX_INTERWORKING 311
|
|
#define OPTION_STUBGROUP_SIZE 312
|
|
#define OPTION_NO_WCHAR_SIZE_WARNING 313
|
|
#define OPTION_FIX_CORTEX_A8 314
|
|
#define OPTION_NO_FIX_CORTEX_A8 315
|
|
#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
|
|
#define OPTION_FIX_ARM1176 317
|
|
#define OPTION_NO_FIX_ARM1176 318
|
|
#define OPTION_LONG_PLT 319
|
|
#define OPTION_STM32L4XX_FIX 320
|
|
#define OPTION_CMSE_IMPLIB 321
|
|
#define OPTION_IN_IMPLIB 322
|
|
'
|
|
|
|
PARSE_AND_LIST_SHORTOPTS=p
|
|
|
|
PARSE_AND_LIST_LONGOPTS='
|
|
{ "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
|
|
{ "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
|
|
{ "be8", no_argument, NULL, OPTION_BE8},
|
|
{ "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
|
|
{ "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
|
|
{ "target2", required_argument, NULL, OPTION_TARGET2},
|
|
{ "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
|
|
{ "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
|
|
{ "use-blx", no_argument, NULL, OPTION_USE_BLX},
|
|
{ "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
|
|
{ "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
|
|
{ "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
|
|
{ "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
|
|
{ "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
|
|
{ "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
|
|
{ "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
|
|
{ "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
|
|
{ "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
|
|
{ "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
|
|
{ "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
|
|
{ "long-plt", no_argument, NULL, OPTION_LONG_PLT },
|
|
{ "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
|
|
{ "in-implib", required_argument, NULL, OPTION_IN_IMPLIB },
|
|
'
|
|
|
|
PARSE_AND_LIST_OPTIONS='
|
|
fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
|
|
fprintf (file, _(" --be8 Output BE8 format image\n"));
|
|
fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
|
|
fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
|
|
fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
|
|
fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
|
|
fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
|
|
fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
|
|
fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
|
|
fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
|
|
fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
|
|
" enum sizes\n"));
|
|
fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
|
|
" wchar_t sizes\n"));
|
|
fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
|
|
fprintf (file, _(" --long-plt Generate long .plt entries\n"
|
|
" to handle large .plt/.got displacements\n"));
|
|
fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
|
|
" library as per ARMv8-M Security Extensions\n"));
|
|
fprintf (file, _(" --in-implib Import library whose symbols address must\n"
|
|
" remain stable\n"));
|
|
fprintf (file, _("\
|
|
--stub-group-size=N Maximum size of a group of input sections that\n\
|
|
can be handled by one stub section. A negative\n\
|
|
value locates all stubs after their branches\n\
|
|
(with a group size of -N), while a positive\n\
|
|
value allows two groups of input sections, one\n\
|
|
before, and one after each stub section.\n\
|
|
Values of +/-1 indicate the linker should\n\
|
|
choose suitable defaults.\n"));
|
|
fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
|
|
fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
|
|
fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
|
|
'
|
|
|
|
PARSE_AND_LIST_ARGS_CASES='
|
|
case '\'p\'':
|
|
/* Only here for backwards compatibility. */
|
|
break;
|
|
|
|
case OPTION_THUMB_ENTRY:
|
|
params.thumb_entry_symbol = optarg;
|
|
break;
|
|
|
|
case OPTION_BE8:
|
|
params.byteswap_code = 1;
|
|
break;
|
|
|
|
case OPTION_TARGET1_REL:
|
|
params.target1_is_rel = 1;
|
|
break;
|
|
|
|
case OPTION_TARGET1_ABS:
|
|
params.target1_is_rel = 0;
|
|
break;
|
|
|
|
case OPTION_TARGET2:
|
|
params.target2_type = optarg;
|
|
break;
|
|
|
|
case OPTION_FIX_V4BX:
|
|
params.fix_v4bx = 1;
|
|
break;
|
|
|
|
case OPTION_FIX_V4BX_INTERWORKING:
|
|
params.fix_v4bx = 2;
|
|
break;
|
|
|
|
case OPTION_USE_BLX:
|
|
params.use_blx = 1;
|
|
break;
|
|
|
|
case OPTION_VFP11_DENORM_FIX:
|
|
if (strcmp (optarg, "none") == 0)
|
|
params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
|
|
else if (strcmp (optarg, "scalar") == 0)
|
|
params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
|
|
else if (strcmp (optarg, "vector") == 0)
|
|
params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
|
|
else
|
|
einfo (_("%P: unrecognized VFP11 fix type '\''%s'\''\n"), optarg);
|
|
break;
|
|
|
|
case OPTION_STM32L4XX_FIX:
|
|
if (!optarg)
|
|
params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
|
|
else if (strcmp (optarg, "none") == 0)
|
|
params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
|
|
else if (strcmp (optarg, "default") == 0)
|
|
params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
|
|
else if (strcmp (optarg, "all") == 0)
|
|
params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
|
|
else
|
|
einfo (_("%P: unrecognized STM32L4XX fix type '\''%s'\''\n"), optarg);
|
|
break;
|
|
|
|
case OPTION_NO_ENUM_SIZE_WARNING:
|
|
params.no_enum_size_warning = 1;
|
|
break;
|
|
|
|
case OPTION_NO_WCHAR_SIZE_WARNING:
|
|
params.no_wchar_size_warning = 1;
|
|
break;
|
|
|
|
case OPTION_PIC_VENEER:
|
|
params.pic_veneer = 1;
|
|
break;
|
|
|
|
case OPTION_STUBGROUP_SIZE:
|
|
{
|
|
const char *end;
|
|
|
|
group_size = bfd_scan_vma (optarg, &end, 0);
|
|
if (*end)
|
|
einfo (_("%F%P: invalid number `%s'\''\n"), optarg);
|
|
}
|
|
break;
|
|
|
|
case OPTION_FIX_CORTEX_A8:
|
|
params.fix_cortex_a8 = 1;
|
|
break;
|
|
|
|
case OPTION_NO_FIX_CORTEX_A8:
|
|
params.fix_cortex_a8 = 0;
|
|
break;
|
|
|
|
case OPTION_NO_MERGE_EXIDX_ENTRIES:
|
|
params.merge_exidx_entries = 0;
|
|
break;
|
|
|
|
case OPTION_FIX_ARM1176:
|
|
params.fix_arm1176 = 1;
|
|
break;
|
|
|
|
case OPTION_NO_FIX_ARM1176:
|
|
params.fix_arm1176 = 0;
|
|
break;
|
|
|
|
case OPTION_LONG_PLT:
|
|
bfd_elf32_arm_use_long_plt ();
|
|
break;
|
|
|
|
case OPTION_CMSE_IMPLIB:
|
|
params.cmse_implib = 1;
|
|
break;
|
|
|
|
case OPTION_IN_IMPLIB:
|
|
in_implib_filename = optarg;
|
|
break;
|
|
'
|
|
|
|
# We have our own before_allocation etc. functions, but they call
|
|
# the standard routines, so give them a different name.
|
|
LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
|
|
LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
|
|
LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
|
|
|
|
# Replace the elf before_parse function with our own.
|
|
LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
|
|
LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
|
|
|
|
# Call the extra arm-elf function
|
|
LDEMUL_FINISH=gld${EMULATION_NAME}_finish
|