73 lines
1.8 KiB
C
73 lines
1.8 KiB
C
/* Simulator CPU header for m32r.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU Simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef M32R_CPUALL_H
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#define M32R_CPUALL_H
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extern const IMP_PROPERTIES m32r_imp_properties;
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extern const MODEL m32r_models[];
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#ifndef WANT_CPU
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/* The ARGBUF struct. */
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struct argbuf {
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/* These are the baseclass definitions. */
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unsigned int length;
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PCADDR addr;
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const struct cgen_insn *opcode;
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/* unsigned long insn; - no longer needed */
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/* cpu specific data follows */
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};
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#endif
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#ifndef WANT_CPU
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/* A cached insn.
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This is also used in the non-scache case. In this situation we assume
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the cache size is 1, and do a few things a little differently. */
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struct scache {
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IADDR next;
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union {
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#if ! WITH_SEM_SWITCH_FULL
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SEMANTIC_FN *sem_fn;
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#endif
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#if ! WITH_SEM_SWITCH_FAST
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#if WITH_SCACHE
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SEMANTIC_CACHE_FN *sem_fast_fn;
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#else
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SEMANTIC_FN *sem_fast_fn;
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#endif
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#endif
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#if WITH_SEM_SWITCH_FULL || WITH_SEM_SWITCH_FAST
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#ifdef __GNUC__
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void *sem_case;
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#else
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int sem_case;
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#endif
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#endif
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} semantic;
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struct argbuf argbuf;
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};
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#endif
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#endif /* M32R_CPUALL_H */
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