219 lines
4.9 KiB
C
219 lines
4.9 KiB
C
/* Disassembler code for Renesas RX.
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Copyright (C) 2008-2015 Free Software Foundation, Inc.
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Contributed by Red Hat.
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Written by DJ Delorie.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "bfd.h"
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#include "dis-asm.h"
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#include "opcode/rx.h"
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typedef struct
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{
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bfd_vma pc;
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disassemble_info * dis;
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} RX_Data;
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static int
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rx_get_byte (void * vdata)
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{
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bfd_byte buf[1];
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RX_Data *rx_data = (RX_Data *) vdata;
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rx_data->dis->read_memory_func (rx_data->pc,
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buf,
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1,
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rx_data->dis);
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rx_data->pc ++;
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return buf[0];
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}
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static char const * size_names[RX_MAX_SIZE] =
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{
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"", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l", "<error>"
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};
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static char const * opsize_names[RX_MAX_SIZE] =
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{
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"", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l", "<error>"
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};
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static char const * register_names[] =
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{
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/* general registers */
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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/* control register */
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"psw", "pc", "usp", "fpsw", NULL, NULL, NULL, NULL,
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"bpsw", "bpc", "isp", "fintv", "intb", "extb", NULL, NULL,
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"a0", "a1", NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static char const * condition_names[] =
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{
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/* condition codes */
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"eq", "ne", "c", "nc", "gtu", "leu", "pz", "n",
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"ge", "lt", "gt", "le", "o", "no", "<invalid>", "<invalid>"
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};
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static const char * flag_names[] =
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{
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"c", "z", "s", "o", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"i", "u", "", "", "", "", "", ""
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"", "", "", "", "", "", "", "",
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};
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int
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print_insn_rx (bfd_vma addr, disassemble_info * dis)
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{
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int rv;
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RX_Data rx_data;
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RX_Opcode_Decoded opcode;
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const char * s;
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rx_data.pc = addr;
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rx_data.dis = dis;
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rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data);
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dis->bytes_per_line = 10;
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#define PR (dis->fprintf_func)
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#define PS (dis->stream)
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#define PC(c) PR (PS, "%c", c)
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/* Detect illegal instructions. */
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if (opcode.op[0].size == RX_Bad_Size
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|| register_names [opcode.op[0].reg] == NULL
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|| register_names [opcode.op[1].reg] == NULL
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|| register_names [opcode.op[2].reg] == NULL)
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{
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bfd_byte buf[10];
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int i;
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PR (PS, ".byte ");
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rx_data.dis->read_memory_func (rx_data.pc - rv, buf, rv, rx_data.dis);
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for (i = 0 ; i < rv; i++)
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PR (PS, "0x%02x ", buf[i]);
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return rv;
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}
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for (s = opcode.syntax; *s; s++)
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{
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if (*s != '%')
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{
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PC (*s);
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}
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else
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{
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RX_Opcode_Operand * oper;
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int do_size = 0;
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int do_hex = 0;
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int do_addr = 0;
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s ++;
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if (*s == 'S')
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{
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do_size = 1;
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s++;
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}
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if (*s == 'x')
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{
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do_hex = 1;
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s++;
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}
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if (*s == 'a')
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{
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do_addr = 1;
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s++;
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}
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switch (*s)
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{
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case '%':
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PC ('%');
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break;
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case 's':
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PR (PS, "%s", opsize_names[opcode.size]);
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break;
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case '0':
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case '1':
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case '2':
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oper = opcode.op + *s - '0';
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if (do_size)
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{
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if (oper->type == RX_Operand_Indirect || oper->type == RX_Operand_Zero_Indirect)
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PR (PS, "%s", size_names[oper->size]);
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}
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else
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switch (oper->type)
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{
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case RX_Operand_Immediate:
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if (do_addr)
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dis->print_address_func (oper->addend, dis);
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else if (do_hex
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|| oper->addend > 999
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|| oper->addend < -999)
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PR (PS, "%#x", oper->addend);
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else
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PR (PS, "%d", oper->addend);
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break;
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case RX_Operand_Register:
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case RX_Operand_TwoReg:
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PR (PS, "%s", register_names[oper->reg]);
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break;
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case RX_Operand_Indirect:
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PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);
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break;
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case RX_Operand_Zero_Indirect:
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PR (PS, "[%s]", register_names[oper->reg]);
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break;
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case RX_Operand_Postinc:
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PR (PS, "[%s+]", register_names[oper->reg]);
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break;
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case RX_Operand_Predec:
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PR (PS, "[-%s]", register_names[oper->reg]);
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break;
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case RX_Operand_Condition:
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PR (PS, "%s", condition_names[oper->reg]);
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break;
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case RX_Operand_Flag:
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PR (PS, "%s", flag_names[oper->reg]);
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break;
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default:
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PR (PS, "[???]");
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break;
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}
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}
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}
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}
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return rv;
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}
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