18 lines
539 B
C
18 lines
539 B
C
/* mips target configuration file. */
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/* See sim-hload.c. We properly handle LMA. */
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#ifdef TARGET_TX3904
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#define SIM_HANDLES_LMA 1
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#else
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#define SIM_HANDLES_LMA 0
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#endif
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/* Define this if the simulator uses an instruction cache.
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See the h8/300 simulator for an example.
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This enables the `-c size' option to set the size of the cache.
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The target is required to provide sim_set_simcache_size. */
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/* #define SIM_HAVE_SIMCACHE */
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/* MIPS uses an unusual format for floating point quiet NaNs. */
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#define SIM_QUIET_NAN_NEGATED
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