56cea62382
* mips-tdep.c (struct gdbarch_tdep): Add field "regnum". (mips_fpa0_regnum, mips_regnum): New function. (mips_gdbarch_init): Fill in the "regnum" fields. * mips-tdep.h (struct mips_regnum): Define. (mips_regnum): Declare. * config/mips/tm-mips.h (BADVADDR_REGNUM): Delete macro. (LO_REGNUM, HI_REGNUM, BADVADDR_REGNUM): Ditto. (CAUSE_REGNUM, PC_REGNUM, FP0_REGNUM): Ditto. (FCRCS_REGNUM, FCRIR_REGNUM, FPA0_REGNUM): Ditto. * config/mips/tm-irix6.h (FP0_REGNUM): Delete macro. (PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto. (HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto. * config/mips/tm-irix5.h (FP0_REGNUM): Delete macro. (PC_REGNUM, CAUSE_REGNUM, BADVADDR_REGNUM): Ditto. (HI_REGNUM, LO_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): Ditto. * remote-mips.c: Include "mips-tdep.h". Update. * mipsnbsd-tdep.c: Update. * mipsv4-nat.c: Update. * mips-tdep.c: Update. * mips-nat.c: Update. * mips-linux-tdep.c: Update. * mips-linux-nat.c: Update. * irix5-nat.c: Update. * dve3900-rom.c: Include "mips-tdep.h". Update. (ignore_packet): Supress GCC warning. * config/mips/nm-riscos.h: Update. * Makefile.in (dve3900-rom.o, remote-mips.o): Update dependencies.
371 lines
9.4 KiB
C
371 lines
9.4 KiB
C
/* Target-dependent code for MIPS systems running NetBSD.
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Copyright 2002, 2003 Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "target.h"
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#include "value.h"
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#include "osabi.h"
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#include "nbsd-tdep.h"
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#include "mipsnbsd-tdep.h"
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#include "solib-svr4.h"
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/* Conveniently, GDB uses the same register numbering as the
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ptrace register structure used by NetBSD/mips. */
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void
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mipsnbsd_supply_reg (char *regs, int regno)
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{
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int i;
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for (i = 0; i <= PC_REGNUM; i++)
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{
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if (regno == i || regno == -1)
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{
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if (CANNOT_FETCH_REGISTER (i))
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supply_register (i, NULL);
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else
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supply_register (i, regs + (i * mips_regsize (current_gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_reg (char *regs, int regno)
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{
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int i;
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for (i = 0; i <= PC_REGNUM; i++)
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if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
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regcache_collect (i, regs + (i * mips_regsize (current_gdbarch)));
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}
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void
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mipsnbsd_supply_fpreg (char *fpregs, int regno)
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{
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int i;
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for (i = FP0_REGNUM;
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i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
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i++)
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{
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if (regno == i || regno == -1)
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{
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if (CANNOT_FETCH_REGISTER (i))
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supply_register (i, NULL);
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else
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supply_register (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_fpreg (char *fpregs, int regno)
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{
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int i;
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for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
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i++)
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if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
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regcache_collect (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch)));
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}
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static void
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fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
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CORE_ADDR ignore)
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{
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char *regs, *fpregs;
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/* We get everything from one section. */
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if (which != 0)
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return;
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regs = core_reg_sect;
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fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
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/* Integer registers. */
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mipsnbsd_supply_reg (regs, -1);
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/* Floating point registers. */
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mipsnbsd_supply_fpreg (fpregs, -1);
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}
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static void
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fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
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CORE_ADDR ignore)
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{
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switch (which)
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{
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case 0: /* Integer registers. */
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if (core_reg_size != SIZEOF_STRUCT_REG)
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warning ("Wrong size register set in core file.");
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else
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mipsnbsd_supply_reg (core_reg_sect, -1);
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break;
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case 2: /* Floating point registers. */
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if (core_reg_size != SIZEOF_STRUCT_FPREG)
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warning ("Wrong size register set in core file.");
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else
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mipsnbsd_supply_fpreg (core_reg_sect, -1);
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break;
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default:
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/* Don't know what kind of register request this is; just ignore it. */
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break;
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}
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}
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static struct core_fns mipsnbsd_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_core_registers, /* core_read_registers */
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NULL /* next */
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};
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static struct core_fns mipsnbsd_elfcore_fns =
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{
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bfd_target_elf_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_elfcore_registers, /* core_read_registers */
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NULL /* next */
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};
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/* Under NetBSD/mips, signal handler invocations can be identified by the
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designated code sequence that is used to return from a signal handler.
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In particular, the return address of a signal handler points to the
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following code sequence:
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addu a0, sp, 16
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li v0, 295 # __sigreturn14
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syscall
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Each instruction has a unique encoding, so we simply attempt to match
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the instruction the PC is pointing to with any of the above instructions.
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If there is a hit, we know the offset to the start of the designated
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sequence and can then check whether we really are executing in the
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signal trampoline. If not, -1 is returned, otherwise the offset from the
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start of the return sequence is returned. */
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#define RETCODE_NWORDS 3
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#define RETCODE_SIZE (RETCODE_NWORDS * 4)
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static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
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{
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0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
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0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
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0x0c, 0x00, 0x00, 0x00, /* syscall */
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};
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static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
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{
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0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
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0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
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0x00, 0x00, 0x00, 0x0c, /* syscall */
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};
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static LONGEST
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mipsnbsd_sigtramp_offset (CORE_ADDR pc)
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{
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const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel;
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unsigned char ret[RETCODE_SIZE], w[4];
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LONGEST off;
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int i;
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if (read_memory_nobpt (pc, (char *) w, sizeof (w)) != 0)
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return -1;
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for (i = 0; i < RETCODE_NWORDS; i++)
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{
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if (memcmp (w, retcode + (i * 4), 4) == 0)
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break;
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}
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if (i == RETCODE_NWORDS)
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return -1;
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off = i * 4;
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pc -= off;
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if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0)
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return -1;
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if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
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return off;
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return -1;
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}
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static int
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mipsnbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name)
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{
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return (nbsd_pc_in_sigtramp (pc, func_name)
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|| mipsnbsd_sigtramp_offset (pc) >= 0);
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}
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/* Figure out where the longjmp will land. We expect that we have
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just entered longjmp and haven't yet setup the stack frame, so
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the args are still in the argument regs. A0_REGNUM points at the
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jmp_buf structure from which we extract the PC that we will land
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at. The PC is copied into *pc. This routine returns true on
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success. */
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#define NBSD_MIPS_JB_PC (2 * 4)
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#define NBSD_MIPS_JB_ELEMENT_SIZE mips_regsize (current_gdbarch)
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#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
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NBSD_MIPS_JB_ELEMENT_SIZE)
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static int
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mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
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{
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CORE_ADDR jb_addr;
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char *buf;
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buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
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jb_addr = read_register (A0_REGNUM);
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if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
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NBSD_MIPS_JB_ELEMENT_SIZE))
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return 0;
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*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
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return 1;
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}
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static int
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mipsnbsd_cannot_fetch_register (int regno)
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{
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return (regno == ZERO_REGNUM
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|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
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}
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static int
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mipsnbsd_cannot_store_register (int regno)
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{
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return (regno == ZERO_REGNUM
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|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
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}
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/* NetBSD/mips uses a slightly different link_map structure from the
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other NetBSD platforms. */
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static struct link_map_offsets *
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mipsnbsd_ilp32_solib_svr4_fetch_link_map_offsets (void)
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{
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static struct link_map_offsets lmo;
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static struct link_map_offsets *lmp = NULL;
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if (lmp == NULL)
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{
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lmp = &lmo;
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lmo.r_debug_size = 16;
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lmo.r_map_offset = 4;
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lmo.r_map_size = 4;
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lmo.link_map_size = 24;
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lmo.l_addr_offset = 0;
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lmo.l_addr_size = 4;
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lmo.l_name_offset = 8;
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lmo.l_name_size = 4;
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lmo.l_next_offset = 16;
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lmo.l_next_size = 4;
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lmo.l_prev_offset = 20;
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lmo.l_prev_size = 4;
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}
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return lmp;
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}
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static struct link_map_offsets *
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mipsnbsd_lp64_solib_svr4_fetch_link_map_offsets (void)
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{
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static struct link_map_offsets lmo;
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static struct link_map_offsets *lmp = NULL;
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if (lmp == NULL)
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{
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lmp = &lmo;
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lmo.r_debug_size = 32;
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lmo.r_map_offset = 8;
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lmo.r_map_size = 8;
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lmo.link_map_size = 48;
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lmo.l_addr_offset = 0;
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lmo.l_addr_size = 8;
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lmo.l_name_offset = 16;
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lmo.l_name_size = 8;
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lmo.l_next_offset = 32;
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lmo.l_next_size = 8;
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lmo.l_prev_offset = 40;
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lmo.l_prev_size = 8;
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}
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return lmp;
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}
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static void
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mipsnbsd_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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set_gdbarch_pc_in_sigtramp (gdbarch, mipsnbsd_pc_in_sigtramp);
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set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
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set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
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set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
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set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
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set_solib_svr4_fetch_link_map_offsets (gdbarch,
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gdbarch_ptr_bit (gdbarch) == 32 ?
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mipsnbsd_ilp32_solib_svr4_fetch_link_map_offsets :
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mipsnbsd_lp64_solib_svr4_fetch_link_map_offsets);
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}
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void
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_initialize_mipsnbsd_tdep (void)
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{
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gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
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mipsnbsd_init_abi);
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add_core_fns (&mipsnbsd_core_fns);
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add_core_fns (&mipsnbsd_elfcore_fns);
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}
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