539e75adb5
2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * config/tc-i386.c (match_template): Check address size prefix to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32 operand. gas/testsuite/ 2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * gas/i386/addr16.d: New file. * gas/i386/addr16.s: Likewise. * gas/i386/addr32.d: Likewise. * gas/i386/addr32.s: Likewise. * gas/i386/i386.exp: Add "addr16" and "addr32". * gas/i386/x86-64-addr32.s: Add tests for "add32 mov". * gas/i386/x86-64-addr32.d: Updated. opcodes/ 2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an address size prefix.
603 lines
17 KiB
Plaintext
603 lines
17 KiB
Plaintext
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/3235
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* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
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address size prefix.
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2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
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* score-dis.c: New file.
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* score-opc.h: New file.
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* Makefile.am: Add Score files.
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* Makefile.in: Regenerate.
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* configure.in: Add support for Score target.
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* configure: Regenerate.
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* disassemble.c: Add support for Score target.
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2006-09-16 Nick Clifton <nickc@redhat.com>
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Pedro Alves <pedro_alves@portugalmail.pt>
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* arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
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macros defined in bfd.h.
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* cris-dis.c: Likewise.
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* h8300-dis.c: Likewise.
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* i386-dis.c: Likewise.
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* ia64-gen.c: Likewise.
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* mips-dis: Likewise.
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2006-09-04 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
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2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (three_byte_table): Expand to 256 elements.
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2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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* i386-dis.c (MXC,EMC): Define.
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(OP_MXC): New function to handle cvt* (convert instructions) between
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%xmm and %mm register correctly.
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(OP_EMC): ditto.
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(prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
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instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
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with EMC/MXC.
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2006-07-29 Richard Sandiford <richard@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
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"fdaddl" entry.
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2006-07-19 Paul Brook <paul@codesourcery.com>
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* armd-dis.c (arm_opcodes): Fix rbit opcode.
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2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
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"sldt", "str" and "smsw".
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2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/2829
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* i386-dis.c (GRP11_C6): NEW.
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(GRP11_C7): Likewise.
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(GRP12): Updated.
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(GRP13): Likewise.
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(GRP14): Likewise.
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(GRP15): Likewise.
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(GRP16): Likewise.
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(GRPAMD): Likewise.
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(GRPPADLCK1): Likewise.
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(GRPPADLCK2): Likewise.
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(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
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respectively.
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(grps): Add entries for GRP11_C6 and GRP11_C7.
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2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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Michael Meissner <michael.meissner@amd.com>
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* i386-dis.c (dis386): Add support for 4 operand instructions. Add
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support for amdfam10 SSE4a/ABM instructions. Modify all
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initializer macros to have additional arguments. Disallow REP
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prefix for non-string instructions.
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(print_insn): Ditto.
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2006-07-05 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
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2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
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(twobyte_has_modrm): Set 1 for 0x1f.
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2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (NOP_Fixup): Removed.
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(NOP_Fixup1): New.
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(NOP_Fixup2): Likewise.
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(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
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2006-06-12 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
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on 64-bit hosts.
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2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
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* i386.c (GRP10): Renamed to ...
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(GRP12): This.
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(GRP11): Renamed to ...
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(GRP13): This.
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(GRP12): Renamed to ...
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(GRP14): This.
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(GRP13): Renamed to ...
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(GRP15): This.
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(GRP14): Renamed to ...
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(GRP16): This.
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(dis386_twobyte): Updated.
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(grps): Likewise.
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2006-06-09 Nick Clifton <nickc@redhat.com>
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* po/fi.po: Updated Finnish translation.
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2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
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* po/Make-in (pdf, ps): New dummy targets.
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2006-06-06 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
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instructions.
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(neon_opcodes): Add conditional execution specifiers.
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(thumb_opcodes): Ditto.
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(thumb32_opcodes): Ditto.
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(arm_conditional): Change 0xe to "al" and add "" to end.
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(ifthen_state, ifthen_next_state, ifthen_address): New.
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(IFTHEN_COND): Define.
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(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
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(print_insn_arm): Change %c to use new values of arm_conditional.
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(print_insn_thumb16): Print thumb conditions. Add %I.
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(print_insn_thumb32): Print thumb conditions.
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(find_ifthen_state): New function.
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(print_insn): Track IT block state.
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2006-06-06 Ben Elliston <bje@au.ibm.com>
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Anton Blanchard <anton@samba.org>
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Peter Bergner <bergner@vnet.ibm.com>
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* ppc-dis.c (powerpc_dialect): Handle power6 option.
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(print_ppc_disassembler_options): Mention power6.
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2006-06-06 Thiemo Seufer <ths@mips.com>
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Chao-ying Fu <fu@mips.com>
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* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
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* mips-opc.c: Add DSP64 instructions.
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2006-06-06 Alan Modra <amodra@bigpond.net.au>
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* m68hc11-dis.c (print_insn): Warning fix.
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2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
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* po/Make-in (top_builddir): Define.
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2006-06-05 Alan Modra <amodra@bigpond.net.au>
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* Makefile.am: Run "make dep-am".
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* Makefile.in: Regenerate.
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* config.in: Regenerate.
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2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
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* Makefile.am (INCLUDES): Use @INCINTL@.
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* acinclude.m4: Include new gettext macros.
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* configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
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Remove local code for po/Makefile.
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* Makefile.in, aclocal.m4, configure: Regenerated.
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2006-05-30 Nick Clifton <nickc@redhat.com>
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* po/es.po: Updated Spanish translation.
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2006-05-25 Richard Sandiford <richard@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
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and fmovem entries. Put register list entries before immediate
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mask entries. Use "l" rather than "L" in the fmovem entries.
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* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
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out from INFO.
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(m68k_scan_mask): New function, split out from...
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(print_insn_m68k): ...here. If no architecture has been set,
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first try printing an m680x0 instruction, then try a Coldfire one.
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2006-05-24 Nick Clifton <nickc@redhat.com>
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* po/ga.po: Updated Irish translation.
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2006-05-22 Nick Clifton <nickc@redhat.com>
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* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
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2006-05-22 Nick Clifton <nickc@redhat.com>
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* po/nl.po: Updated translation.
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2006-05-18 Alan Modra <amodra@bigpond.net.au>
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* avr-dis.c: Formatting fix.
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2006-05-14 Thiemo Seufer <ths@mips.com>
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* mips16-opc.c (I1, I32, I64): New shortcut defines.
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(mips16_opcodes): Change membership of instructions to their
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lowest baseline ISA.
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2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (grps): Update sgdt/sidt for 64bit.
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2006-05-05 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
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vldm/vstm.
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2006-05-05 Thiemo Seufer <ths@mips.com>
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David Ung <davidu@mips.com>
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* mips-opc.c: Add macro for cache instruction.
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2006-05-04 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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David Ung <davidu@mips.com>
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||
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* mips-dis.c (mips_arch_choices): Add smartmips instruction
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decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
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2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
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MIPS64R2.
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* mips-opc.c: fix random typos in comments.
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||
(INSN_SMARTMIPS): New defines.
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||
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
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||
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
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flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
|
||
FP_S and FP_D flags to denote single and double register
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||
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
|
||
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
|
||
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
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||
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
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||
release 2 ISAs.
|
||
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
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||
|
||
2006-05-03 Thiemo Seufer <ths@mips.com>
|
||
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||
* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
|
||
|
||
2006-05-02 Thiemo Seufer <ths@mips.com>
|
||
Nigel Stephens <nigel@mips.com>
|
||
David Ung <davidu@mips.com>
|
||
|
||
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
|
||
(print_mips16_insn_arg): Force mips16 to odd addresses.
|
||
|
||
2006-04-30 Thiemo Seufer <ths@mips.com>
|
||
David Ung <davidu@mips.com>
|
||
|
||
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
|
||
"udi0" to "udi15".
|
||
* mips-dis.c (print_insn_args): Adds udi argument handling.
|
||
|
||
2006-04-28 James E Wilson <wilson@specifix.com>
|
||
|
||
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
|
||
error message.
|
||
|
||
2006-04-28 Thiemo Seufer <ths@mips.com>
|
||
David Ung <davidu@mips.com>
|
||
Nigel Stephens <nigel@mips.com>
|
||
|
||
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
|
||
names.
|
||
|
||
2006-04-28 Thiemo Seufer <ths@mips.com>
|
||
Nigel Stephens <nigel@mips.com>
|
||
David Ung <davidu@mips.com>
|
||
|
||
* mips-dis.c (print_insn_args): Add mips_opcode argument.
|
||
(print_insn_mips): Adjust print_insn_args call.
|
||
|
||
2006-04-28 Thiemo Seufer <ths@mips.com>
|
||
Nigel Stephens <nigel@mips.com>
|
||
|
||
* mips-dis.c (print_insn_args): Print $fcc only for FP
|
||
instructions, use $cc elsewise.
|
||
|
||
2006-04-28 Thiemo Seufer <ths@mips.com>
|
||
Nigel Stephens <nigel@mips.com>
|
||
|
||
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
|
||
Map MIPS16 registers to O32 names.
|
||
(print_mips16_insn_arg): Use mips16_reg_names.
|
||
|
||
2006-04-26 Julian Brown <julian@codesourcery.com>
|
||
|
||
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
|
||
VMOV.
|
||
|
||
2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
|
||
Julian Brown <julian@codesourcery.com>
|
||
|
||
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
|
||
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
|
||
Add unified load/store instruction names.
|
||
(neon_opcode_table): New.
|
||
(arm_opcodes): Expand meaning of %<bitfield>['`?].
|
||
(arm_decode_bitfield): New.
|
||
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
|
||
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
|
||
(print_insn_neon): New.
|
||
(print_insn_arm): Adjust print_insn_coprocessor call. Call
|
||
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
|
||
(print_insn_thumb32): Likewise.
|
||
|
||
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
||
|
||
* Makefile.am: Run "make dep-am".
|
||
* Makefile.in: Regenerate.
|
||
|
||
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
||
|
||
* avr-dis.c (avr_operand): Warning fix.
|
||
|
||
* configure: Regenerate.
|
||
|
||
2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
|
||
|
||
* po/POTFILES.in: Regenerated.
|
||
|
||
2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
|
||
|
||
PR binutils/2454
|
||
* avr-dis.c (avr_operand): Arrange for a comment to appear before
|
||
the symolic form of an address, so that the output of objdump -d
|
||
can be reassembled.
|
||
|
||
2006-04-10 DJ Delorie <dj@redhat.com>
|
||
|
||
* m32c-asm.c: Regenerate.
|
||
|
||
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
|
||
|
||
* Makefile.am: Add install-html target.
|
||
* Makefile.in: Regenerate.
|
||
|
||
2006-04-06 Nick Clifton <nickc@redhat.com>
|
||
|
||
* po/vi/po: Updated Vietnamese translation.
|
||
|
||
2006-03-31 Paul Koning <ni1d@arrl.net>
|
||
|
||
* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
|
||
|
||
2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
|
||
|
||
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
|
||
logic to identify halfword shifts.
|
||
|
||
2006-03-16 Paul Brook <paul@codesourcery.com>
|
||
|
||
* arm-dis.c (arm_opcodes): Rename swi to svc.
|
||
(thumb_opcodes): Ditto.
|
||
|
||
2006-03-13 DJ Delorie <dj@redhat.com>
|
||
|
||
* m32c-asm.c: Regenerate.
|
||
* m32c-desc.c: Likewise.
|
||
* m32c-desc.h: Likewise.
|
||
* m32c-dis.c: Likewise.
|
||
* m32c-ibld.c: Likewise.
|
||
* m32c-opc.c: Likewise.
|
||
* m32c-opc.h: Likewise.
|
||
|
||
2006-03-10 DJ Delorie <dj@redhat.com>
|
||
|
||
* m32c-desc.c: Regenerate with mul.l, mulu.l.
|
||
* m32c-opc.c: Likewise.
|
||
* m32c-opc.h: Likewise.
|
||
|
||
|
||
2006-03-09 Nick Clifton <nickc@redhat.com>
|
||
|
||
* po/sv.po: Updated Swedish translation.
|
||
|
||
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR binutils/2428
|
||
* i386-dis.c (REP_Fixup): New function.
|
||
(AL): Remove duplicate.
|
||
(Xbr): New.
|
||
(Xvr): Likewise.
|
||
(Ybr): Likewise.
|
||
(Yvr): Likewise.
|
||
(indirDXr): Likewise.
|
||
(ALr): Likewise.
|
||
(eAXr): Likewise.
|
||
(dis386): Updated entries of ins, outs, movs, lods and stos.
|
||
|
||
2006-03-05 Nick Clifton <nickc@redhat.com>
|
||
|
||
* cgen-ibld.in (insert_normal): Cope with attempts to insert a
|
||
signed 32-bit value into an unsigned 32-bit field when the host is
|
||
a 64-bit machine.
|
||
* fr30-ibld.c: Regenerate.
|
||
* frv-ibld.c: Regenerate.
|
||
* ip2k-ibld.c: Regenerate.
|
||
* iq2000-asm.c: Regenerate.
|
||
* iq2000-ibld.c: Regenerate.
|
||
* m32c-ibld.c: Regenerate.
|
||
* m32r-ibld.c: Regenerate.
|
||
* openrisc-ibld.c: Regenerate.
|
||
* xc16x-ibld.c: Regenerate.
|
||
* xstormy16-ibld.c: Regenerate.
|
||
|
||
2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
|
||
|
||
* xc16x-asm.c: Regenerate.
|
||
* xc16x-dis.c: Regenerate.
|
||
|
||
2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
|
||
|
||
* po/Make-in: Add html target.
|
||
|
||
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
|
||
Intel Merom New Instructions.
|
||
(THREE_BYTE_0): Likewise.
|
||
(THREE_BYTE_1): Likewise.
|
||
(three_byte_table): Likewise.
|
||
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
|
||
THREE_BYTE_1 for entry 0x3a.
|
||
(twobyte_has_modrm): Updated.
|
||
(twobyte_uses_SSE_prefix): Likewise.
|
||
(print_insn): Handle 3-byte opcodes used by Intel Merom New
|
||
Instructions.
|
||
|
||
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
|
||
|
||
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
|
||
(v9_hpriv_reg_names): New table.
|
||
(print_insn_sparc): Allow values up to 16 for '?' and '!'.
|
||
New cases '$' and '%' for read/write hyperprivileged register.
|
||
* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
|
||
window handling and rdhpr/wrhpr instructions.
|
||
|
||
2006-02-24 DJ Delorie <dj@redhat.com>
|
||
|
||
* m32c-desc.c: Regenerate with linker relaxation attributes.
|
||
* m32c-desc.h: Likewise.
|
||
* m32c-dis.c: Likewise.
|
||
* m32c-opc.c: Likewise.
|
||
|
||
2006-02-24 Paul Brook <paul@codesourcery.com>
|
||
|
||
* arm-dis.c (arm_opcodes): Add V7 instructions.
|
||
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
|
||
(print_arm_address): New function.
|
||
(print_insn_arm): Use it. Add 'P' and 'U' cases.
|
||
(psr_name): New function.
|
||
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
|
||
|
||
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* ia64-opc-i.c (bXc): New.
|
||
(mXc): Likewise.
|
||
(OpX2TaTbYaXcC): Likewise.
|
||
(TF). Likewise.
|
||
(TFCM). Likewise.
|
||
(ia64_opcodes_i): Add instructions for tf.
|
||
|
||
* ia64-opc.h (IMMU5b): New.
|
||
|
||
* ia64-asmtab.c: Regenerated.
|
||
|
||
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* ia64-gen.c: Update copyright years.
|
||
* ia64-opc-b.c: Likewise.
|
||
|
||
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* ia64-gen.c (lookup_regindex): Handle ".vm".
|
||
(print_dependency_table): Handle '\"'.
|
||
|
||
* ia64-ic.tbl: Updated from SDM 2.2.
|
||
* ia64-raw.tbl: Likewise.
|
||
* ia64-waw.tbl: Likewise.
|
||
* ia64-asmtab.c: Regenerated.
|
||
|
||
* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
|
||
|
||
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
||
Anil Paranjape <anilp1@kpitcummins.com>
|
||
Shilin Shakti <shilins@kpitcummins.com>
|
||
|
||
* xc16x-desc.h: New file
|
||
* xc16x-desc.c: New file
|
||
* xc16x-opc.h: New file
|
||
* xc16x-opc.c: New file
|
||
* xc16x-ibld.c: New file
|
||
* xc16x-asm.c: New file
|
||
* xc16x-dis.c: New file
|
||
* Makefile.am: Entries for xc16x
|
||
* Makefile.in: Regenerate
|
||
* cofigure.in: Add xc16x target information.
|
||
* configure: Regenerate.
|
||
* disassemble.c: Add xc16x target information.
|
||
|
||
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
|
||
moves.
|
||
|
||
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c ('Z'): Add a new macro.
|
||
(dis386_twobyte): Use "movZ" for control register moves.
|
||
|
||
2006-02-10 Nick Clifton <nickc@redhat.com>
|
||
|
||
* iq2000-asm.c: Regenerate.
|
||
|
||
2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
|
||
|
||
* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
|
||
|
||
2006-01-26 David Ung <davidu@mips.com>
|
||
|
||
* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
|
||
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
|
||
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
|
||
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
|
||
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
|
||
|
||
2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
|
||
|
||
* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
|
||
ld_d_r, pref_xd_cb): Use signed char to hold data to be
|
||
disassembled.
|
||
* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
|
||
buffer overflows when disassembling instructions like
|
||
ld (ix+123),0x23
|
||
* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
|
||
operand, if the offset is negative.
|
||
|
||
2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
|
||
|
||
* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
|
||
unsigned char to hold data to be disassembled.
|
||
|
||
2006-01-17 Andreas Schwab <schwab@suse.de>
|
||
|
||
PR binutils/1486
|
||
* disassemble.c (disassemble_init_for_target): Set
|
||
disassembler_needs_relocs for bfd_arch_arm.
|
||
|
||
2006-01-16 Paul Brook <paul@codesourcery.com>
|
||
|
||
* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
|
||
f?add?, and f?sub? instructions.
|
||
|
||
2006-01-16 Nick Clifton <nickc@redhat.com>
|
||
|
||
* po/zh_CN.po: New Chinese (simplified) translation.
|
||
* configure.in (ALL_LINGUAS): Add "zh_CH".
|
||
* configure: Regenerate.
|
||
|
||
2006-01-05 Paul Brook <paul@codesourcery.com>
|
||
|
||
* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
|
||
|
||
2006-01-06 DJ Delorie <dj@redhat.com>
|
||
|
||
* m32c-desc.c: Regenerate.
|
||
* m32c-opc.c: Regenerate.
|
||
* m32c-opc.h: Regenerate.
|
||
|
||
2006-01-03 DJ Delorie <dj@redhat.com>
|
||
|
||
* cgen-ibld.in (extract_normal): Avoid memory range errors.
|
||
* m32c-ibld.c: Regenerated.
|
||
|
||
For older changes see ChangeLog-2005
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|