561 lines
14 KiB
C
561 lines
14 KiB
C
/* Caching code. Typically used by remote back ends for
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caching remote memory.
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Copyright 1992-1993, 1995, 1998-1999 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "dcache.h"
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#include "gdbcmd.h"
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#include "gdb_string.h"
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#include "gdbcore.h"
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/*
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The data cache could lead to incorrect results because it doesn't know
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about volatile variables, thus making it impossible to debug
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functions which use memory mapped I/O devices.
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set remotecache 0
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In those cases.
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In general the dcache speeds up performance, some speed improvement
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comes from the actual caching mechanism, but the major gain is in
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the reduction of the remote protocol overhead; instead of reading
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or writing a large area of memory in 4 byte requests, the cache
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bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
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Reducing the overhead to an eighth of what it was. This is very
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obvious when displaying a large amount of data,
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eg, x/200x 0
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caching | no yes
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----------------------------
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first time | 4 sec 2 sec improvement due to chunking
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second time | 4 sec 0 sec improvement due to caching
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The cache structure is unusual, we keep a number of cache blocks
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(DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
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Within each line we remember the address of the line (always a
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multiple of the LINE_SIZE) and a vector of bytes over the range.
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There's another vector which contains the state of the bytes.
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ENTRY_BAD means that the byte is just plain wrong, and has no
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correspondence with anything else (as it would when the cache is
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turned on, but nothing has been done to it.
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ENTRY_DIRTY means that the byte has some data in it which should be
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written out to the remote target one day, but contains correct
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data. ENTRY_OK means that the data is the same in the cache as it
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is in remote memory.
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The ENTRY_DIRTY state is necessary because GDB likes to write large
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lumps of memory in small bits. If the caching mechanism didn't
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maintain the DIRTY information, then something like a two byte
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write would mean that the entire cache line would have to be read,
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the two bytes modified and then written out again. The alternative
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would be to not read in the cache line in the first place, and just
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write the two bytes directly into target memory. The trouble with
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that is that it really nails performance, because of the remote
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protocol overhead. This way, all those little writes are bundled
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up into an entire cache line write in one go, without having to
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read the cache line in the first place.
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*/
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/* This value regulates the number of cache blocks stored.
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Smaller values reduce the time spent searching for a cache
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line, and reduce memory requirements, but increase the risk
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of a line not being in memory */
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#define DCACHE_SIZE 64
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/* This value regulates the size of a cache line. Smaller values
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reduce the time taken to read a single byte, but reduce overall
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throughput. */
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#define LINE_SIZE_POWER (5)
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#define LINE_SIZE (1 << LINE_SIZE_POWER)
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/* Each cache block holds LINE_SIZE bytes of data
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starting at a multiple-of-LINE_SIZE address. */
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#define LINE_SIZE_MASK ((LINE_SIZE - 1))
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#define XFORM(x) ((x) & LINE_SIZE_MASK)
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#define MASK(x) ((x) & ~LINE_SIZE_MASK)
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#define ENTRY_BAD 0 /* data at this byte is wrong */
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#define ENTRY_DIRTY 1 /* data at this byte needs to be written back */
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#define ENTRY_OK 2 /* data at this byte is same as in memory */
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struct dcache_block
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{
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struct dcache_block *p; /* next in list */
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CORE_ADDR addr; /* Address for which data is recorded. */
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char data[LINE_SIZE]; /* bytes at given address */
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unsigned char state[LINE_SIZE]; /* what state the data is in */
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/* whether anything in state is dirty - used to speed up the
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dirty scan. */
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int anydirty;
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int refs;
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};
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struct dcache_struct
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{
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/* Function to actually read the target memory. */
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memxferfunc read_memory;
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/* Function to actually write the target memory */
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memxferfunc write_memory;
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/* free list */
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struct dcache_block *free_head;
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struct dcache_block *free_tail;
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/* in use list */
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struct dcache_block *valid_head;
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struct dcache_block *valid_tail;
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/* The cache itself. */
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struct dcache_block *the_cache;
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/* potentially, if the cache was enabled, and then turned off, and
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then turned on again, the stuff in it could be stale, so this is
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used to mark it */
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int cache_has_stuff;
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};
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static int dcache_poke_byte PARAMS ((DCACHE * dcache, CORE_ADDR addr,
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char *ptr));
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static int dcache_peek_byte PARAMS ((DCACHE * dcache, CORE_ADDR addr,
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char *ptr));
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static struct dcache_block *dcache_hit PARAMS ((DCACHE * dcache,
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CORE_ADDR addr));
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static int dcache_write_line PARAMS ((DCACHE * dcache, struct dcache_block * db));
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static struct dcache_block *dcache_alloc PARAMS ((DCACHE * dcache));
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static int dcache_writeback PARAMS ((DCACHE * dcache));
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static void dcache_info PARAMS ((char *exp, int tty));
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void _initialize_dcache PARAMS ((void));
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static int dcache_enabled_p = 0;
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DCACHE *last_cache; /* Used by info dcache */
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/* Free all the data cache blocks, thus discarding all cached data. */
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void
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dcache_flush (dcache)
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DCACHE *dcache;
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{
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int i;
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dcache->valid_head = 0;
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dcache->valid_tail = 0;
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dcache->free_head = 0;
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dcache->free_tail = 0;
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for (i = 0; i < DCACHE_SIZE; i++)
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{
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struct dcache_block *db = dcache->the_cache + i;
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if (!dcache->free_head)
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dcache->free_head = db;
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else
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dcache->free_tail->p = db;
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dcache->free_tail = db;
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db->p = 0;
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}
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dcache->cache_has_stuff = 0;
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return;
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}
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/* If addr is present in the dcache, return the address of the block
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containing it. */
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static struct dcache_block *
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dcache_hit (dcache, addr)
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DCACHE *dcache;
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CORE_ADDR addr;
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{
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register struct dcache_block *db;
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/* Search all cache blocks for one that is at this address. */
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db = dcache->valid_head;
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while (db)
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{
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if (MASK (addr) == db->addr)
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{
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db->refs++;
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return db;
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}
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db = db->p;
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}
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return NULL;
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}
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/* Make sure that anything in this line which needs to
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be written is. */
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static int
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dcache_write_line (dcache, db)
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DCACHE *dcache;
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register struct dcache_block *db;
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{
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int s;
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int e;
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s = 0;
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if (db->anydirty)
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{
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for (s = 0; s < LINE_SIZE; s++)
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{
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if (db->state[s] == ENTRY_DIRTY)
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{
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int len = 0;
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for (e = s; e < LINE_SIZE; e++, len++)
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if (db->state[e] != ENTRY_DIRTY)
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break;
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{
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/* all bytes from s..s+len-1 need to
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be written out */
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int done = 0;
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while (done < len)
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{
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int t = dcache->write_memory (db->addr + s + done,
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db->data + s + done,
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len - done);
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if (t == 0)
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return 0;
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done += t;
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}
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memset (db->state + s, ENTRY_OK, len);
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s = e;
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}
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}
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}
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db->anydirty = 0;
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}
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return 1;
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}
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/* Get a free cache block, put or keep it on the valid list,
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and return its address. The caller should store into the block
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the address and data that it describes, then remque it from the
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free list and insert it into the valid list. This procedure
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prevents errors from creeping in if a memory retrieval is
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interrupted (which used to put garbage blocks in the valid
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list...). */
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static struct dcache_block *
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dcache_alloc (dcache)
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DCACHE *dcache;
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{
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register struct dcache_block *db;
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if (dcache_enabled_p == 0)
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abort ();
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/* Take something from the free list */
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db = dcache->free_head;
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if (db)
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{
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dcache->free_head = db->p;
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}
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else
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{
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/* Nothing left on free list, so grab one from the valid list */
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db = dcache->valid_head;
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dcache->valid_head = db->p;
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dcache_write_line (dcache, db);
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}
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/* append this line to end of valid list */
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if (!dcache->valid_head)
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dcache->valid_head = db;
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else
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dcache->valid_tail->p = db;
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dcache->valid_tail = db;
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db->p = 0;
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return db;
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}
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/* Using the data cache DCACHE return the contents of the byte at
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address ADDR in the remote machine.
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Returns 0 on error. */
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static int
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dcache_peek_byte (dcache, addr, ptr)
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DCACHE *dcache;
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CORE_ADDR addr;
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char *ptr;
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{
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register struct dcache_block *db = dcache_hit (dcache, addr);
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int ok = 1;
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int done = 0;
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if (db == 0
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|| db->state[XFORM (addr)] == ENTRY_BAD)
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{
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if (db)
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{
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dcache_write_line (dcache, db);
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}
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else
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db = dcache_alloc (dcache);
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immediate_quit++;
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db->addr = MASK (addr);
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while (done < LINE_SIZE)
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{
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int try =
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(*dcache->read_memory)
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(db->addr + done,
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db->data + done,
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LINE_SIZE - done);
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if (try == 0)
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return 0;
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done += try;
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}
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immediate_quit--;
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memset (db->state, ENTRY_OK, sizeof (db->data));
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db->anydirty = 0;
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}
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*ptr = db->data[XFORM (addr)];
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return ok;
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}
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/* Writeback any dirty lines to the remote. */
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static int
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dcache_writeback (dcache)
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DCACHE *dcache;
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{
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struct dcache_block *db;
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db = dcache->valid_head;
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while (db)
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{
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if (!dcache_write_line (dcache, db))
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return 0;
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db = db->p;
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}
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return 1;
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}
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/* Using the data cache DCACHE return the contents of the word at
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address ADDR in the remote machine. */
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int
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dcache_fetch (dcache, addr)
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DCACHE *dcache;
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CORE_ADDR addr;
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{
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int res;
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if (dcache_xfer_memory (dcache, addr, (char *) &res, sizeof res, 0) != sizeof res)
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memory_error (EIO, addr);
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return res;
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}
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/* Write the byte at PTR into ADDR in the data cache.
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Return zero on write error.
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*/
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static int
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dcache_poke_byte (dcache, addr, ptr)
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DCACHE *dcache;
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CORE_ADDR addr;
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char *ptr;
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{
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register struct dcache_block *db = dcache_hit (dcache, addr);
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if (!db)
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{
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db = dcache_alloc (dcache);
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db->addr = MASK (addr);
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memset (db->state, ENTRY_BAD, sizeof (db->data));
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}
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db->data[XFORM (addr)] = *ptr;
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db->state[XFORM (addr)] = ENTRY_DIRTY;
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db->anydirty = 1;
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return 1;
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}
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/* Write the word at ADDR both in the data cache and in the remote machine.
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Return zero on write error.
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*/
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int
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dcache_poke (dcache, addr, data)
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DCACHE *dcache;
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CORE_ADDR addr;
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int data;
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{
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if (dcache_xfer_memory (dcache, addr, (char *) &data, sizeof data, 1) != sizeof data)
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return 0;
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return dcache_writeback (dcache);
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}
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/* Initialize the data cache. */
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DCACHE *
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dcache_init (reading, writing)
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memxferfunc reading;
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memxferfunc writing;
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{
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int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
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DCACHE *dcache;
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dcache = (DCACHE *) xmalloc (sizeof (*dcache));
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dcache->read_memory = reading;
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dcache->write_memory = writing;
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dcache->the_cache = (struct dcache_block *) xmalloc (csize);
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memset (dcache->the_cache, 0, csize);
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dcache_flush (dcache);
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last_cache = dcache;
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return dcache;
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}
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/* Read or write LEN bytes from inferior memory at MEMADDR, transferring
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to or from debugger address MYADDR. Write to inferior if SHOULD_WRITE is
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nonzero.
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Returns length of data written or read; 0 for error.
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This routine is indended to be called by remote_xfer_ functions. */
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int
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dcache_xfer_memory (dcache, memaddr, myaddr, len, should_write)
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DCACHE *dcache;
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CORE_ADDR memaddr;
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char *myaddr;
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int len;
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int should_write;
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{
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int i;
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if (dcache_enabled_p)
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{
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int (*xfunc) PARAMS ((DCACHE * dcache, CORE_ADDR addr, char *ptr));
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xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
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for (i = 0; i < len; i++)
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{
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if (!xfunc (dcache, memaddr + i, myaddr + i))
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return 0;
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}
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dcache->cache_has_stuff = 1;
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dcache_writeback (dcache);
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}
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else
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{
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memxferfunc xfunc;
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xfunc = should_write ? dcache->write_memory : dcache->read_memory;
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if (dcache->cache_has_stuff)
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dcache_flush (dcache);
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len = xfunc (memaddr, myaddr, len);
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}
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return len;
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}
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static void
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dcache_info (exp, tty)
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char *exp;
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int tty;
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{
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struct dcache_block *p;
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if (!dcache_enabled_p)
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{
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printf_filtered ("Dcache not enabled\n");
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return;
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}
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printf_filtered ("Dcache enabled, line width %d, depth %d\n",
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LINE_SIZE, DCACHE_SIZE);
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printf_filtered ("Cache state:\n");
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for (p = last_cache->valid_head; p; p = p->p)
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{
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int j;
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printf_filtered ("Line at %s, referenced %d times\n",
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paddr (p->addr), p->refs);
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for (j = 0; j < LINE_SIZE; j++)
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printf_filtered ("%02x", p->data[j] & 0xFF);
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printf_filtered ("\n");
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for (j = 0; j < LINE_SIZE; j++)
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printf_filtered (" %2x", p->state[j]);
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printf_filtered ("\n");
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}
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}
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void
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_initialize_dcache ()
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{
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add_show_from_set
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(add_set_cmd ("remotecache", class_support, var_boolean,
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(char *) &dcache_enabled_p,
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"\
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Set cache use for remote targets.\n\
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When on, use data caching for remote targets. For many remote targets\n\
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this option can offer better throughput for reading target memory.\n\
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Unfortunately, gdb does not currently know anything about volatile\n\
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registers and thus data caching will produce incorrect results with\n\
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volatile registers are in use. By default, this option is off.",
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&setlist),
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&showlist);
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add_info ("dcache", dcache_info,
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"Print information on the dcache performance.");
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}
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