42a4f53d2b
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
249 lines
6.4 KiB
C
249 lines
6.4 KiB
C
/* Blackfin NAND Flash Memory Controller (NFC) model
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Copyright (C) 2010-2019 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "sim-main.h"
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#include "devices.h"
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#include "dv-bfin_nfc.h"
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/* XXX: This is merely a stub. */
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struct bfin_nfc
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{
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/* This top portion matches common dv_bfin struct. */
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bu32 base;
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struct hw *dma_master;
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bool acked;
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struct hw_event *handler;
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char saved_byte;
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int saved_count;
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/* Order after here is important -- matches hardware MMR layout. */
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bu16 BFIN_MMR_16(ctl);
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bu16 BFIN_MMR_16(stat);
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bu16 BFIN_MMR_16(irqstat);
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bu16 BFIN_MMR_16(irqmask);
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bu16 BFIN_MMR_16(ecc0);
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bu16 BFIN_MMR_16(ecc1);
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bu16 BFIN_MMR_16(ecc2);
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bu16 BFIN_MMR_16(ecc3);
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bu16 BFIN_MMR_16(count);
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bu16 BFIN_MMR_16(rst);
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bu16 BFIN_MMR_16(pgctl);
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bu16 BFIN_MMR_16(read);
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bu32 _pad0[4];
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bu16 BFIN_MMR_16(addr);
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bu16 BFIN_MMR_16(cmd);
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bu16 BFIN_MMR_16(data_wr);
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bu16 BFIN_MMR_16(data_rd);
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};
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#define mmr_base() offsetof(struct bfin_nfc, ctl)
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#define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base())
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#define mmr_idx(mmr) (mmr_offset (mmr) / 4)
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static const char * const mmr_names[] =
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{
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"NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1",
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"NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ",
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[mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD",
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};
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#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
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static unsigned
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bfin_nfc_io_write_buffer (struct hw *me, const void *source, int space,
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address_word addr, unsigned nr_bytes)
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{
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struct bfin_nfc *nfc = hw_data (me);
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bu32 mmr_off;
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bu32 value;
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bu16 *valuep;
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/* Invalid access mode is higher priority than missing register. */
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if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
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return 0;
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value = dv_load_2 (source);
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mmr_off = addr - nfc->base;
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valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
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HW_TRACE_WRITE ();
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switch (mmr_off)
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{
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case mmr_offset(ctl):
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case mmr_offset(stat):
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case mmr_offset(irqmask):
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case mmr_offset(ecc0):
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case mmr_offset(ecc1):
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case mmr_offset(ecc2):
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case mmr_offset(ecc3):
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case mmr_offset(count):
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case mmr_offset(rst):
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case mmr_offset(pgctl):
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case mmr_offset(read):
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case mmr_offset(addr):
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case mmr_offset(cmd):
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case mmr_offset(data_wr):
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*valuep = value;
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break;
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case mmr_offset(data_rd):
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nfc->irqstat |= RD_RDY;
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*valuep = value;
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break;
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case mmr_offset(irqstat):
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dv_w1c_2 (valuep, value, -1);
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break;
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default:
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dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
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return 0;
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}
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return nr_bytes;
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}
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static unsigned
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bfin_nfc_io_read_buffer (struct hw *me, void *dest, int space,
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address_word addr, unsigned nr_bytes)
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{
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struct bfin_nfc *nfc = hw_data (me);
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bu32 mmr_off;
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bu16 *valuep;
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/* Invalid access mode is higher priority than missing register. */
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if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
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return 0;
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mmr_off = addr - nfc->base;
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valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
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HW_TRACE_READ ();
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switch (mmr_off)
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{
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case mmr_offset(ctl):
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case mmr_offset(stat):
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case mmr_offset(irqstat):
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case mmr_offset(irqmask):
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case mmr_offset(ecc0):
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case mmr_offset(ecc1):
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case mmr_offset(ecc2):
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case mmr_offset(ecc3):
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case mmr_offset(count):
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case mmr_offset(rst):
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case mmr_offset(read):
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dv_store_2 (dest, *valuep);
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break;
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case mmr_offset(pgctl):
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case mmr_offset(addr):
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case mmr_offset(cmd):
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case mmr_offset(data_wr):
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case mmr_offset(data_rd):
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/* These regs are write only. */
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default:
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dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
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return 0;
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}
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return nr_bytes;
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}
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static unsigned
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bfin_nfc_dma_read_buffer (struct hw *me, void *dest, int space,
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unsigned_word addr, unsigned nr_bytes)
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{
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HW_TRACE_DMA_READ ();
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return 0;
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}
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static unsigned
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bfin_nfc_dma_write_buffer (struct hw *me, const void *source,
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int space, unsigned_word addr,
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unsigned nr_bytes,
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int violate_read_only_section)
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{
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HW_TRACE_DMA_WRITE ();
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return nr_bytes;
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}
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static const struct hw_port_descriptor bfin_nfc_ports[] =
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{
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{ "stat", 0, 0, output_port, },
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{ NULL, 0, 0, 0, },
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};
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static void
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attach_bfin_nfc_regs (struct hw *me, struct bfin_nfc *nfc)
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{
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address_word attach_address;
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int attach_space;
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unsigned attach_size;
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reg_property_spec reg;
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if (hw_find_property (me, "reg") == NULL)
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hw_abort (me, "Missing \"reg\" property");
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if (!hw_find_reg_array_property (me, "reg", 0, ®))
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hw_abort (me, "\"reg\" property must contain three addr/size entries");
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hw_unit_address_to_attach_address (hw_parent (me),
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®.address,
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&attach_space, &attach_address, me);
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hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
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if (attach_size != BFIN_MMR_NFC_SIZE)
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hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_NFC_SIZE);
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hw_attach_address (hw_parent (me),
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0, attach_space, attach_address, attach_size, me);
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nfc->base = attach_address;
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}
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static void
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bfin_nfc_finish (struct hw *me)
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{
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struct bfin_nfc *nfc;
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nfc = HW_ZALLOC (me, struct bfin_nfc);
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set_hw_data (me, nfc);
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set_hw_io_read_buffer (me, bfin_nfc_io_read_buffer);
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set_hw_io_write_buffer (me, bfin_nfc_io_write_buffer);
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set_hw_dma_read_buffer (me, bfin_nfc_dma_read_buffer);
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set_hw_dma_write_buffer (me, bfin_nfc_dma_write_buffer);
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set_hw_ports (me, bfin_nfc_ports);
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attach_bfin_nfc_regs (me, nfc);
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/* Initialize the NFC. */
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nfc->ctl = 0x0200;
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nfc->stat = 0x0011;
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nfc->irqstat = 0x0004;
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nfc->irqmask = 0x001F;
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}
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const struct hw_descriptor dv_bfin_nfc_descriptor[] =
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{
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{"bfin_nfc", bfin_nfc_finish,},
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{NULL, NULL},
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};
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