982 lines
26 KiB
C
982 lines
26 KiB
C
/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
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Copyright (C) 1995-2015 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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#include "arch/arm.h"
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/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
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On Bionic elf.h and linux/elf.h have conflicting definitions. */
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#ifndef ELFMAG0
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#include <elf.h>
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#endif
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#include "nat/gdb_ptrace.h"
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#include <signal.h>
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/* Defined in auto-generated files. */
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void init_registers_arm (void);
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extern const struct target_desc *tdesc_arm;
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void init_registers_arm_with_iwmmxt (void);
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extern const struct target_desc *tdesc_arm_with_iwmmxt;
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void init_registers_arm_with_vfpv2 (void);
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extern const struct target_desc *tdesc_arm_with_vfpv2;
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void init_registers_arm_with_vfpv3 (void);
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extern const struct target_desc *tdesc_arm_with_vfpv3;
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void init_registers_arm_with_neon (void);
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extern const struct target_desc *tdesc_arm_with_neon;
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#ifndef PTRACE_GET_THREAD_AREA
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#define PTRACE_GET_THREAD_AREA 22
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#endif
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#ifndef PTRACE_GETWMMXREGS
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# define PTRACE_GETWMMXREGS 18
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# define PTRACE_SETWMMXREGS 19
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#endif
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#ifndef PTRACE_GETVFPREGS
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# define PTRACE_GETVFPREGS 27
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# define PTRACE_SETVFPREGS 28
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#endif
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#ifndef PTRACE_GETHBPREGS
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#define PTRACE_GETHBPREGS 29
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#define PTRACE_SETHBPREGS 30
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#endif
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/* Information describing the hardware breakpoint capabilities. */
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static struct
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{
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unsigned char arch;
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unsigned char max_wp_length;
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unsigned char wp_count;
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unsigned char bp_count;
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} arm_linux_hwbp_cap;
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/* Enum describing the different types of ARM hardware break-/watch-points. */
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typedef enum
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{
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arm_hwbp_break = 0,
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arm_hwbp_load = 1,
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arm_hwbp_store = 2,
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arm_hwbp_access = 3
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} arm_hwbp_type;
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/* Type describing an ARM Hardware Breakpoint Control register value. */
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typedef unsigned int arm_hwbp_control_t;
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/* Structure used to keep track of hardware break-/watch-points. */
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struct arm_linux_hw_breakpoint
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{
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/* Address to break on, or being watched. */
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unsigned int address;
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/* Control register for break-/watch- point. */
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arm_hwbp_control_t control;
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};
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/* Since we cannot dynamically allocate subfields of arch_process_info,
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assume a maximum number of supported break-/watchpoints. */
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#define MAX_BPTS 32
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#define MAX_WPTS 32
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/* Per-process arch-specific data we want to keep. */
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struct arch_process_info
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{
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/* Hardware breakpoints for this process. */
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struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
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/* Hardware watchpoints for this process. */
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struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
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};
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/* Per-thread arch-specific data we want to keep. */
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struct arch_lwp_info
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{
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/* Non-zero if our copy differs from what's recorded in the thread. */
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char bpts_changed[MAX_BPTS];
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char wpts_changed[MAX_WPTS];
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/* Cached stopped data address. */
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CORE_ADDR stopped_data_address;
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};
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/* These are in <asm/elf.h> in current kernels. */
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#define HWCAP_VFP 64
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#define HWCAP_IWMMXT 512
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#define HWCAP_NEON 4096
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#define HWCAP_VFPv3 8192
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#define HWCAP_VFPv3D16 16384
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#define arm_num_regs 26
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static int arm_regmap[] = {
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0, 4, 8, 12, 16, 20, 24, 28,
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32, 36, 40, 44, 48, 52, 56, 60,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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64
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};
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static int
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arm_cannot_store_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static int
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arm_cannot_fetch_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static void
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arm_fill_gregset (struct regcache *regcache, void *buf)
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{
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int i;
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uint32_t *regs = buf;
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for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
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collect_register (regcache, i, ®s[i]);
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collect_register (regcache, ARM_PS_REGNUM, ®s[16]);
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}
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static void
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arm_store_gregset (struct regcache *regcache, const void *buf)
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{
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int i;
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char zerobuf[8];
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const uint32_t *regs = buf;
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memset (zerobuf, 0, 8);
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for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
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supply_register (regcache, i, ®s[i]);
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for (; i < ARM_PS_REGNUM; i++)
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supply_register (regcache, i, zerobuf);
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supply_register (regcache, ARM_PS_REGNUM, ®s[16]);
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}
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static void
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arm_fill_wmmxregset (struct regcache *regcache, void *buf)
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{
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int i;
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if (regcache->tdesc != tdesc_arm_with_iwmmxt)
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return;
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for (i = 0; i < 16; i++)
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collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
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for (i = 0; i < 6; i++)
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collect_register (regcache, arm_num_regs + i + 16,
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(char *) buf + 16 * 8 + i * 4);
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}
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static void
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arm_store_wmmxregset (struct regcache *regcache, const void *buf)
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{
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int i;
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if (regcache->tdesc != tdesc_arm_with_iwmmxt)
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return;
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for (i = 0; i < 16; i++)
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supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
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for (i = 0; i < 6; i++)
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supply_register (regcache, arm_num_regs + i + 16,
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(char *) buf + 16 * 8 + i * 4);
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}
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static void
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arm_fill_vfpregset (struct regcache *regcache, void *buf)
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{
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int i, num, base;
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if (regcache->tdesc == tdesc_arm_with_neon
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|| regcache->tdesc == tdesc_arm_with_vfpv3)
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num = 32;
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else if (regcache->tdesc == tdesc_arm_with_vfpv2)
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num = 16;
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else
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return;
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base = find_regno (regcache->tdesc, "d0");
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for (i = 0; i < num; i++)
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collect_register (regcache, base + i, (char *) buf + i * 8);
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collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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}
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static void
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arm_store_vfpregset (struct regcache *regcache, const void *buf)
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{
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int i, num, base;
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if (regcache->tdesc == tdesc_arm_with_neon
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|| regcache->tdesc == tdesc_arm_with_vfpv3)
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num = 32;
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else if (regcache->tdesc == tdesc_arm_with_vfpv2)
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num = 16;
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else
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return;
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base = find_regno (regcache->tdesc, "d0");
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for (i = 0; i < num; i++)
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supply_register (regcache, base + i, (char *) buf + i * 8);
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supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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}
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extern int debug_threads;
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static CORE_ADDR
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arm_get_pc (struct regcache *regcache)
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{
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unsigned long pc;
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collect_register_by_name (regcache, "pc", &pc);
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if (debug_threads)
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debug_printf ("stop pc is %08lx\n", pc);
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return pc;
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}
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static void
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arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
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{
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unsigned long newpc = pc;
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supply_register_by_name (regcache, "pc", &newpc);
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}
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/* Correct in either endianness. */
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static const unsigned long arm_breakpoint = 0xef9f0001;
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#define arm_breakpoint_len 4
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static const unsigned short thumb_breakpoint = 0xde01;
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static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
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/* For new EABI binaries. We recognize it regardless of which ABI
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is used for gdbserver, so single threaded debugging should work
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OK, but for multi-threaded debugging we only insert the current
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ABI's breakpoint instruction. For now at least. */
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static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
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static int
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arm_breakpoint_at (CORE_ADDR where)
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{
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struct regcache *regcache = get_thread_regcache (current_thread, 1);
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unsigned long cpsr;
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collect_register_by_name (regcache, "cpsr", &cpsr);
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if (cpsr & 0x20)
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{
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/* Thumb mode. */
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unsigned short insn;
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(*the_target->read_memory) (where, (unsigned char *) &insn, 2);
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if (insn == thumb_breakpoint)
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return 1;
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if (insn == thumb2_breakpoint[0])
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{
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(*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
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if (insn == thumb2_breakpoint[1])
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return 1;
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}
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}
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else
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{
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/* ARM mode. */
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unsigned long insn;
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(*the_target->read_memory) (where, (unsigned char *) &insn, 4);
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if (insn == arm_breakpoint)
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return 1;
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if (insn == arm_eabi_breakpoint)
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return 1;
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}
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return 0;
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}
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/* We only place breakpoints in empty marker functions, and thread locking
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is outside of the function. So rather than importing software single-step,
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we can just run until exit. */
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static CORE_ADDR
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arm_reinsert_addr (void)
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{
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struct regcache *regcache = get_thread_regcache (current_thread, 1);
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unsigned long pc;
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collect_register_by_name (regcache, "lr", &pc);
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return pc;
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}
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/* Fetch the thread-local storage pointer for libthread_db. */
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ps_err_e
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ps_get_thread_area (const struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base)
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{
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if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
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return PS_ERR;
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/* IDX is the bias from the thread pointer to the beginning of the
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thread descriptor. It has to be subtracted due to implementation
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quirks in libthread_db. */
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*base = (void *) ((char *)*base - idx);
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return PS_OK;
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}
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/* Query Hardware Breakpoint information for the target we are attached to
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(using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
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static void
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arm_linux_init_hwbp_cap (int pid)
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{
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unsigned int val;
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if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
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return;
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arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
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if (arm_linux_hwbp_cap.arch == 0)
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return;
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arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
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arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
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arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
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if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
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internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
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if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
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internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
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}
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/* How many hardware breakpoints are available? */
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static int
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arm_linux_get_hw_breakpoint_count (void)
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{
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return arm_linux_hwbp_cap.bp_count;
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}
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/* How many hardware watchpoints are available? */
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static int
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arm_linux_get_hw_watchpoint_count (void)
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{
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return arm_linux_hwbp_cap.wp_count;
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}
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/* Maximum length of area watched by hardware watchpoint. */
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static int
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arm_linux_get_hw_watchpoint_max_length (void)
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{
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return arm_linux_hwbp_cap.max_wp_length;
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}
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/* Initialize an ARM hardware break-/watch-point control register value.
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BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
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type of break-/watch-point; ENABLE indicates whether the point is enabled.
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*/
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static arm_hwbp_control_t
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arm_hwbp_control_initialize (unsigned byte_address_select,
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arm_hwbp_type hwbp_type,
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int enable)
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{
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gdb_assert ((byte_address_select & ~0xffU) == 0);
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gdb_assert (hwbp_type != arm_hwbp_break
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|| ((byte_address_select & 0xfU) != 0));
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return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
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}
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/* Does the breakpoint control value CONTROL have the enable bit set? */
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static int
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arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
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{
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return control & 0x1;
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}
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/* Is the breakpoint control value CONTROL initialized? */
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static int
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arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
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{
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return control != 0;
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}
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/* Change a breakpoint control word so that it is in the disabled state. */
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static arm_hwbp_control_t
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arm_hwbp_control_disable (arm_hwbp_control_t control)
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{
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return control & ~0x1;
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}
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/* Are two break-/watch-points equal? */
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static int
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arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
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const struct arm_linux_hw_breakpoint *p2)
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{
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return p1->address == p2->address && p1->control == p2->control;
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}
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/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
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static int
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raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
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{
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switch (raw_type)
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{
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case raw_bkpt_type_hw:
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return arm_hwbp_break;
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case raw_bkpt_type_write_wp:
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return arm_hwbp_store;
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case raw_bkpt_type_read_wp:
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return arm_hwbp_load;
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case raw_bkpt_type_access_wp:
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return arm_hwbp_access;
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default:
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gdb_assert_not_reached ("unhandled raw type");
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}
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}
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/* Initialize the hardware breakpoint structure P for a breakpoint or
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watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
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Returns -1 if TYPE is unsupported, or -2 if the particular combination
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of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
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represents a breakpoint and 1 if type represents a watchpoint. */
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static int
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arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
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int len, struct arm_linux_hw_breakpoint *p)
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{
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arm_hwbp_type hwbp_type;
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unsigned mask;
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hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
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if (hwbp_type == arm_hwbp_break)
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{
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/* For breakpoints, the length field encodes the mode. */
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switch (len)
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{
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case 2: /* 16-bit Thumb mode breakpoint */
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case 3: /* 32-bit Thumb mode breakpoint */
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mask = 0x3;
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addr &= ~1;
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break;
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case 4: /* 32-bit ARM mode breakpoint */
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mask = 0xf;
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addr &= ~3;
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break;
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default:
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/* Unsupported. */
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return -2;
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}
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}
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else
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{
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CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
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CORE_ADDR aligned_addr;
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/* Can not set watchpoints for zero or negative lengths. */
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if (len <= 0)
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return -2;
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/* The current ptrace interface can only handle watchpoints that are a
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power of 2. */
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if ((len & (len - 1)) != 0)
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return -2;
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/* Test that the range [ADDR, ADDR + LEN) fits into the largest address
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range covered by a watchpoint. */
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aligned_addr = addr & ~(max_wp_length - 1);
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if (aligned_addr + max_wp_length < addr + len)
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return -2;
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|
|
|
mask = (1 << len) - 1;
|
|
}
|
|
|
|
p->address = (unsigned int) addr;
|
|
p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
|
|
|
|
return hwbp_type != arm_hwbp_break;
|
|
}
|
|
|
|
/* Callback to mark a watch-/breakpoint to be updated in all threads of
|
|
the current process. */
|
|
|
|
struct update_registers_data
|
|
{
|
|
int watch;
|
|
int i;
|
|
};
|
|
|
|
static int
|
|
update_registers_callback (struct inferior_list_entry *entry, void *arg)
|
|
{
|
|
struct thread_info *thread = (struct thread_info *) entry;
|
|
struct lwp_info *lwp = get_thread_lwp (thread);
|
|
struct update_registers_data *data = (struct update_registers_data *) arg;
|
|
|
|
/* Only update the threads of the current process. */
|
|
if (pid_of (thread) == pid_of (current_thread))
|
|
{
|
|
/* The actual update is done later just before resuming the lwp,
|
|
we just mark that the registers need updating. */
|
|
if (data->watch)
|
|
lwp->arch_private->wpts_changed[data->i] = 1;
|
|
else
|
|
lwp->arch_private->bpts_changed[data->i] = 1;
|
|
|
|
/* If the lwp isn't stopped, force it to momentarily pause, so
|
|
we can update its breakpoint registers. */
|
|
if (!lwp->stopped)
|
|
linux_stop_lwp (lwp);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
arm_supports_z_point_type (char z_type)
|
|
{
|
|
switch (z_type)
|
|
{
|
|
case Z_PACKET_HW_BP:
|
|
case Z_PACKET_WRITE_WP:
|
|
case Z_PACKET_READ_WP:
|
|
case Z_PACKET_ACCESS_WP:
|
|
return 1;
|
|
default:
|
|
/* Leave the handling of sw breakpoints with the gdb client. */
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/* Insert hardware break-/watchpoint. */
|
|
static int
|
|
arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
|
|
int len, struct raw_breakpoint *bp)
|
|
{
|
|
struct process_info *proc = current_process ();
|
|
struct arm_linux_hw_breakpoint p, *pts;
|
|
int watch, i, count;
|
|
|
|
watch = arm_linux_hw_point_initialize (type, addr, len, &p);
|
|
if (watch < 0)
|
|
{
|
|
/* Unsupported. */
|
|
return watch == -1 ? 1 : -1;
|
|
}
|
|
|
|
if (watch)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
pts = proc->priv->arch_private->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
pts = proc->priv->arch_private->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
if (!arm_hwbp_control_is_enabled (pts[i].control))
|
|
{
|
|
struct update_registers_data data = { watch, i };
|
|
pts[i] = p;
|
|
find_inferior (&all_threads, update_registers_callback, &data);
|
|
return 0;
|
|
}
|
|
|
|
/* We're out of watchpoints. */
|
|
return -1;
|
|
}
|
|
|
|
/* Remove hardware break-/watchpoint. */
|
|
static int
|
|
arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
|
|
int len, struct raw_breakpoint *bp)
|
|
{
|
|
struct process_info *proc = current_process ();
|
|
struct arm_linux_hw_breakpoint p, *pts;
|
|
int watch, i, count;
|
|
|
|
watch = arm_linux_hw_point_initialize (type, addr, len, &p);
|
|
if (watch < 0)
|
|
{
|
|
/* Unsupported. */
|
|
return -1;
|
|
}
|
|
|
|
if (watch)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
pts = proc->priv->arch_private->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
pts = proc->priv->arch_private->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
if (arm_linux_hw_breakpoint_equal (&p, pts + i))
|
|
{
|
|
struct update_registers_data data = { watch, i };
|
|
pts[i].control = arm_hwbp_control_disable (pts[i].control);
|
|
find_inferior (&all_threads, update_registers_callback, &data);
|
|
return 0;
|
|
}
|
|
|
|
/* No watchpoint matched. */
|
|
return -1;
|
|
}
|
|
|
|
/* Return whether current thread is stopped due to a watchpoint. */
|
|
static int
|
|
arm_stopped_by_watchpoint (void)
|
|
{
|
|
struct lwp_info *lwp = get_thread_lwp (current_thread);
|
|
siginfo_t siginfo;
|
|
|
|
/* We must be able to set hardware watchpoints. */
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
return 0;
|
|
|
|
/* Retrieve siginfo. */
|
|
errno = 0;
|
|
ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
|
|
if (errno != 0)
|
|
return 0;
|
|
|
|
/* This must be a hardware breakpoint. */
|
|
if (siginfo.si_signo != SIGTRAP
|
|
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
|
|
return 0;
|
|
|
|
/* If we are in a positive slot then we're looking at a breakpoint and not
|
|
a watchpoint. */
|
|
if (siginfo.si_errno >= 0)
|
|
return 0;
|
|
|
|
/* Cache stopped data address for use by arm_stopped_data_address. */
|
|
lwp->arch_private->stopped_data_address
|
|
= (CORE_ADDR) (uintptr_t) siginfo.si_addr;
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Return data address that triggered watchpoint. Called only if
|
|
arm_stopped_by_watchpoint returned true. */
|
|
static CORE_ADDR
|
|
arm_stopped_data_address (void)
|
|
{
|
|
struct lwp_info *lwp = get_thread_lwp (current_thread);
|
|
return lwp->arch_private->stopped_data_address;
|
|
}
|
|
|
|
/* Called when a new process is created. */
|
|
static struct arch_process_info *
|
|
arm_new_process (void)
|
|
{
|
|
struct arch_process_info *info = xcalloc (1, sizeof (*info));
|
|
return info;
|
|
}
|
|
|
|
/* Called when a new thread is detected. */
|
|
static void
|
|
arm_new_thread (struct lwp_info *lwp)
|
|
{
|
|
struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
|
|
int i;
|
|
|
|
for (i = 0; i < MAX_BPTS; i++)
|
|
info->bpts_changed[i] = 1;
|
|
for (i = 0; i < MAX_WPTS; i++)
|
|
info->wpts_changed[i] = 1;
|
|
|
|
lwp->arch_private = info;
|
|
}
|
|
|
|
static void
|
|
arm_new_fork (struct process_info *parent, struct process_info *child)
|
|
{
|
|
struct arch_process_info *parent_proc_info = parent->priv->arch_private;
|
|
struct arch_process_info *child_proc_info = child->priv->arch_private;
|
|
struct lwp_info *child_lwp;
|
|
struct arch_lwp_info *child_lwp_info;
|
|
int i;
|
|
|
|
/* These are allocated by linux_add_process. */
|
|
gdb_assert (parent->priv != NULL
|
|
&& parent->priv->arch_private != NULL);
|
|
gdb_assert (child->priv != NULL
|
|
&& child->priv->arch_private != NULL);
|
|
|
|
/* Linux kernel before 2.6.33 commit
|
|
72f674d203cd230426437cdcf7dd6f681dad8b0d
|
|
will inherit hardware debug registers from parent
|
|
on fork/vfork/clone. Newer Linux kernels create such tasks with
|
|
zeroed debug registers.
|
|
|
|
GDB core assumes the child inherits the watchpoints/hw
|
|
breakpoints of the parent, and will remove them all from the
|
|
forked off process. Copy the debug registers mirrors into the
|
|
new process so that all breakpoints and watchpoints can be
|
|
removed together. The debug registers mirror will become zeroed
|
|
in the end before detaching the forked off process, thus making
|
|
this compatible with older Linux kernels too. */
|
|
|
|
*child_proc_info = *parent_proc_info;
|
|
|
|
/* Mark all the hardware breakpoints and watchpoints as changed to
|
|
make sure that the registers will be updated. */
|
|
child_lwp = find_lwp_pid (ptid_of (child));
|
|
child_lwp_info = child_lwp->arch_private;
|
|
for (i = 0; i < MAX_BPTS; i++)
|
|
child_lwp_info->bpts_changed[i] = 1;
|
|
for (i = 0; i < MAX_WPTS; i++)
|
|
child_lwp_info->wpts_changed[i] = 1;
|
|
}
|
|
|
|
/* Called when resuming a thread.
|
|
If the debug regs have changed, update the thread's copies. */
|
|
static void
|
|
arm_prepare_to_resume (struct lwp_info *lwp)
|
|
{
|
|
struct thread_info *thread = get_lwp_thread (lwp);
|
|
int pid = lwpid_of (thread);
|
|
struct process_info *proc = find_process_pid (pid_of (thread));
|
|
struct arch_process_info *proc_info = proc->priv->arch_private;
|
|
struct arch_lwp_info *lwp_info = lwp->arch_private;
|
|
int i;
|
|
|
|
for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
|
|
if (lwp_info->bpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
|
|
if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 1),
|
|
&proc_info->bpts[i].address) < 0)
|
|
perror_with_name ("Unexpected error setting breakpoint address");
|
|
|
|
if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 2),
|
|
&proc_info->bpts[i].control) < 0)
|
|
perror_with_name ("Unexpected error setting breakpoint");
|
|
|
|
lwp_info->bpts_changed[i] = 0;
|
|
}
|
|
|
|
for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
|
|
if (lwp_info->wpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
|
|
if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 1),
|
|
&proc_info->wpts[i].address) < 0)
|
|
perror_with_name ("Unexpected error setting watchpoint address");
|
|
|
|
if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 2),
|
|
&proc_info->wpts[i].control) < 0)
|
|
perror_with_name ("Unexpected error setting watchpoint");
|
|
|
|
lwp_info->wpts_changed[i] = 0;
|
|
}
|
|
}
|
|
|
|
|
|
static int
|
|
arm_get_hwcap (unsigned long *valp)
|
|
{
|
|
unsigned char *data = alloca (8);
|
|
int offset = 0;
|
|
|
|
while ((*the_target->read_auxv) (offset, data, 8) == 8)
|
|
{
|
|
unsigned int *data_p = (unsigned int *)data;
|
|
if (data_p[0] == AT_HWCAP)
|
|
{
|
|
*valp = data_p[1];
|
|
return 1;
|
|
}
|
|
|
|
offset += 8;
|
|
}
|
|
|
|
*valp = 0;
|
|
return 0;
|
|
}
|
|
|
|
static const struct target_desc *
|
|
arm_read_description (void)
|
|
{
|
|
int pid = lwpid_of (current_thread);
|
|
unsigned long arm_hwcap = 0;
|
|
|
|
/* Query hardware watchpoint/breakpoint capabilities. */
|
|
arm_linux_init_hwbp_cap (pid);
|
|
|
|
if (arm_get_hwcap (&arm_hwcap) == 0)
|
|
return tdesc_arm;
|
|
|
|
if (arm_hwcap & HWCAP_IWMMXT)
|
|
return tdesc_arm_with_iwmmxt;
|
|
|
|
if (arm_hwcap & HWCAP_VFP)
|
|
{
|
|
const struct target_desc *result;
|
|
char *buf;
|
|
|
|
/* NEON implies either no VFP, or VFPv3-D32. We only support
|
|
it with VFP. */
|
|
if (arm_hwcap & HWCAP_NEON)
|
|
result = tdesc_arm_with_neon;
|
|
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
|
|
result = tdesc_arm_with_vfpv3;
|
|
else
|
|
result = tdesc_arm_with_vfpv2;
|
|
|
|
/* Now make sure that the kernel supports reading these
|
|
registers. Support was added in 2.6.30. */
|
|
errno = 0;
|
|
buf = xmalloc (32 * 8 + 4);
|
|
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
|
|
&& errno == EIO)
|
|
result = tdesc_arm;
|
|
|
|
free (buf);
|
|
|
|
return result;
|
|
}
|
|
|
|
/* The default configuration uses legacy FPA registers, probably
|
|
simulated. */
|
|
return tdesc_arm;
|
|
}
|
|
|
|
static void
|
|
arm_arch_setup (void)
|
|
{
|
|
current_process ()->tdesc = arm_read_description ();
|
|
}
|
|
|
|
static struct regset_info arm_regsets[] = {
|
|
{ PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
|
|
GENERAL_REGS,
|
|
arm_fill_gregset, arm_store_gregset },
|
|
{ PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
|
|
EXTENDED_REGS,
|
|
arm_fill_wmmxregset, arm_store_wmmxregset },
|
|
{ PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
|
|
EXTENDED_REGS,
|
|
arm_fill_vfpregset, arm_store_vfpregset },
|
|
{ 0, 0, 0, -1, -1, NULL, NULL }
|
|
};
|
|
|
|
static struct regsets_info arm_regsets_info =
|
|
{
|
|
arm_regsets, /* regsets */
|
|
0, /* num_regsets */
|
|
NULL, /* disabled_regsets */
|
|
};
|
|
|
|
static struct usrregs_info arm_usrregs_info =
|
|
{
|
|
arm_num_regs,
|
|
arm_regmap,
|
|
};
|
|
|
|
static struct regs_info regs_info =
|
|
{
|
|
NULL, /* regset_bitmap */
|
|
&arm_usrregs_info,
|
|
&arm_regsets_info
|
|
};
|
|
|
|
static const struct regs_info *
|
|
arm_regs_info (void)
|
|
{
|
|
return ®s_info;
|
|
}
|
|
|
|
struct linux_target_ops the_low_target = {
|
|
arm_arch_setup,
|
|
arm_regs_info,
|
|
arm_cannot_fetch_register,
|
|
arm_cannot_store_register,
|
|
NULL, /* fetch_register */
|
|
arm_get_pc,
|
|
arm_set_pc,
|
|
|
|
/* Define an ARM-mode breakpoint; we only set breakpoints in the C
|
|
library, which is most likely to be ARM. If the kernel supports
|
|
clone events, we will never insert a breakpoint, so even a Thumb
|
|
C library will work; so will mixing EABI/non-EABI gdbserver and
|
|
application. */
|
|
#ifndef __ARM_EABI__
|
|
(const unsigned char *) &arm_breakpoint,
|
|
#else
|
|
(const unsigned char *) &arm_eabi_breakpoint,
|
|
#endif
|
|
arm_breakpoint_len,
|
|
arm_reinsert_addr,
|
|
0,
|
|
arm_breakpoint_at,
|
|
arm_supports_z_point_type,
|
|
arm_insert_point,
|
|
arm_remove_point,
|
|
arm_stopped_by_watchpoint,
|
|
arm_stopped_data_address,
|
|
NULL, /* collect_ptrace_register */
|
|
NULL, /* supply_ptrace_register */
|
|
NULL, /* siginfo_fixup */
|
|
arm_new_process,
|
|
arm_new_thread,
|
|
arm_new_fork,
|
|
arm_prepare_to_resume,
|
|
};
|
|
|
|
void
|
|
initialize_low_arch (void)
|
|
{
|
|
/* Initialize the Linux target descriptions. */
|
|
init_registers_arm ();
|
|
init_registers_arm_with_iwmmxt ();
|
|
init_registers_arm_with_vfpv2 ();
|
|
init_registers_arm_with_vfpv3 ();
|
|
init_registers_arm_with_neon ();
|
|
|
|
initialize_regsets_info (&arm_regsets_info);
|
|
}
|