62b3e31101
gas/ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. (struct asm_barrier_opt): Define. (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. (parse_psr): Accept V7M psr names. (parse_barrier): New function. (enum operand_parse_code): Add OP_oBARRIER. (parse_operands): Implement OP_oBARRIER. (do_barrier): New function. (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. (do_t_cpsi): Add V7M restrictions. (do_t_mrs, do_t_msr): Validate V7M variants. (md_assemble): Check for NULL variants. (v7m_psrs, barrier_opt_names): New tables. (insns): Add V7 instructions. Mark V6 instructions absent from V7M. (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. (arm_cpu_option_table): Add Cortex-M3, R4 and A8. (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. (struct cpu_arch_ver_table): Define. (cpu_arch_ver): New. (aeabi_set_public_attributes): Use cpu_arch_ver. Set Tag_CPU_arch_profile. * doc/c-arm.texi: Document new cpu and arch options. gas/testsuite/ * gas/arm/thumb32.d: Fix expected msr and mrs output. * gas/arm/arch7.d: New test. * gas/arm/arch7.s: New test. * gas/arm/arch7m-bad.l: New test. * gas/arm/arch7m-bad.d: New test. * gas/arm/arch7m-bad.s: New test. include/opcode/ * arm.h: Add V7 feature bits. opcodes/ * arm-dis.c (arm_opcodes): Add V7 instructions. (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. (print_arm_address): New function. (print_insn_arm): Use it. Add 'P' and 'U' cases. (psr_name): New function. (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
139 lines
3.8 KiB
Plaintext
139 lines
3.8 KiB
Plaintext
2006-02-24 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (arm_opcodes): Add V7 instructions.
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(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
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(print_arm_address): New function.
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(print_insn_arm): Use it. Add 'P' and 'U' cases.
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(psr_name): New function.
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(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-opc-i.c (bXc): New.
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(mXc): Likewise.
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(OpX2TaTbYaXcC): Likewise.
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(TF). Likewise.
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(TFCM). Likewise.
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(ia64_opcodes_i): Add instructions for tf.
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* ia64-opc.h (IMMU5b): New.
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* ia64-asmtab.c: Regenerated.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c: Update copyright years.
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* ia64-opc-b.c: Likewise.
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2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c (lookup_regindex): Handle ".vm".
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(print_dependency_table): Handle '\"'.
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* ia64-ic.tbl: Updated from SDM 2.2.
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* ia64-raw.tbl: Likewise.
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* ia64-waw.tbl: Likewise.
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* ia64-asmtab.c: Regenerated.
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* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
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2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
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Anil Paranjape <anilp1@kpitcummins.com>
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Shilin Shakti <shilins@kpitcummins.com>
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* xc16x-desc.h: New file
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* xc16x-desc.c: New file
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* xc16x-opc.h: New file
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* xc16x-opc.c: New file
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* xc16x-ibld.c: New file
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* xc16x-asm.c: New file
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* xc16x-dis.c: New file
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* Makefile.am: Entries for xc16x
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* Makefile.in: Regenerate
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* cofigure.in: Add xc16x target information.
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* configure: Regenerate.
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* disassemble.c: Add xc16x target information.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
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moves.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c ('Z'): Add a new macro.
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(dis386_twobyte): Use "movZ" for control register moves.
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2006-02-10 Nick Clifton <nickc@redhat.com>
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* iq2000-asm.c: Regenerate.
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2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
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* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
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2006-01-26 David Ung <davidu@mips.com>
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
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ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
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floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
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nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
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rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
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2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
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ld_d_r, pref_xd_cb): Use signed char to hold data to be
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disassembled.
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* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
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buffer overflows when disassembling instructions like
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ld (ix+123),0x23
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* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
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operand, if the offset is negative.
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2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
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unsigned char to hold data to be disassembled.
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2006-01-17 Andreas Schwab <schwab@suse.de>
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PR binutils/1486
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* disassemble.c (disassemble_init_for_target): Set
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disassembler_needs_relocs for bfd_arch_arm.
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2006-01-16 Paul Brook <paul@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
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f?add?, and f?sub? instructions.
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2006-01-16 Nick Clifton <nickc@redhat.com>
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* po/zh_CN.po: New Chinese (simplified) translation.
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* configure.in (ALL_LINGUAS): Add "zh_CH".
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* configure: Regenerate.
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2006-01-05 Paul Brook <paul@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
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2006-01-06 DJ Delorie <dj@redhat.com>
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* m32c-desc.c: Regenerate.
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* m32c-opc.c: Regenerate.
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* m32c-opc.h: Regenerate.
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2006-01-03 DJ Delorie <dj@redhat.com>
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* cgen-ibld.in (extract_normal): Avoid memory range errors.
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* m32c-ibld.c: Regenerated.
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For older changes see ChangeLog-2005
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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