3076e59490
PR 24538 gas * macro.c (get_any_string): Increase size of buffer used to hold decimal value of expression result. * dw2gencfi.c (get_debugseg_name): Handle an empty name. * dwarf2dbg.c (get_filenum): Catch integer wraparound when extending allocate file array. (dwarf2_directive_filename): Add extra checks of the computed file number. * config/tc-arm.c (arm_tc_equal_in_insn): Insert copy of name into warning hash table. (s_arm_eabi_attribute): Check for obj_elf_vendor_attribute returning -1. * config/tc-i386.c (i386_output_nops): Catch an attempt to generate nops of negative lengths. * as.h (MAX_LITTLENUMS): Move definition to here from... * config/atof-ieee.c: ...here. * config/tc-aarch64.c: ...here. * config/tc-arc.c: ...here. * config/tc-arm.c: ...here. * config/tc-epiphany.c: ...here. * config/tc-i386.c: ...here. * config/tc-ia64.c: ...here. (And correct the value). * config/tc-m32c.c: ...here. * config/tc-m32r.c: ...here. * config/tc-metag.c: ...here. * config/tc-microblaze.c: ...here. * config/tc-nds32.c: ...here. * config/tc-or1k.c: ...here. * config/tc-score.c: ...here. * config/tc-score7.c: ...here. * config/tc-tic4x.c: ...here. * config/tc-tilegx.c: ...here. * config/tc-tilepro.c: ...here. * config/tc-visium.c: ...here. * config/tc-sh.c (md_assemble): Add check for an instruction with no opcodes. * config/tc-mips.c (mips_lookup_insn): Add check for very short instruction name. * config/tc-tic54x.c: Use unsigned chars to access is_end_of_line array. (tic54x_start_line_hook): Check for an empty line. (next_line_shows_parallel): Do not walk off the end of the string. (tic54x_macro_start): Check for too much macro nesting. (tic54x_start_label): Add label_start parameter. Use this parameter to check the first character of the label. * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Pass line_start variable to tic54x_start_label. PR 24538 opcodes * ia64-opc.c (ia64_find_matching_opcode): Check for reaching the end of the table prematurely.
398 lines
9.9 KiB
C
398 lines
9.9 KiB
C
/* tc-or1k.c -- Assembler for the OpenRISC family.
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Copyright (C) 2001-2019 Free Software Foundation, Inc.
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Contributed for OR32 by Johan Rydberg, jrydberg@opencores.org
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/> */
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#include "as.h"
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#include "safe-ctype.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/or1k-desc.h"
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#include "opcodes/or1k-opc.h"
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#include "cgen.h"
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#include "elf/or1k.h"
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#include "dw2gencfi.h"
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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}
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or1k_insn;
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const char comment_chars[] = "#";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = ";";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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#define OR1K_SHORTOPTS "m:"
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const char * md_shortopts = OR1K_SHORTOPTS;
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struct option md_longopts[] =
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{
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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unsigned long or1k_machine = 0; /* default */
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int
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md_parse_option (int c ATTRIBUTE_UNUSED, const char * arg ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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void
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md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
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{
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}
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static void
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ignore_pseudo (int val ATTRIBUTE_UNUSED)
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{
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discard_rest_of_line ();
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}
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static bfd_boolean nodelay = FALSE;
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static void
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s_nodelay (int val ATTRIBUTE_UNUSED)
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{
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nodelay = TRUE;
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}
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const char or1k_comment_chars [] = ";#";
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "align", s_align_bytes, 0 },
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{ "word", cons, 4 },
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{ "proc", ignore_pseudo, 0 },
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{ "endproc", ignore_pseudo, 0 },
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{ "nodelay", s_nodelay, 0 },
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{ NULL, NULL, 0 }
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};
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void
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md_begin (void)
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = or1k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_BIG,
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CGEN_CPU_OPEN_END);
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or1k_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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}
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void
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md_assemble (char * str)
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{
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static int last_insn_had_delay_slot = 0;
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or1k_insn insn;
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char * errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = or1k_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad ("%s", errmsg);
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return;
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
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last_insn_had_delay_slot
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= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
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(void) last_insn_had_delay_slot;
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}
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/* The syntax in the manual says constants begin with '#'.
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We just ignore it. */
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void
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md_operand (expressionS * expressionP)
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{
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if (* input_line_pointer == '#')
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{
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input_line_pointer ++;
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expression (expressionP);
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}
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}
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valueT
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md_section_align (segT segment, valueT size)
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & -(1 << align));
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}
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symbolS *
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md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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/* Interface to relax_segment. */
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const relax_typeS md_relax_table[] =
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{
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/* The fields are:
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1) most positive reach of this state,
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2) most negative reach of this state,
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3) how many bytes this mode will add to the size of the current frag
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4) which index into the table to try if we can't fit into this one. */
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/* The first entry must be unused because an `rlx_more' value of zero ends
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each list. */
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{1, 1, 0, 0},
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/* The displacement used by GAS is from the end of the 4 byte insn,
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so we subtract 4 from the following. */
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{(((1 << 25) - 1) << 2) - 4, -(1 << 25) - 4, 0, 0},
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};
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int
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md_estimate_size_before_relax (fragS * fragP, segT segment ATTRIBUTE_UNUSED)
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{
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return md_relax_table[fragP->fr_subtype].rlx_length;
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}
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/* *fragP has been relaxed to its final size, and now needs to have
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the bytes inside it modified to conform to the new size.
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Called after relaxation is finished.
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fragP->fr_type == rs_machine_dependent.
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fragP->fr_subtype is the subtype of what the address relaxed to. */
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void
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md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
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segT sec ATTRIBUTE_UNUSED,
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fragS * fragP ATTRIBUTE_UNUSED)
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{
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/* FIXME */
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}
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/* Functions concerning relocs. */
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/* The location from which a PC relative jump should be calculated,
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given a PC relative reloc. */
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long
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md_pcrel_from_section (fixS * fixP, segT sec)
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{
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if (fixP->fx_addsy != (symbolS *) NULL
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&& (! S_IS_DEFINED (fixP->fx_addsy)
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|| (S_GET_SEGMENT (fixP->fx_addsy) != sec)
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|| S_IS_EXTERNAL (fixP->fx_addsy)
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|| S_IS_WEAK (fixP->fx_addsy)))
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{
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/* The symbol is undefined (or is defined but not in this section).
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Let the linker figure it out. */
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return 0;
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}
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return fixP->fx_frag->fr_address + fixP->fx_where;
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
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const CGEN_OPERAND * operand,
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fixS * fixP)
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{
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if (fixP->fx_cgen.opinfo)
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return fixP->fx_cgen.opinfo;
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switch (operand->type)
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{
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case OR1K_OPERAND_DISP26:
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fixP->fx_pcrel = 1;
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return BFD_RELOC_OR1K_REL_26;
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default: /* avoid -Wall warning */
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return BFD_RELOC_NONE;
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}
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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void
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md_number_to_chars (char * buf, valueT val, int n)
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{
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number_to_chars_bigendian (buf, val, n);
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}
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/* Turn a string in input_line_pointer into a floating point constant of type
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type, and store the appropriate bytes in *litP. The number of LITTLENUMS
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emitted is stored in *sizeP . An error message is returned, or NULL on OK. */
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const char *
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md_atof (int type, char * litP, int * sizeP)
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{
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return ieee_md_atof (type, litP, sizeP, TRUE);
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}
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bfd_boolean
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or1k_fix_adjustable (fixS * fixP)
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{
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/* We need the symbol name for the VTABLE entries. */
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if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
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|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
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return FALSE;
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return TRUE;
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}
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#define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
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arelent *
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tc_gen_reloc (asection * section, fixS * fixp)
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{
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arelent *reloc;
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bfd_reloc_code_real_type code;
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reloc = XNEW (arelent);
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reloc->sym_ptr_ptr = XNEW (asymbol *);
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*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
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reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
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if (fixp->fx_pcrel)
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{
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if (section->use_rela_p)
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fixp->fx_offset -= md_pcrel_from_section (fixp, section);
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else
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fixp->fx_offset = reloc->address;
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}
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reloc->addend = fixp->fx_offset;
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code = fixp->fx_r_type;
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switch (code)
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{
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case BFD_RELOC_16:
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if (fixp->fx_pcrel)
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code = BFD_RELOC_16_PCREL;
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break;
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case BFD_RELOC_32:
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if (fixp->fx_pcrel)
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code = BFD_RELOC_32_PCREL;
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break;
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case BFD_RELOC_64:
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if (fixp->fx_pcrel)
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code = BFD_RELOC_64_PCREL;
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break;
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default:
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break;
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}
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reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
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if (reloc->howto == NULL)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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_
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("cannot represent %s relocation in this object file format"),
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bfd_get_reloc_code_name (code));
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return NULL;
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}
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return reloc;
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}
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void
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or1k_apply_fix (struct fix *f, valueT *t, segT s)
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{
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gas_cgen_md_apply_fix (f, t, s);
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switch (f->fx_r_type)
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{
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case BFD_RELOC_OR1K_TLS_GD_HI16:
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case BFD_RELOC_OR1K_TLS_GD_LO16:
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case BFD_RELOC_OR1K_TLS_GD_PG21:
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case BFD_RELOC_OR1K_TLS_GD_LO13:
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case BFD_RELOC_OR1K_TLS_LDM_HI16:
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case BFD_RELOC_OR1K_TLS_LDM_LO16:
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case BFD_RELOC_OR1K_TLS_LDM_PG21:
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case BFD_RELOC_OR1K_TLS_LDM_LO13:
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case BFD_RELOC_OR1K_TLS_LDO_HI16:
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case BFD_RELOC_OR1K_TLS_LDO_LO16:
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case BFD_RELOC_OR1K_TLS_IE_HI16:
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case BFD_RELOC_OR1K_TLS_IE_LO16:
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case BFD_RELOC_OR1K_TLS_IE_PG21:
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case BFD_RELOC_OR1K_TLS_IE_LO13:
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case BFD_RELOC_OR1K_TLS_LE_HI16:
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case BFD_RELOC_OR1K_TLS_LE_LO16:
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S_SET_THREAD_LOCAL (f->fx_addsy);
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break;
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default:
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break;
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}
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}
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void
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or1k_elf_final_processing (void)
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{
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if (nodelay)
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elf_elfheader (stdoutput)->e_flags |= EF_OR1K_NODELAY;
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}
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/* Standard calling conventions leave the CFA at SP on entry. */
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void
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or1k_cfi_frame_initial_instructions (void)
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{
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cfi_add_CFA_def_cfa_register (1);
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}
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