binutils-gdb/bfd/elfxx-aarch64.c
Alan Modra fd3619828e bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions.  The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections.  Those sections shouldn't be modified
anyway.

The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma.  I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section.  This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.

bfd/
	* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
	(bfd_get_section_lma, bfd_get_section_alignment),
	(bfd_get_section_size, bfd_get_section_flags),
	(bfd_get_section_userdata): Delete.
	(bfd_section_name, bfd_section_size, bfd_section_vma),
	(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
	(bfd_section_flags, bfd_section_userdata): New.
	(bfd_is_com_section): Rename parameter.
	* section.c (bfd_set_section_userdata, bfd_set_section_vma),
	(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
	(bfd_set_section_size): Delete bfd parameter, rename section parameter.
	(bfd_set_section_lma): New.
	* bfd-in2.h: Regenerate.
	* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
	update callers.
	* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
	* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
	* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
	* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
	* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
	* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
	* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
	* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
	* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
	* xcofflink.c: Update throughout for bfd section macro and function
	changes.
binutils/
	* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
	* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
	* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
	* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
	throughout for bfd section macro and function changes.
gas/
	* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
	* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
	* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
	* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
	* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
	* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
	* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
	* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
	* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
	* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
	* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
	* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
	* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
	* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
	* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
	* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
	* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
	* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
	* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
	* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
	* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
	* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
	* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
	bfd section macro and function changes.
	* write.c (compress_debug): Use bfd_rename_section.
gdb/
	* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
	* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
	* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
	* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
	* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
	* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
	* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
	* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
	* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
	* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
	* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
	* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
	* solib-spu.c, * solib-svr4.c, * solib-target.c,
	* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
	* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
	* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
	* mi/mi-interp.c: Update throughout for bfd section macro and
	function changes.
	* gcore (gcore_create_callback): Use bfd_set_section_lma.
	* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
	* corefile.c, * symtab.c: Update throughout for bfd section
	macro and function changes.
ld/
	* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
	* emultempl/aarch64elf.em, * emultempl/aix.em,
	* emultempl/armcoff.em, * emultempl/armelf.em,
	* emultempl/cr16elf.em, * emultempl/cskyelf.em,
	* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
	* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
	* emultempl/mmo.em, * emultempl/msp430.em,
	* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
	* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
	throughout for bfd section macro and function changes.
libctf/
	* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
	* arc-ext.c: Update throughout for bfd section macro changes.
sim/
	* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
	* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
	* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
	* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
	* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-19 09:40:13 +09:30

925 lines
27 KiB
C

/* AArch64-specific support for ELF.
Copyright (C) 2009-2019 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING3. If not,
see <http://www.gnu.org/licenses/>. */
#include "sysdep.h"
#include "bfd.h"
#include "elf-bfd.h"
#include "elfxx-aarch64.h"
#include <stdarg.h>
#include <string.h>
#define MASK(n) ((1u << (n)) - 1)
/* Sign-extend VALUE, which has the indicated number of BITS. */
bfd_signed_vma
_bfd_aarch64_sign_extend (bfd_vma value, int bits)
{
if (value & ((bfd_vma) 1 << (bits - 1)))
/* VALUE is negative. */
value |= ((bfd_vma) - 1) << bits;
return value;
}
/* Decode the IMM field of ADRP. */
uint32_t
_bfd_aarch64_decode_adrp_imm (uint32_t insn)
{
return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
}
/* Reencode the imm field of add immediate. */
static inline uint32_t
reencode_add_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
}
/* Reencode the IMM field of ADR. */
uint32_t
_bfd_aarch64_reencode_adr_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
| ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
}
/* Reencode the imm field of ld/st pos immediate. */
static inline uint32_t
reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
}
/* Encode the 26-bit offset of unconditional branch. */
static inline uint32_t
reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
{
return (insn & ~MASK (26)) | (ofs & MASK (26));
}
/* Encode the 19-bit offset of conditional branch and compare & branch. */
static inline uint32_t
reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
}
/* Decode the 19-bit offset of load literal. */
static inline uint32_t
reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
}
/* Encode the 14-bit offset of test & branch. */
static inline uint32_t
reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
}
/* Reencode the imm field of move wide. */
static inline uint32_t
reencode_movw_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
}
/* Reencode mov[zn] to movz. */
static inline uint32_t
reencode_movzn_to_movz (uint32_t opcode)
{
return opcode | (1 << 30);
}
/* Reencode mov[zn] to movn. */
static inline uint32_t
reencode_movzn_to_movn (uint32_t opcode)
{
return opcode & ~(1 << 30);
}
/* Return non-zero if the indicated VALUE has overflowed the maximum
range expressible by a unsigned number with the indicated number of
BITS. */
static bfd_reloc_status_type
aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
{
bfd_vma lim;
if (bits >= sizeof (bfd_vma) * 8)
return bfd_reloc_ok;
lim = (bfd_vma) 1 << bits;
if (value >= lim)
return bfd_reloc_overflow;
return bfd_reloc_ok;
}
/* Return non-zero if the indicated VALUE has overflowed the maximum
range expressible by an signed number with the indicated number of
BITS. */
static bfd_reloc_status_type
aarch64_signed_overflow (bfd_vma value, unsigned int bits)
{
bfd_signed_vma svalue = (bfd_signed_vma) value;
bfd_signed_vma lim;
if (bits >= sizeof (bfd_vma) * 8)
return bfd_reloc_ok;
lim = (bfd_signed_vma) 1 << (bits - 1);
if (svalue < -lim || svalue >= lim)
return bfd_reloc_overflow;
return bfd_reloc_ok;
}
/* Insert the addend/value into the instruction or data object being
relocated. */
bfd_reloc_status_type
_bfd_aarch64_elf_put_addend (bfd *abfd,
bfd_byte *address, bfd_reloc_code_real_type r_type,
reloc_howto_type *howto, bfd_signed_vma addend)
{
bfd_reloc_status_type status = bfd_reloc_ok;
bfd_signed_vma old_addend = addend;
bfd_vma contents;
int size;
size = bfd_get_reloc_size (howto);
switch (size)
{
case 0:
return status;
case 2:
contents = bfd_get_16 (abfd, address);
break;
case 4:
if (howto->src_mask != 0xffffffff)
/* Must be 32-bit instruction, always little-endian. */
contents = bfd_getl32 (address);
else
/* Must be 32-bit data (endianness dependent). */
contents = bfd_get_32 (abfd, address);
break;
case 8:
contents = bfd_get_64 (abfd, address);
break;
default:
abort ();
}
switch (howto->complain_on_overflow)
{
case complain_overflow_dont:
break;
case complain_overflow_signed:
status = aarch64_signed_overflow (addend,
howto->bitsize + howto->rightshift);
break;
case complain_overflow_unsigned:
status = aarch64_unsigned_overflow (addend,
howto->bitsize + howto->rightshift);
break;
case complain_overflow_bitfield:
default:
abort ();
}
addend >>= howto->rightshift;
switch (r_type)
{
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
contents = reencode_branch_ofs_26 (contents, addend);
break;
case BFD_RELOC_AARCH64_BRANCH19:
contents = reencode_cond_branch_ofs_19 (contents, addend);
break;
case BFD_RELOC_AARCH64_TSTBR14:
contents = reencode_tst_branch_ofs_14 (contents, addend);
break;
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
contents = reencode_ld_lit_ofs_19 (contents, addend);
break;
case BFD_RELOC_AARCH64_TLSDESC_CALL:
break;
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
contents = _bfd_aarch64_reencode_adr_imm (contents, addend);
break;
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
/* Corresponds to: add rd, rn, #uimm12 to provide the low order
12 bits of the page offset following
BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
(pc-relative) page base. */
contents = reencode_add_imm (contents, addend);
break;
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LDST128_LO12:
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
case BFD_RELOC_AARCH64_LDST8_LO12:
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
/* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
12 bits address offset. */
contents = reencode_ldst_pos_imm (contents, addend);
break;
/* Group relocations to create high bits of a 16, 32, 48 or 64
bit signed data or abs address inline. Will change
instruction to MOVN or MOVZ depending on sign of calculated
value. */
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2_S:
case BFD_RELOC_AARCH64_MOVW_PREL_G0:
case BFD_RELOC_AARCH64_MOVW_PREL_G1:
case BFD_RELOC_AARCH64_MOVW_PREL_G2:
case BFD_RELOC_AARCH64_MOVW_PREL_G3:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
/* NOTE: We can only come here with movz or movn. */
if (addend < 0)
{
/* Force use of MOVN. */
addend = ~addend;
contents = reencode_movzn_to_movn (contents);
}
else
{
/* Force use of MOVZ. */
contents = reencode_movzn_to_movz (contents);
}
/* Fall through. */
/* Group relocations to create a 16, 32, 48 or 64 bit unsigned
data or abs address inline. */
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G3:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
contents = reencode_movw_imm (contents, addend);
break;
default:
/* Repack simple data */
if (howto->dst_mask & (howto->dst_mask + 1))
return bfd_reloc_notsupported;
contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
break;
}
switch (size)
{
case 2:
bfd_put_16 (abfd, contents, address);
break;
case 4:
if (howto->dst_mask != 0xffffffff)
/* must be 32-bit instruction, always little-endian */
bfd_putl32 (contents, address);
else
/* must be 32-bit data (endianness dependent) */
bfd_put_32 (abfd, contents, address);
break;
case 8:
bfd_put_64 (abfd, contents, address);
break;
default:
abort ();
}
return status;
}
bfd_vma
_bfd_aarch64_elf_resolve_relocation (bfd *input_bfd,
bfd_reloc_code_real_type r_type,
bfd_vma place, bfd_vma value,
bfd_vma addend, bfd_boolean weak_undef_p)
{
bfd_boolean tls_reloc = TRUE;
switch (r_type)
{
case BFD_RELOC_AARCH64_NONE:
case BFD_RELOC_AARCH64_TLSDESC_CALL:
break;
case BFD_RELOC_AARCH64_16_PCREL:
case BFD_RELOC_AARCH64_32_PCREL:
case BFD_RELOC_AARCH64_64_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
case BFD_RELOC_AARCH64_MOVW_PREL_G0:
case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G1:
case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G2:
case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G3:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
case BFD_RELOC_AARCH64_TSTBR14:
if (weak_undef_p)
value = place;
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_16:
case BFD_RELOC_AARCH64_32:
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G2_S:
case BFD_RELOC_AARCH64_MOVW_G3:
tls_reloc = FALSE;
/* fall-through. */
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
/* Weak Symbols and TLS relocations are implementation defined. For this
case we choose to emit 0. */
if (weak_undef_p && tls_reloc)
{
_bfd_error_handler (_("%pB: warning: Weak TLS is implementation "
"defined and may not work as expected"),
input_bfd);
value = place;
}
value = value + addend;
break;
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
if (weak_undef_p)
value = PG (place);
value = PG (value + addend) - PG (place);
break;
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
value = PG (value + addend) - PG (place);
break;
/* Caller must make sure addend is the base address of .got section. */
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
addend = PG (addend);
/* Fall through. */
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
value = value - addend;
break;
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LDST128_LO12:
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
case BFD_RELOC_AARCH64_LDST8_LO12:
case BFD_RELOC_AARCH64_TLSDESC_ADD:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
case BFD_RELOC_AARCH64_TLSDESC_LDR:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = PG_OFFSET (value + addend);
break;
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
value = value + addend;
break;
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
value = (value + addend) & (bfd_vma) 0xffff0000;
break;
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
/* Mask off low 12bits, keep all other high bits, so that the later
generic code could check whehter there is overflow. */
value = (value + addend) & ~(bfd_vma) 0xfff;
break;
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
value = (value + addend) & (bfd_vma) 0xffff;
break;
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
value = (value + addend) & ~(bfd_vma) 0xffffffff;
value -= place & ~(bfd_vma) 0xffffffff;
break;
default:
break;
}
return value;
}
/* Support for core dump NOTE sections. */
bfd_boolean
_bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
{
int offset;
size_t size;
switch (note->descsz)
{
default:
return FALSE;
case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
/* pr_cursig */
elf_tdata (abfd)->core->signal
= bfd_get_16 (abfd, note->descdata + 12);
/* pr_pid */
elf_tdata (abfd)->core->lwpid
= bfd_get_32 (abfd, note->descdata + 32);
/* pr_reg */
offset = 112;
size = 272;
break;
}
/* Make a ".reg/999" section. */
return _bfd_elfcore_make_pseudosection (abfd, ".reg",
size, note->descpos + offset);
}
bfd_boolean
_bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
{
switch (note->descsz)
{
default:
return FALSE;
case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
elf_tdata (abfd)->core->program
= _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
elf_tdata (abfd)->core->command
= _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
}
/* Note that for some reason, a spurious space is tacked
onto the end of the args in some (at least one anyway)
implementations, so strip it off if it exists. */
{
char *command = elf_tdata (abfd)->core->command;
int n = strlen (command);
if (0 < n && command[n - 1] == ' ')
command[n - 1] = '\0';
}
return TRUE;
}
char *
_bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
...)
{
switch (note_type)
{
default:
return NULL;
case NT_PRPSINFO:
{
char data[136] ATTRIBUTE_NONSTRING;
va_list ap;
va_start (ap, note_type);
memset (data, 0, sizeof (data));
strncpy (data + 40, va_arg (ap, const char *), 16);
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
DIAGNOSTIC_PUSH;
/* GCC 8.0 and 8.1 warn about 80 equals destination size with
-Wstringop-truncation:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
*/
DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
#endif
strncpy (data + 56, va_arg (ap, const char *), 80);
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
DIAGNOSTIC_POP;
#endif
va_end (ap);
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
note_type, data, sizeof (data));
}
case NT_PRSTATUS:
{
char data[392];
va_list ap;
long pid;
int cursig;
const void *greg;
va_start (ap, note_type);
memset (data, 0, sizeof (data));
pid = va_arg (ap, long);
bfd_put_32 (abfd, pid, data + 32);
cursig = va_arg (ap, int);
bfd_put_16 (abfd, cursig, data + 12);
greg = va_arg (ap, const void *);
memcpy (data + 112, greg, 272);
va_end (ap);
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
note_type, data, sizeof (data));
}
}
}
/* Find the first input bfd with GNU property and merge it with GPROP. If no
such input is found, add it to a new section at the last input. Update
GPROP accordingly. */
bfd *
_bfd_aarch64_elf_link_setup_gnu_properties (struct bfd_link_info *info,
uint32_t *gprop)
{
asection *sec;
bfd *pbfd;
bfd *ebfd = NULL;
elf_property *prop;
unsigned align;
uint32_t gnu_prop = *gprop;
/* Find a normal input file with GNU property note. */
for (pbfd = info->input_bfds;
pbfd != NULL;
pbfd = pbfd->link.next)
if (bfd_get_flavour (pbfd) == bfd_target_elf_flavour
&& bfd_count_sections (pbfd) != 0)
{
ebfd = pbfd;
if (elf_properties (pbfd) != NULL)
break;
}
/* If ebfd != NULL it is either an input with property note or the last
input. Either way if we have gnu_prop, we should add it (by creating
a section if needed). */
if (ebfd != NULL && gnu_prop)
{
prop = _bfd_elf_get_property (ebfd,
GNU_PROPERTY_AARCH64_FEATURE_1_AND,
4);
if (gnu_prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI
&& !(prop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
_bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti "
"when all inputs do not have BTI in NOTE "
"section."), ebfd);
prop->u.number |= gnu_prop;
prop->pr_kind = property_number;
/* pbfd being NULL implies ebfd is the last input. Create the GNU
property note section. */
if (pbfd == NULL)
{
sec = bfd_make_section_with_flags (ebfd,
NOTE_GNU_PROPERTY_SECTION_NAME,
(SEC_ALLOC
| SEC_LOAD
| SEC_IN_MEMORY
| SEC_READONLY
| SEC_HAS_CONTENTS
| SEC_DATA));
if (sec == NULL)
info->callbacks->einfo (
_("%F%P: failed to create GNU property section\n"));
align = (bfd_get_mach (ebfd) & bfd_mach_aarch64_ilp32) ? 2 : 3;
if (!bfd_set_section_alignment (sec, align))
info->callbacks->einfo (_("%F%pA: failed to align section\n"),
sec);
elf_section_type (sec) = SHT_NOTE;
}
}
pbfd = _bfd_elf_link_setup_gnu_properties (info);
if (bfd_link_relocatable (info))
return pbfd;
/* If pbfd has any GNU_PROPERTY_AARCH64_FEATURE_1_AND properties, update
gnu_prop accordingly. */
if (pbfd != NULL)
{
elf_property_list *p;
/* The property list is sorted in order of type. */
for (p = elf_properties (pbfd); p; p = p->next)
{
/* Check for all GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
if (GNU_PROPERTY_AARCH64_FEATURE_1_AND == p->property.pr_type)
{
gnu_prop = (p->property.u.number
& (GNU_PROPERTY_AARCH64_FEATURE_1_PAC
| GNU_PROPERTY_AARCH64_FEATURE_1_BTI));
break;
}
else if (GNU_PROPERTY_AARCH64_FEATURE_1_AND < p->property.pr_type)
break;
}
}
*gprop = gnu_prop;
return pbfd;
}
/* Define elf_backend_parse_gnu_properties for AArch64. */
enum elf_property_kind
_bfd_aarch64_elf_parse_gnu_properties (bfd *abfd, unsigned int type,
bfd_byte *ptr, unsigned int datasz)
{
elf_property *prop;
switch (type)
{
case GNU_PROPERTY_AARCH64_FEATURE_1_AND:
if (datasz != 4)
{
_bfd_error_handler
( _("error: %pB: <corrupt AArch64 used size: 0x%x>"),
abfd, datasz);
return property_corrupt;
}
prop = _bfd_elf_get_property (abfd, type, datasz);
/* Combine properties of the same type. */
prop->u.number |= bfd_h_get_32 (abfd, ptr);
prop->pr_kind = property_number;
break;
default:
return property_ignored;
}
return property_number;
}
/* Merge AArch64 GNU property BPROP with APROP also accounting for PROP.
If APROP isn't NULL, merge it with BPROP and/or PROP. Vice-versa if BROP
isn't NULL. Return TRUE if there is any update to APROP or if BPROP should
be merge with ABFD. */
bfd_boolean
_bfd_aarch64_elf_merge_gnu_properties (struct bfd_link_info *info
ATTRIBUTE_UNUSED,
bfd *abfd ATTRIBUTE_UNUSED,
elf_property *aprop,
elf_property *bprop,
uint32_t prop)
{
unsigned int orig_number;
bfd_boolean updated = FALSE;
unsigned int pr_type = aprop != NULL ? aprop->pr_type : bprop->pr_type;
switch (pr_type)
{
case GNU_PROPERTY_AARCH64_FEATURE_1_AND:
{
if (aprop != NULL && bprop != NULL)
{
orig_number = aprop->u.number;
aprop->u.number = (orig_number & bprop->u.number) | prop;
updated = orig_number != aprop->u.number;
/* Remove the property if all feature bits are cleared. */
if (aprop->u.number == 0)
aprop->pr_kind = property_remove;
break;
}
/* If either is NULL, the AND would be 0 so, if there is
any PROP, asign it to the input that is not NULL. */
if (prop)
{
if (aprop != NULL)
{
orig_number = aprop->u.number;
aprop->u.number = prop;
updated = orig_number != aprop->u.number;
}
else
{
bprop->u.number = prop;
updated = TRUE;
}
}
/* No PROP and BPROP is NULL, so remove APROP. */
else if (aprop != NULL)
{
aprop->pr_kind = property_remove;
updated = TRUE;
}
}
break;
default:
abort ();
}
return updated;
}
/* Fix up AArch64 GNU properties. */
void
_bfd_aarch64_elf_link_fixup_gnu_properties
(struct bfd_link_info *info ATTRIBUTE_UNUSED,
elf_property_list **listp)
{
elf_property_list *p, *prev;
for (p = *listp, prev = *listp; p; p = p->next)
{
unsigned int type = p->property.pr_type;
if (type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
{
if (p->property.pr_kind == property_remove)
{
/* Remove empty property. */
if (prev == p)
{
*listp = p->next;
prev = *listp;
}
else
prev->next = p->next;
continue;
}
prev = p;
}
else if (type > GNU_PROPERTY_HIPROC)
{
/* The property list is sorted in order of type. */
break;
}
}
}