392 lines
12 KiB
Plaintext
392 lines
12 KiB
Plaintext
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
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* alpha-dis.c: Regenerate.
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* crx-dis.c: Likewise.
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* disassemble.c: Likewise.
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* epiphany-opc.c: Likewise.
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* fr30-opc.c: Likewise.
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* frv-opc.c: Likewise.
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* ip2k-opc.c: Likewise.
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* iq2000-opc.c: Likewise.
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* lm32-opc.c: Likewise.
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* lm32-opinst.c: Likewise.
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* m32c-opc.c: Likewise.
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* m32r-opc.c: Likewise.
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* m32r-opinst.c: Likewise.
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* mep-opc.c: Likewise.
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* mt-opc.c: Likewise.
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* or1k-opc.c: Likewise.
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* or1k-opinst.c: Likewise.
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* tic80-opc.c: Likewise.
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* xc16x-opc.c: Likewise.
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* xstormy16-opc.c: Likewise.
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2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
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fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
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calcsd, and calcxd instructions.
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* arc-opc.c (insert_nps_bitop_size): Delete.
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(extract_nps_bitop_size): Delete.
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(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
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(extract_nps_qcmp_m3): Define.
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(extract_nps_qcmp_m2): Define.
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(extract_nps_qcmp_m1): Define.
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(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
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(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
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(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
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NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
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NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
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NPS_QCMP_M3.
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2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
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2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
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* Makefile.in: Regenerated with automake 1.11.6.
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* aclocal.m4: Likewise.
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2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
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instructions.
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* arc-opc.c (insert_nps_cmem_uimm16): New function.
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(extract_nps_cmem_uimm16): New function.
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(arc_operands): Add NPS_XLDST_UIMM16 operand.
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2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-dis.c (arc_insn_length): New function.
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(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
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(find_format): Change insnLen parameter to unsigned.
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2016-04-13 Nick Clifton <nickc@redhat.com>
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PR target/19937
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* v850-opc.c (v850_opcodes): Correct masks for long versions of
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the LD.B and LD.BU instructions.
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2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-dis.c (find_format): Check for extension flags.
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(print_flags): New function.
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(print_insn_arc): Update for .extCondCode, .extCoreRegister and
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.extAuxRegister.
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* arc-ext.c (arcExtMap_coreRegName): Use
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LAST_EXTENSION_CORE_REGISTER.
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(arcExtMap_coreReadWrite): Likewise.
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(dump_ARC_extmap): Update printing.
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* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
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(arc_aux_regs): Add cpu field.
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* arc-regs.h: Add cpu field, lower case name aux registers.
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2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-tbl.h: Add rtsc, sleep with no arguments.
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2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
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Initialize.
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(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
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(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
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(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
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(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
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(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
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(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
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(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
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(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
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(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
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(arc_opcode arc_opcodes): Null terminate the array.
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(arc_num_opcodes): Remove.
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* arc-ext.h (INSERT_XOP): Define.
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(extInstruction_t): Likewise.
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(arcExtMap_instName): Delete.
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(arcExtMap_insn): New function.
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(arcExtMap_genOpcode): Likewise.
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* arc-ext.c (ExtInstruction): Remove.
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(create_map): Zero initialize instruction fields.
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(arcExtMap_instName): Remove.
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(arcExtMap_insn): New function.
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(dump_ARC_extmap): More info while debuging.
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(arcExtMap_genOpcode): New function.
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* arc-dis.c (find_format): New function.
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(print_insn_arc): Use find_format.
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(arc_get_disassembler): Enable dump_ARC_extmap only when
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debugging.
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2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
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* mips-dis.c (print_mips16_insn_arg): Mask unused extended
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instruction bits out.
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
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* arc-opc.c (arc_flag_operands): Add new flags.
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(arc_flag_classes): Add new classes.
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2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
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2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
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encode1, rflt, crc16, and crc32 instructions.
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* arc-opc.c (arc_flag_operands): Add F_NPS_R.
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(arc_flag_classes): Add C_NPS_R.
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(insert_nps_bitop_size_2b): New function.
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(extract_nps_bitop_size_2b): Likewise.
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(insert_nps_bitop_uimm8): Likewise.
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(extract_nps_bitop_uimm8): Likewise.
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(arc_operands): Add new operand entries.
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2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-regs.h: Add a new subclass field. Add double assist
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accumulator register values.
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* arc-tbl.h: Use DPA subclass to mark the double assist
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instructions. Use DPX/SPX subclas to mark the FPX instructions.
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* arc-opc.c (RSP): Define instead of SP.
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(arc_aux_regs): Add the subclass field.
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2016-04-05 Jiong Wang <jiong.wang@arm.com>
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* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
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2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
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NPS_R_SRC1.
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2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
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issues. No functional changes.
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2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
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(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
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(RTT): Remove duplicate.
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(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
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(PCT_CONFIG*): Remove.
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(D1L, D1H, D2H, D2L): Define.
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2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
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2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-tbl.h (invld07): Remove.
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* arc-ext-tbl.h: New file.
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* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
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* arc-opc.c (arc_opcodes): Add ext-tbl include.
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2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
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Fix -Wstack-usage warnings.
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* aarch64-dis.c (print_operands): Substitute size.
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* aarch64-opc.c (print_register_offset_address): Substitute tblen.
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2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
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* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
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to get a proper diagnostic when an invalid ASR register is used.
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2016-03-22 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-nps400-tbl.h: New file.
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* arc-opc.c: Add top level comment.
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(insert_nps_3bit_dst): New function.
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(extract_nps_3bit_dst): New function.
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(insert_nps_3bit_src2): New function.
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(extract_nps_3bit_src2): New function.
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(insert_nps_bitop_size): New function.
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(extract_nps_bitop_size): New function.
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(arc_flag_operands): Add nps400 entries.
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(arc_flag_classes): Add nps400 entries.
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(arc_operands): Add nps400 entries.
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(arc_opcodes): Add nps400 include.
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2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-opc.c (arc_flag_classes): Convert all flag classes to use
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the new class enum values.
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2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-dis.c (print_insn_arc): Handle nps400.
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2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
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* arc-opc.c (BASE): Delete.
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2016-03-18 Nick Clifton <nickc@redhat.com>
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PR target/19721
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* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
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of MOV insn that aliases an ORR insn.
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2016-03-16 Jiong Wang <jiong.wang@arm.com>
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* arm-dis.c (neon_opcodes): Support new FP16 instructions.
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2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
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* mcore-opc.h: Add const qualifiers.
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* microblaze-opc.h (struct op_code_struct): Likewise.
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* sh-opc.h: Likewise.
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* tic4x-dis.c (tic4x_print_indirect): Likewise.
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(tic4x_print_op): Likewise.
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2016-03-02 Alan Modra <amodra@gmail.com>
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* or1k-desc.h: Regenerate.
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* fr30-ibld.c: Regenerate.
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* rl78-decode.c: Regenerate.
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2016-03-01 Nick Clifton <nickc@redhat.com>
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PR target/19747
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* rl78-dis.c (print_insn_rl78_common): Fix typo.
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2016-02-24 Renlin Li <renlin.li@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
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(print_insn_coprocessor): Support fp16 instructions.
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2016-02-24 Renlin Li <renlin.li@arm.com>
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* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
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vminnm, vrint(mpna).
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2016-02-24 Renlin Li <renlin.li@arm.com>
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* arm-dis.c (print_insn_coprocessor): Check co-processor number for
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cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
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2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (print_insn): Parenthesize expression to prevent
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truncated addresses.
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(OP_J): Likewise.
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2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
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Janek van Oirschot <jvanoirs@synopsys.com>
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* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
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variable.
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2016-02-04 Nick Clifton <nickc@redhat.com>
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PR target/19561
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* msp430-dis.c (print_insn_msp430): Add a special case for
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decoding an RRC instruction with the ZC bit set in the extension
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word.
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* cgen-ibld.in (insert_normal): Rework calculation of shift.
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* epiphany-ibld.c: Regenerate.
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* fr30-ibld.c: Regenerate.
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* frv-ibld.c: Regenerate.
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* ip2k-ibld.c: Regenerate.
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* iq2000-ibld.c: Regenerate.
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* lm32-ibld.c: Regenerate.
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* m32c-ibld.c: Regenerate.
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* m32r-ibld.c: Regenerate.
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* mep-ibld.c: Regenerate.
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* mt-ibld.c: Regenerate.
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* or1k-ibld.c: Regenerate.
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* xc16x-ibld.c: Regenerate.
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* xstormy16-ibld.c: Regenerate.
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* epiphany-dis.c: Regenerated from latest cpu files.
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2016-02-01 Michael McConville <mmcco@mykolab.com>
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* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
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test bit.
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2016-01-25 Renlin Li <renlin.li@arm.com>
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* arm-dis.c (mapping_symbol_for_insn): New function.
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(find_ifthen_state): Call mapping_symbol_for_insn().
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2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
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* aarch64-opc.c (operand_general_constraint_met_p): Check validity
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of MSR UAO immediate operand.
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2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
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* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
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instruction support.
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2016-01-17 Alan Modra <amodra@gmail.com>
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* configure: Regenerate.
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2016-01-14 Nick Clifton <nickc@redhat.com>
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* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
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instructions that can support stack pointer operations.
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* rl78-decode.c: Regenerate.
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* rl78-dis.c: Fix display of stack pointer in MOVW based
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instructions.
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2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
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* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
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testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
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erxtatus_el1 and erxaddr_el1.
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2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
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* arm-dis.c (arm_opcodes): Add "esb".
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(thumb_opcodes): Likewise.
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2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c <xscmpnedp>: Delete.
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<xvcmpnedp>: Likewise.
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<xvcmpnedp.>: Likewise.
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<xvcmpnesp>: Likewise.
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<xvcmpnesp.>: Likewise.
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2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
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PR gas/13050
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* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
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addition to ISA_A.
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2016-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2015
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Copyright (C) 2016 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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