321 lines
6.7 KiB
C
321 lines
6.7 KiB
C
/* Disassemble AVR instructions.
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Copyright (C) 1999, 2000 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <assert.h>
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opintl.h"
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struct avr_opcodes_s
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{
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char *name;
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char *constraints;
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char *opcode;
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int insn_size; /* in words */
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int isa;
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unsigned int bin_opcode;
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unsigned int bin_mask;
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};
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#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
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{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN, 0},
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struct avr_opcodes_s avr_opcodes[] =
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{
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#include "opcode/avr.h"
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{NULL, NULL, NULL, 0, 0, 0, 0}
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};
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static void avr_operand (unsigned int insn, unsigned int insn2,
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unsigned int pc, int constraint, char *buf,
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char *comment, int regs);
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static void
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avr_operand (insn, insn2, pc, constraint, buf, comment, regs)
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unsigned int insn;
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unsigned int insn2;
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unsigned int pc;
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int constraint;
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char *buf;
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char *comment;
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int regs;
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{
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switch (constraint)
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{
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/* Any register operand. */
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case 'r':
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if (regs)
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insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
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else
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insn = (insn & 0x01f0) >> 4; /* destination register */
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sprintf (buf, "r%d", insn);
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break;
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case 'd':
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if (regs)
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sprintf (buf, "r%d", 16 + (insn & 0xf));
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else
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sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
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break;
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case 'w':
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sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
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break;
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case 'a':
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if (regs)
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sprintf (buf, "r%d", 16 + (insn & 7));
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else
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sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
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break;
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case 'v':
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if (regs)
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sprintf (buf, "r%d", (insn & 0xf) * 2);
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else
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sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
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break;
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case 'e':
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if (insn & 0x2)
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*buf++ = '-';
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switch ((insn >> 2) & 0x3)
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{
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case 0: *buf++ = 'Z'; break;
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case 2: *buf++ = 'Y'; break;
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case 3: *buf++ = 'X'; break;
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default: buf += sprintf (buf, _(" unknown register ")); break;
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}
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if (insn & 0x1)
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*buf++ = '+';
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*buf = '\0';
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break;
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case 'z':
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*buf++ = 'Z';
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if (insn & 0x1)
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*buf++ = '+';
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*buf = '\0';
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break;
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case 'b':
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{
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unsigned int x = insn;
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x = (insn & 7);
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x |= (insn >> 7) & (3 << 3);
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x |= (insn >> 8) & (1 << 5);
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if (insn & 0x8)
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*buf++ = 'Y';
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else
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*buf++ = 'Z';
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sprintf (buf, "+%d", x);
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sprintf (comment, "0x%02x", x);
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}
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break;
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case 'h':
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sprintf (buf, "0x%x",
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((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2);
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break;
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case 'L':
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{
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int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
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sprintf (buf, ".%+-8d", rel_addr);
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sprintf (comment, "0x%x", pc + 2 + rel_addr);
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}
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break;
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case 'l':
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{
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int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
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sprintf (buf, ".%+-8d", rel_addr);
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sprintf (comment, "0x%x", pc + 2 + rel_addr);
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}
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break;
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case 'i':
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sprintf (buf, "0x%04X", insn2);
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break;
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case 'M':
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sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
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sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
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break;
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case 'n':
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sprintf (buf, _("Internal disassembler error"));
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break;
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case 'K':
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sprintf (buf, "%d", (insn & 0xf) | ((insn >> 2) & 0x30));
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break;
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case 's':
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sprintf (buf, "%d", insn & 7);
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break;
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case 'S':
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sprintf (buf, "%d", (insn >> 4) & 7);
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break;
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case 'P':
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{
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unsigned int x;
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x = (insn & 0xf);
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x |= (insn >> 5) & 0x30;
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sprintf (buf, "0x%02x", x);
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sprintf (comment, "%d", x);
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}
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break;
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case 'p':
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{
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unsigned int x;
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x = (insn >> 3) & 0x1f;
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sprintf (buf, "0x%02x", x);
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sprintf (comment, "%d", x);
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}
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break;
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case '?':
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*buf = '\0';
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break;
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default:
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sprintf (buf, _("unknown constraint `%c'"), constraint);
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}
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}
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static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
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static unsigned short
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avrdis_opcode (addr, info)
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bfd_vma addr;
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disassemble_info *info;
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{
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bfd_byte buffer[2];
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int status;
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status = info->read_memory_func(addr, buffer, 2, info);
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if (status != 0)
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{
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info->memory_error_func(status, addr, info);
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return -1;
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}
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return bfd_getl16 (buffer);
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}
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int
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print_insn_avr(addr, info)
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bfd_vma addr;
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disassemble_info *info;
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{
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unsigned int insn, insn2;
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struct avr_opcodes_s *opcode;
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void *stream = info->stream;
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fprintf_ftype prin = info->fprintf_func;
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static int initialized;
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int cmd_len = 2;
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if (!initialized)
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{
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initialized = 1;
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for (opcode = avr_opcodes; opcode->name; opcode++)
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{
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char * s;
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unsigned int bin = 0;
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unsigned int mask = 0;
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for (s = opcode->opcode; *s; ++s)
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{
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bin <<= 1;
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mask <<= 1;
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bin |= (*s == '1');
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mask |= (*s == '1' || *s == '0');
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}
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assert (s - opcode->opcode == 16);
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assert (opcode->bin_opcode == bin);
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opcode->bin_mask = mask;
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}
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}
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insn = avrdis_opcode (addr, info);
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for (opcode = avr_opcodes; opcode->name; opcode++)
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{
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if ((insn & opcode->bin_mask) == opcode->bin_opcode)
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break;
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}
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if (opcode->name)
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{
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char op1[20], op2[20], comment1[40], comment2[40];
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char *op = opcode->constraints;
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op1[0] = 0;
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op2[0] = 0;
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comment1[0] = 0;
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comment2[0] = 0;
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insn2 = 0;
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if (opcode->insn_size > 1)
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{
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insn2 = avrdis_opcode (addr + 2, info);
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cmd_len = 4;
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}
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if (*op && *op != '?')
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{
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int regs = REGISTER_P (*op);
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avr_operand (insn, insn2, addr, *op, op1, comment1, 0);
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if (*(++op) == ',')
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avr_operand (insn, insn2, addr, *(++op), op2,
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*comment1 ? comment2 : comment1, regs);
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}
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(*prin) (stream, " %-8s", opcode->name);
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if (*op1)
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(*prin) (stream, "%s", op1);
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if (*op2)
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(*prin) (stream, ", %s", op2);
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if (*comment1)
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(*prin) (stream, "\t; %s", comment1);
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if (*comment2)
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(*prin) (stream, " %s", comment2);
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}
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else
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(*prin) (stream, ".word 0x%04x\t; ????", insn);
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return cmd_len;
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}
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