418 lines
10 KiB
C
418 lines
10 KiB
C
/* This file is part of the program psim.
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Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* Additional, and optional expressions. */
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#ifdef WITH_ALTIVEC
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#include "altivec_expression.h"
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#endif
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#ifdef WITH_E500
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#include "e500_expression.h"
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#endif
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/* 32bit target expressions:
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Each calculation is performed three times using each of the
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signed64, unsigned64 and long integer types. The macro ALU_END
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(in _ALU_RESULT_VAL) then selects which of the three alternative
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results will be used in the final assignment of the target
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register. As this selection is determined at compile time by
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fields in the instruction (OE, EA, Rc) the compiler has sufficient
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information to firstly simplify the selection code into a single
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case and then back anotate the equations and hence eliminate any
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resulting dead code. That dead code being the calculations that,
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as it turned out were not in the end needed.
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64bit arrithemetic is used firstly because it allows the use of
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gcc's efficient long long operators (typically efficiently output
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inline) and secondly because the resultant answer will contain in
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the low 32bits the answer while in the high 32bits is either carry
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or status information. */
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/* 64bit target expressions:
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Unfortunatly 128bit arrithemetic isn't that common. Consequently
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the 32/64 bit trick can not be used. Instead all calculations are
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required to retain carry/overflow information in separate
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variables. Even with this restriction it is still possible for the
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trick of letting the compiler discard the calculation of unneeded
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values */
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/* Macro's to type cast 32bit constants to 64bits */
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#define SIGNED64(val) ((signed64)(signed32)(val))
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#define UNSIGNED64(val) ((unsigned64)(unsigned32)(val))
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/* Start a section of ALU code */
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#define ALU_BEGIN(val) \
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{ \
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natural_word alu_val; \
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unsigned64 alu_carry_val; \
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signed64 alu_overflow_val; \
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ALU_SET(val)
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/* assign the result to the target register */
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#define ALU_END(TARG,CA,OE,Rc) \
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{ /* select the result to use */ \
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signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
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/* determine the overflow bit if needed */ \
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if (OE) { \
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if ((((unsigned64)(alu_overflow_val & BIT64(0))) \
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>> 32) \
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== (alu_overflow_val & BIT64(32))) \
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XER &= (~xer_overflow); \
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else \
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XER |= (xer_summary_overflow | xer_overflow); \
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} \
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/* Update the carry bit if needed */ \
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if (CA) { \
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XER = ((XER & ~xer_carry) \
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| SHUFFLED32((alu_carry_val >> 32), 31, xer_carry_bit)); \
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/* if (alu_carry_val & BIT64(31)) \
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XER |= (xer_carry); \
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else \
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XER &= (~xer_carry); */ \
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} \
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TRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", \
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(long)alu_result, (long)alu_result, (long)XER)); \
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/* Update the Result Conditions if needed */ \
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CR0_COMPARE(alu_result, 0, Rc); \
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/* assign targ same */ \
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TARG = alu_result; \
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}}
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/* select the result from the different options */
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#define _ALU_RESULT_VAL(CA,OE,Rc) (WITH_TARGET_WORD_BITSIZE == 64 \
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? alu_val \
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: (OE \
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? alu_overflow_val \
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: (CA \
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? alu_carry_val \
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: alu_val)))
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/* More basic alu operations */
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define ALU_SET(val) \
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do { \
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alu_val = val; \
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alu_carry_val = ((unsigned64)alu_val) >> 32; \
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alu_overflow_val = ((signed64)alu_val) >> 32; \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_SET(val) \
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do { \
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alu_val = val; \
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alu_carry_val = (unsigned32)(alu_val); \
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alu_overflow_val = (signed32)(alu_val); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define ALU_ADD(val) \
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do { \
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unsigned64 alu_lo = (UNSIGNED64(alu_val) \
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+ UNSIGNED64(val)); \
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signed alu_carry = ((alu_lo & BIT(31)) != 0); \
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alu_carry_val = (alu_carry_val \
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+ UNSIGNED64(EXTRACTED(val, 0, 31)) \
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+ alu_carry); \
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alu_overflow_val = (alu_overflow_val \
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+ SIGNED64(EXTRACTED(val, 0, 31)) \
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+ alu_carry); \
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alu_val = alu_val + val; \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_ADD(val) \
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do { \
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alu_val += val; \
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alu_carry_val += (unsigned32)(val); \
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alu_overflow_val += (signed32)(val); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define ALU_ADD_CA \
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do { \
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signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
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ALU_ADD(carry); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_ADD_CA \
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do { \
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signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
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ALU_ADD(carry); \
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} while (0)
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#endif
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#if 0
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_SUB(val) \
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do { \
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alu_val -= val; \
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alu_carry_val -= (unsigned32)(val); \
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alu_overflow_val -= (signed32)(val); \
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} while (0)
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#endif
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_OR(val) \
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do { \
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alu_val |= val; \
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alu_carry_val = (unsigned32)(alu_val); \
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alu_overflow_val = (signed32)(alu_val); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_XOR(val) \
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do { \
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alu_val ^= val; \
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alu_carry_val = (unsigned32)(alu_val); \
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alu_overflow_val = (signed32)(alu_val); \
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} while (0)
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#endif
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#if 0
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_NEGATE \
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do { \
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alu_val = -alu_val; \
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alu_carry_val = -alu_carry_val; \
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alu_overflow_val = -alu_overflow_val; \
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} while(0)
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#endif
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_AND(val) \
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do { \
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alu_val &= val; \
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alu_carry_val = (unsigned32)(alu_val); \
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alu_overflow_val = (signed32)(alu_val); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define ALU_NOT \
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do { \
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signed64 new_alu_val = ~alu_val; \
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ALU_SET(new_alu_val); \
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} while (0)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define ALU_NOT \
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do { \
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signed new_alu_val = ~alu_val; \
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ALU_SET(new_alu_val); \
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} while(0)
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#endif
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/* Macros for updating the condition register */
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#define CR1_UPDATE(Rc) \
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do { \
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if (Rc) { \
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CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
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} \
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} while (0)
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#define _DO_CR_COMPARE(LHS, RHS) \
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(((LHS) < (RHS)) \
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? cr_i_negative \
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: (((LHS) > (RHS)) \
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? cr_i_positive \
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: cr_i_zero))
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#define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL)
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#define CR_FIELD(REG) EXTRACTED32(CR, REG*4, REG*4+3)
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#define CR_SET_XER_SO(REG, VAL) \
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do { \
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creg new_bits = ((XER & xer_summary_overflow) \
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? (cr_i_summary_overflow | VAL) \
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: VAL); \
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CR_SET(REG, new_bits); \
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} while(0)
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#define CR_COMPARE(REG, LHS, RHS) \
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do { \
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creg new_bits = ((XER & xer_summary_overflow) \
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? (cr_i_summary_overflow | _DO_CR_COMPARE(LHS,RHS)) \
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: _DO_CR_COMPARE(LHS,RHS)); \
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CR_SET(REG, new_bits); \
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} while (0)
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#define CR0_COMPARE(LHS, RHS, Rc) \
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do { \
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if (Rc) { \
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CR_COMPARE(0, LHS, RHS); \
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TRACE(trace_alu, \
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("CR=0x%08lx, LHS=%ld, RHS=%ld\n", \
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(unsigned long)CR, (long)LHS, (long)RHS)); \
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} \
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} while (0)
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/* Bring data in from the cold */
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#define MEM(SIGN, EA, NR_BYTES) \
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((SIGN##_##NR_BYTES) vm_data_map_read_##NR_BYTES(cpu_data_map(processor), EA, \
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processor, cia)) \
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#define STORE(EA, NR_BYTES, VAL) \
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do { \
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vm_data_map_write_##NR_BYTES(cpu_data_map(processor), EA, VAL, \
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processor, cia); \
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} while (0)
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/* some FPSCR update macros. */
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#define FPSCR_BEGIN \
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{ \
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fpscreg old_fpscr UNUSED = FPSCR
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#define FPSCR_END(Rc) { \
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/* always update VX */ \
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if ((FPSCR & fpscr_vx_bits)) \
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FPSCR |= fpscr_vx; \
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else \
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FPSCR &= ~fpscr_vx; \
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/* always update FEX */ \
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if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
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|| ((FPSCR & fpscr_ox) && (FPSCR & fpscr_oe)) \
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|| ((FPSCR & fpscr_ux) && (FPSCR & fpscr_ue)) \
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|| ((FPSCR & fpscr_zx) && (FPSCR & fpscr_ze)) \
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|| ((FPSCR & fpscr_xx) && (FPSCR & fpscr_xe))) \
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FPSCR |= fpscr_fex; \
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else \
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FPSCR &= ~fpscr_fex; \
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CR1_UPDATE(Rc); \
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/* interrupt enabled? */ \
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if ((MSR & (msr_floating_point_exception_mode_0 \
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| msr_floating_point_exception_mode_1)) \
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&& (FPSCR & fpscr_fex)) \
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program_interrupt(processor, cia, \
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floating_point_enabled_program_interrupt); \
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}}
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#define FPSCR_SET(REG, VAL) MBLIT32(FPSCR, REG*4, REG*4+3, VAL)
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#define FPSCR_FIELD(REG) EXTRACTED32(FPSCR, REG*4, REG*4+3)
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#define FPSCR_SET_FPCC(VAL) MBLIT32(FPSCR, fpscr_fpcc_bit, fpscr_fpcc_bit+3, VAL)
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/* Handle various exceptions */
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#define FPSCR_OR_VX(VAL) \
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do { \
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/* NOTE: VAL != 0 */ \
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FPSCR |= (VAL); \
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FPSCR |= fpscr_fx; \
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} while (0)
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#define FPSCR_SET_OX(COND) \
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do { \
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if (COND) { \
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FPSCR |= fpscr_ox; \
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FPSCR |= fpscr_fx; \
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} \
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else \
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FPSCR &= ~fpscr_ox; \
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} while (0)
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#define FPSCR_SET_UX(COND) \
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do { \
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if (COND) { \
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FPSCR |= fpscr_ux; \
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FPSCR |= fpscr_fx; \
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} \
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else \
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FPSCR &= ~fpscr_ux; \
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} while (0)
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#define FPSCR_SET_ZX(COND) \
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do { \
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if (COND) { \
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FPSCR |= fpscr_zx; \
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FPSCR |= fpscr_fx; \
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} \
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else \
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FPSCR &= ~fpscr_zx; \
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} while (0)
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#define FPSCR_SET_XX(COND) \
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do { \
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if (COND) { \
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FPSCR |= fpscr_xx; \
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FPSCR |= fpscr_fx; \
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} \
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} while (0)
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/* Note: code using SET_FI must also explicitly call SET_XX */
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#define FPSCR_SET_FR(COND) do { \
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if (COND) \
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FPSCR |= fpscr_fr; \
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else \
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FPSCR &= ~fpscr_fr; \
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} while (0)
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#define FPSCR_SET_FI(COND) \
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do { \
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if (COND) { \
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FPSCR |= fpscr_fi; \
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} \
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else \
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FPSCR &= ~fpscr_fi; \
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} while (0)
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#define FPSCR_SET_FPRF(VAL) \
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do { \
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FPSCR = (FPSCR & ~fpscr_fprf) | (VAL); \
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} while (0)
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