195 lines
5.7 KiB
C
195 lines
5.7 KiB
C
/* memory.c -- Memory accessor functions for the AArch64 simulator
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Copyright (C) 2015-2016 Free Software Foundation, Inc.
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Contributed by Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include <sys/types.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "bfd.h"
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#include "libbfd.h"
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#include "libiberty.h"
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#include "elf/internal.h"
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#include "elf/common.h"
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#include "memory.h"
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#include "simulator.h"
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#include "sim-core.h"
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static inline void
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mem_error (sim_cpu *cpu, const char *message, uint64_t addr)
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{
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TRACE_MEMORY (cpu, "ERROR: %s: %" PRIx64, message, addr);
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}
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#define FETCH_FUNC(RETURN_TYPE, ACCESS_TYPE, NAME, N) \
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RETURN_TYPE \
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aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address) \
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{ \
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return (RETURN_TYPE) sim_core_read_##N (cpu, 0, read_map, address); \
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}
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/* A variant of the FETCH_FUNC macro that uses unaligned reads.
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The AArch64 only requires 4-byte alignment for 8-byte quantities
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but the sim common core does not support this. */
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#define FETCH_FUNC_U(RETURN_TYPE, ACCESS_TYPE, NAME) \
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RETURN_TYPE \
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aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address) \
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{ \
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return (RETURN_TYPE) sim_core_read_unaligned_8 (cpu, 0, read_map, address); \
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}
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FETCH_FUNC_U (uint64_t, uint64_t, u64)
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FETCH_FUNC_U (int64_t, int64_t, s64)
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FETCH_FUNC (uint32_t, uint32_t, u32, 4)
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FETCH_FUNC (int32_t, int32_t, s32, 4)
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FETCH_FUNC (uint32_t, uint16_t, u16, 2)
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FETCH_FUNC (int32_t, int16_t, s16, 2)
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FETCH_FUNC (uint32_t, uint8_t, u8, 1)
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FETCH_FUNC (int32_t, int8_t, s8, 1)
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FETCH_FUNC (float, float, float, 4)
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FETCH_FUNC_U (double, double, double)
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void
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aarch64_get_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister *a)
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{
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a->v[0] = sim_core_read_unaligned_8 (cpu, 0, read_map, address);
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a->v[1] = sim_core_read_unaligned_8 (cpu, 0, read_map, address + 8);
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}
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#define STORE_FUNC(TYPE, NAME, N) \
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void \
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aarch64_set_mem_##NAME (sim_cpu *cpu, uint64_t address, TYPE value) \
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{ \
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TRACE_MEMORY (cpu, \
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"write of %" PRIx64 " (%d bytes) to %" PRIx64, \
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(uint64_t) value, N, address); \
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\
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sim_core_write_unaligned_##N (cpu, 0, write_map, address, value); \
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}
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/* A variant of the STORE_FUNC macro that uses unaligned writes.
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The AArch64 only requires 4-byte alignment for 8-byte quantities
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but the sim common core does not support this. */
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#define STORE_FUNC_U(TYPE, NAME) \
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void \
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aarch64_set_mem_##NAME (sim_cpu *cpu, uint64_t address, TYPE value) \
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{ \
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TRACE_MEMORY (cpu, \
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"write of %" PRIx64 " (8 bytes) to %" PRIx64, \
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(uint64_t) value, address); \
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\
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sim_core_write_unaligned_8 (cpu, 0, write_map, address, value); \
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}
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STORE_FUNC_U (uint64_t, u64)
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STORE_FUNC_U (int64_t, s64)
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STORE_FUNC (uint32_t, u32, 4)
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STORE_FUNC (int32_t, s32, 4)
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STORE_FUNC (uint16_t, u16, 2)
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STORE_FUNC (int16_t, s16, 2)
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STORE_FUNC (uint8_t, u8, 1)
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STORE_FUNC (int8_t, s8, 1)
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STORE_FUNC (float, float, 4)
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STORE_FUNC_U (double, double)
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void
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aarch64_set_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister a)
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{
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TRACE_MEMORY (cpu,
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"write of long double %" PRIx64 " %" PRIx64 " to %" PRIx64,
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a.v[0], a.v[1], address);
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sim_core_write_unaligned_8 (cpu, 0, write_map, address, a.v[0]);
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sim_core_write_unaligned_8 (cpu, 0, write_map, address + 8, a.v[1]);
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}
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void
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aarch64_get_mem_blk (sim_cpu * cpu,
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uint64_t address,
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char * buffer,
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unsigned length)
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{
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unsigned len;
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len = sim_core_read_buffer (CPU_STATE (cpu), cpu, read_map,
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buffer, address, length);
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if (len == length)
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return;
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memset (buffer, 0, length);
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if (cpu)
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mem_error (cpu, "read of non-existant mem block at", address);
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sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
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sim_stopped, SIM_SIGBUS);
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}
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const char *
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aarch64_get_mem_ptr (sim_cpu *cpu, uint64_t address)
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{
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char *addr = sim_core_trans_addr (CPU_STATE (cpu), cpu, read_map, address);
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if (addr == NULL)
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{
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mem_error (cpu, "request for non-existant mem addr of", address);
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sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
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sim_stopped, SIM_SIGBUS);
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}
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return addr;
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}
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/* We implement a combined stack and heap. That way the sbrk()
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function in libgloss/aarch64/syscalls.c has a chance to detect
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an out-of-memory condition by noticing a stack/heap collision.
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The heap starts at the end of loaded memory and carries on up
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to an arbitary 2Gb limit. */
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uint64_t
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aarch64_get_heap_start (sim_cpu *cpu)
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{
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uint64_t heap = aarch64_get_sym_value ("end");
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if (heap == 0)
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heap = aarch64_get_sym_value ("_end");
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if (heap == 0)
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{
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heap = STACK_TOP - 0x100000;
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sim_io_eprintf (CPU_STATE (cpu),
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"Unable to find 'end' symbol - using addr based "
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"upon stack instead %" PRIx64 "\n",
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heap);
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}
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return heap;
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}
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uint64_t
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aarch64_get_stack_start (sim_cpu *cpu)
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{
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if (aarch64_get_heap_start (cpu) >= STACK_TOP)
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mem_error (cpu, "executable is too big", aarch64_get_heap_start (cpu));
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return STACK_TOP;
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}
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