435 lines
14 KiB
C
435 lines
14 KiB
C
/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
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Copyright (C) 2010-2015 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "ia64-tdep.h"
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#include "ia64-hpux-tdep.h"
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#include "osabi.h"
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#include "gdbtypes.h"
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#include "solib.h"
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#include "target.h"
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#include "frame.h"
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#include "regcache.h"
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#include "gdbcore.h"
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#include "inferior.h"
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/* A sequence of instructions pushed on the stack when we want to perform
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an inferior function call. The main purpose of this code is to save
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the output region of the register frame belonging to the function
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from which we are making the call. Normally, all registers are saved
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prior to the call, but this does not include stacked registers because
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they are seen by GDB as pseudo registers.
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With Linux kernels, these stacked registers can be saved by simply
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creating a new register frame, or in other words by moving the BSP.
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But the HP/UX kernel does not allow this. So we rely on this code
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instead, that makes functions calls whose only purpose is to create
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new register frames.
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The array below is the result obtained after assembling the code
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shown below. It's an array of bytes in order to make it independent
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of the host endianess, in case it ends up being used on more than
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one target.
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start:
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// Save b0 before using it (into preserved reg: r4).
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mov r4 = b0
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;;
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br.call.dptk.few b0 = stub#
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;;
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// Add a nop bundle where we can insert our dummy breakpoint.
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nop.m 0
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nop.i 0
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nop.i 0
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;;
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stub:
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// Alloc a new register stack frame. Here, we set the size
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// of all regions to zero. Eventually, GDB will manually
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// change the instruction to set the size of the local region
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// to match size of the output region of the function from
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// which we are making the function call. This is to protect
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// the value of the output registers of the function from
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// which we are making the call.
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alloc r6 = ar.pfs, 0, 0, 0, 0
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// Save b0 before using it again (into preserved reg: r5).
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mov r5 = b0
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;;
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// Now that we have protected the entire output region of the
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// register stack frame, we can call our function that will
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// setup the arguments, and call our target function.
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br.call.dptk.few b0 = call_dummy#
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;;
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// Restore b0, ar.pfs, and return
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mov b0 = r5
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mov.i ar.pfs = r6
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;;
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br.ret.dptk.few b0
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;;
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call_dummy:
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// Alloc a new frame, with 2 local registers, and 8 output registers
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// (8 output registers for the maximum of 8 slots passed by register).
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alloc r32 = ar.pfs, 2, 0, 8, 0
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// Save b0 before using it to call our target function.
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mov r33 = b0
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// Load the argument values placed by GDB inside r14-r21 in their
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// proper registers.
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or r34 = r14, r0
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or r35 = r15, r0
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or r36 = r16, r0
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or r37 = r17, r0
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or r38 = r18, r0
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or r39 = r19, r0
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or r40 = r20, r0
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or r41 = r21, r0
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;;
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// actual call
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br.call.dptk.few b0 = b1
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;;
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mov.i ar.pfs=r32
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mov b0=r33
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;;
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br.ret.dptk.few b0
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;;
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*/
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static const gdb_byte ia64_hpux_dummy_code[] =
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{
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0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x40, 0x00,
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0x00, 0x62, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
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0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x00, 0x20, 0x00, 0x00, 0x52,
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0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
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0x02, 0x30, 0x00, 0x00, 0x80, 0x05, 0x50, 0x00,
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0x00, 0x62, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
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0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x00, 0x30, 0x00, 0x00, 0x52,
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0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x28,
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0x04, 0x80, 0x03, 0x00, 0x60, 0x00, 0xaa, 0x00,
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0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x80, 0x00, 0x00, 0x84, 0x02,
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0x00, 0x00, 0x29, 0x04, 0x80, 0x05, 0x10, 0x02,
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0x00, 0x62, 0x00, 0x40, 0xe4, 0x00, 0x38, 0x80,
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0x00, 0x18, 0x3d, 0x00, 0x0e, 0x20, 0x40, 0x82,
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0x00, 0x1c, 0x40, 0xa0, 0x14, 0x01, 0x38, 0x80,
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0x00, 0x30, 0x49, 0x00, 0x0e, 0x20, 0x70, 0x9a,
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0x00, 0x1c, 0x40, 0x00, 0x45, 0x01, 0x38, 0x80,
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0x0a, 0x48, 0x55, 0x00, 0x0e, 0x20, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
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0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x00, 0x10, 0x00, 0x80, 0x12,
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0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x01, 0x55, 0x00, 0x00, 0x10, 0x0a, 0x00, 0x07,
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0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x02, 0x00, 0x80, 0x00, 0x00, 0x84, 0x02
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};
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/* The offset to be used in order to get the __reason pseudo-register
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when using one of the *UREGS ttrace requests (see system header file
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/usr/include/ia64/sys/uregs.h for more details).
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The documentation for this pseudo-register says that a nonzero value
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indicates that the thread stopped due to a fault, trap, or interrupt.
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A null value indicates a stop inside a syscall. */
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#define IA64_HPUX_UREG_REASON 0x00070000
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/* Return nonzero if the value of the register identified by REGNUM
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can be modified. */
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static int
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ia64_hpux_can_store_ar_register (int regnum)
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{
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switch (regnum)
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{
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case IA64_RSC_REGNUM:
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case IA64_RNAT_REGNUM:
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case IA64_CSD_REGNUM:
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case IA64_SSD_REGNUM:
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case IA64_CCV_REGNUM:
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case IA64_UNAT_REGNUM:
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case IA64_FPSR_REGNUM:
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case IA64_PFS_REGNUM:
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case IA64_LC_REGNUM:
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case IA64_EC_REGNUM:
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return 1;
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break;
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default:
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return 0;
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break;
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}
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}
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/* The "cannot_store_register" target_ops method. */
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static int
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ia64_hpux_cannot_store_register (struct gdbarch *gdbarch, int regnum)
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{
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/* General registers. */
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if (regnum == IA64_GR0_REGNUM)
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return 1;
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/* FP register. */
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if (regnum == IA64_FR0_REGNUM || regnum == IA64_FR1_REGNUM)
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return 1;
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/* Application registers. */
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if (regnum >= IA64_AR0_REGNUM && regnum <= IA64_AR0_REGNUM + 127)
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return (!ia64_hpux_can_store_ar_register (regnum));
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/* We can store all other registers. */
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return 0;
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}
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/* Return nonzero if the inferior is stopped inside a system call. */
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static int
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ia64_hpux_stopped_in_syscall (struct gdbarch *gdbarch)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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struct target_ops *ops = ¤t_target;
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gdb_byte buf[8];
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int len;
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len = target_read (ops, TARGET_OBJECT_HPUX_UREGS, NULL,
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buf, IA64_HPUX_UREG_REASON, sizeof (buf));
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if (len == -1)
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/* The target wasn't able to tell us. Assume we are not stopped
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in a system call, which is the normal situation. */
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return 0;
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gdb_assert (len == 8);
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return (extract_unsigned_integer (buf, len, byte_order) == 0);
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}
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/* The "size_of_register_frame" gdbarch_tdep routine for ia64-hpux. */
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static int
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ia64_hpux_size_of_register_frame (struct frame_info *this_frame,
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ULONGEST cfm)
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{
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int sof;
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if (frame_relative_level (this_frame) == 0
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&& ia64_hpux_stopped_in_syscall (get_frame_arch (this_frame)))
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/* If the inferior stopped in a system call, the base address
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of the register frame is at BSP - SOL instead of BSP - SOF.
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This is an HP-UX exception. */
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sof = (cfm & 0x3f80) >> 7;
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else
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sof = (cfm & 0x7f);
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return sof;
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}
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/* Implement the push_dummy_code gdbarch method.
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This function assumes that the SP is already 16-byte-aligned. */
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static CORE_ADDR
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ia64_hpux_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
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CORE_ADDR funaddr, struct value **args, int nargs,
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struct type *value_type, CORE_ADDR *real_pc,
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CORE_ADDR *bp_addr, struct regcache *regcache)
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{
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ULONGEST cfm;
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int sof, sol, sor, soo;
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gdb_byte buf[16];
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regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
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sof = cfm & 0x7f;
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sol = (cfm >> 7) & 0x7f;
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sor = (cfm >> 14) & 0xf;
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soo = sof - sol - sor;
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/* Reserve some space on the stack to hold the dummy code. */
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sp = sp - sizeof (ia64_hpux_dummy_code);
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/* Set the breakpoint address at the first instruction of the bundle
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in the dummy code that has only nops. This is where the dummy code
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expects us to break. */
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*bp_addr = sp + 0x20;
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/* Start the inferior function call from the dummy code. The dummy
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code will then call our function. */
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*real_pc = sp;
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/* Transfer the dummy code to the inferior. */
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write_memory (sp, ia64_hpux_dummy_code, sizeof (ia64_hpux_dummy_code));
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/* Update the size of the local portion of the register frame allocated
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by ``stub'' to match the size of the output region of the current
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register frame. This allows us to save the stacked registers.
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The "alloc" instruction is located at slot 0 of the bundle at +0x30.
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Update the "sof" and "sol" portion of that instruction which are
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respectively at bits 18-24 and 25-31 of the bundle. */
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memcpy (buf, ia64_hpux_dummy_code + 0x30, sizeof (buf));
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buf[2] |= ((soo & 0x3f) << 2);
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buf[3] |= (soo << 1);
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if (soo > 63)
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buf[3] |= 1;
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write_memory (sp + 0x30, buf, sizeof (buf));
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/* Return the new (already properly aligned) SP. */
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return sp;
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}
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/* The "allocate_new_rse_frame" ia64_infcall_ops routine for ia64-hpux. */
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static void
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ia64_hpux_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp,
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int sof)
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{
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/* We cannot change the value of the BSP register on HP-UX,
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so we can't allocate a new RSE frame. */
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}
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/* The "store_argument_in_slot" ia64_infcall_ops routine for ia64-hpux. */
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static void
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ia64_hpux_store_argument_in_slot (struct regcache *regcache, CORE_ADDR bsp,
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int slotnum, gdb_byte *buf)
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{
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/* The call sequence on this target expects us to place the arguments
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inside r14 - r21. */
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regcache_cooked_write (regcache, IA64_GR0_REGNUM + 14 + slotnum, buf);
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}
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/* The "set_function_addr" ia64_infcall_ops routine for ia64-hpux. */
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static void
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ia64_hpux_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr)
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{
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/* The calling sequence calls the function whose address is placed
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in register b1. */
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regcache_cooked_write_unsigned (regcache, IA64_BR1_REGNUM, func_addr);
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}
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/* The ia64_infcall_ops structure for ia64-hpux. */
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static const struct ia64_infcall_ops ia64_hpux_infcall_ops =
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{
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ia64_hpux_allocate_new_rse_frame,
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ia64_hpux_store_argument_in_slot,
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ia64_hpux_set_function_addr
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};
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/* The "dummy_id" gdbarch routine for ia64-hpux. */
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static struct frame_id
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ia64_hpux_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
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{
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CORE_ADDR sp, pc, bp_addr, bsp;
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sp = get_frame_register_unsigned (this_frame, IA64_GR12_REGNUM);
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/* Just double-check that the frame PC is within a certain region
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of the stack that would be plausible for our dummy code (the dummy
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code was pushed at SP + 16). If not, then return a null frame ID.
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This is necessary in our case, because it is possible to produce
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the same frame ID for a normal frame, if that frame corresponds
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to the function called by our dummy code, and the function has not
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modified the registers that we use to build the dummy frame ID. */
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pc = get_frame_pc (this_frame);
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if (pc < sp + 16 || pc >= sp + 16 + sizeof (ia64_hpux_dummy_code))
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return null_frame_id;
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/* The call sequence is such that the address of the dummy breakpoint
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we inserted is stored in r5. */
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bp_addr = get_frame_register_unsigned (this_frame, IA64_GR5_REGNUM);
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bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
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return frame_id_build_special (sp, bp_addr, bsp);
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}
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/* Should be set to non-NULL if the ia64-hpux solib module is linked in.
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This may not be the case because the shared library support code can
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only be compiled on ia64-hpux. */
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struct target_so_ops *ia64_hpux_so_ops = NULL;
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/* The "find_global_pointer_from_solib" gdbarch_tdep routine for
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ia64-hpux. */
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static CORE_ADDR
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ia64_hpux_find_global_pointer_from_solib (struct gdbarch *gdbarch,
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CORE_ADDR faddr)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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struct target_ops *ops = ¤t_target;
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gdb_byte buf[8];
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LONGEST len;
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len = target_read (ops, TARGET_OBJECT_HPUX_SOLIB_GOT,
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paddress (gdbarch, faddr), buf, 0, sizeof (buf));
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return extract_unsigned_integer (buf, len, byte_order);
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}
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static void
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ia64_hpux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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tdep->size_of_register_frame = ia64_hpux_size_of_register_frame;
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set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
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set_gdbarch_cannot_store_register (gdbarch, ia64_hpux_cannot_store_register);
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/* Inferior functions must be called from stack. */
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set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
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set_gdbarch_push_dummy_code (gdbarch, ia64_hpux_push_dummy_code);
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tdep->infcall_ops = ia64_hpux_infcall_ops;
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tdep->find_global_pointer_from_solib
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= ia64_hpux_find_global_pointer_from_solib;
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set_gdbarch_dummy_id (gdbarch, ia64_hpux_dummy_id);
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if (ia64_hpux_so_ops)
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set_solib_ops (gdbarch, ia64_hpux_so_ops);
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}
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/* Provide a prototype to silence -Wmissing-prototypes. */
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extern initialize_file_ftype _initialize_ia64_hpux_tdep;
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void
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_initialize_ia64_hpux_tdep (void)
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{
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gdbarch_register_osabi (bfd_arch_ia64, 0, GDB_OSABI_HPUX_ELF,
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ia64_hpux_init_abi);
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}
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