binutils-gdb/sim/mips
Frank Ch. Eigler 534a3d5cf1 * Continuing unit testing of PKE simulator. It now successfully matches
the SCEI PKE simulator's output on its own test sample (tsv432.in).

	* sky-pke.h (PKE_MEM_READ, PKE_MEM_WRITE, PKE_REG_MASK_SET): Add
 	trace file records.

	* sky-pke.c: (pke_track_write): Removed function.  Replaced with
 	in-line modifications to VU tracking tables.
	(pke_attach): Attach VU tracking tables.  Use line buffering on
 	trace files.
	(pke_issue): Spit out additional trace records.
	(pke_pc_operand_bits): Correct bitfield masking error.
	(*): Replace sim_read/write with kludge PKE_MEM_READ/WRITE
 	throughout.
	(pke_code_unpack): Correct numerous small bugs in operand decoding
 	etc.
1998-02-20 01:50:01 +00:00
..
.Sanitize * Partially implement new VPE_STAT register. 1998-02-16 21:44:45 +00:00
ChangeLog * interp.c (load_memory): Add missing "break"'s. 1998-02-19 15:24:10 +00:00
config.in
configure * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars. 1998-02-06 03:19:56 +00:00
configure.in Fall back from using igen to using gencode for the mips64vr4100 because 1998-02-19 21:28:50 +00:00
gencode.c * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
interp.c * interp.c (load_memory): Add missing "break"'s. 1998-02-19 15:24:10 +00:00
m16.dc New files, update .Sanitize 1998-02-05 22:08:33 +00:00
m16.igen
Makefile.in * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars. 1998-02-06 03:19:56 +00:00
mdmx.igen mips: Add multi-processor support for r5900. Others might work. 1998-02-01 03:29:48 +00:00
mips.dc
mips.igen * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
README.Cygnus Document existence of old (gencode) and new (igen) MIPS ISA simulators. 1998-01-16 01:09:15 +00:00
sim-main.h Rewrite the mipsI/II/III pending-slot code. 1998-02-02 13:49:17 +00:00
sky-pke.c * Continuing unit testing of PKE simulator. It now successfully matches 1998-02-20 01:50:01 +00:00
sky-pke.h * Continuing unit testing of PKE simulator. It now successfully matches 1998-02-20 01:50:01 +00:00
sky-vu0.c * Many changes to make sky sim build with --enable-sim-warnings. 1998-02-10 20:08:16 +00:00
sky-vu0.h * Added VU0_CIA register #define. 1998-02-16 22:09:57 +00:00
sky-vu1.c * XGKICK now uses memory-based GIF fifo. 1998-02-17 23:50:35 +00:00
sky-vu1.h * Add magic VU1_CIA register. 1998-02-16 22:07:11 +00:00
tconfig.in
vr5400.igen For MADD et.al. instructions sign extend 32 bit result assigned to a 1997-12-13 04:23:31 +00:00

This directory contains two very different simulators:

	o	gencode (old)

		Gencode.c outputs a single monolithic file that is
		#included by interp.c

	o	igen (new)

		The *.igen files are used as inputs to ../igen/igen.
		A number of separate, fairly modula files, are created.

The new simulator has a number of advantages:

	o	builtin support for multi-simming (single simulator
		image supporting a number of different instruction
		set architectures).

	o	Easier maintenance. The input files are not confused
		by an intermixing with the generator code.

gencode continues to exist so that old architectures can be emulated.
*.igen should be used when adding new architectures or adding
instructions to an existing ISA.

Known bugs?

A mips16 simulator cannot be built using igen.  A custom mips16
engine.c needs to be written.

In mips.igen, the semantics for many of the instructions were created
using code generated by gencode.  Those semantic segments could be
greatly simplified.


----

Old README.Cygnus ...

> README.Cygnus
-------------------------------------------------------------------------------

The following are the main reasons for constructing the simulator as a
generator:

1) Avoid large fixed decode source file, with lots of #ifs controlling
   the compilation. i.e. keep the source cleaner, smaller and easier
   to parse.

2) Allow optimum code to be created, without run-time checks on
   instruction types. Ensure that the simulator engine only includes
   code for the architecture being targetted. e.g. This avoids
   run-time checks on ISA conformance, aswell as increasing
   throughput.

3) Allow updates to the instruction sets to be added quickly. Having a
   table means that the information is together, and is easier to
   manipulate. Having the table generate the engine, rather than the
   run-time parse the table gives higher performance at simulation
   time.

4) Keep all the similar simulation code together. i.e. have a single
   place where, for example, the addition code is held. This ensures that
   updates to the simulation are not spread over a large flat source
   file maintained by the developer.

-------------------------------------------------------------------------------

To keep the simulator simple (and to avoid the slight chance of
mis-matched files) the manifests describing an engine, and the
simulator engine itself, are held in the same source file.

This means that the engine must be included twice, with the first pass
controlled by the SIM_MANIFESTS definition.

-------------------------------------------------------------------------------
> EOF README.Cygnus