b416ba9b50
Don't convert PC-relative REL relocations against absolute symbols to section-relative references and retain the original symbol reference instead. Offsets into the absolute section may overflow the limited range of their in-place addend field, causing an assembly error, e.g.: $ cat test.s .text .globl foo .ent foo foo: b bar .end foo .set bar, 0x12345678 $ as -EB -32 -o test.o test.s test.s: Assembler messages: test.s:3: Error: relocation overflow $ With the original reference retained the source can now be assembled and linked successfully: $ as -EB -32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000ffff b 0 <foo> 0: R_MIPS_PC16 bar 4: 00000000 nop ... $ ld -melf32btsmip -Ttext 0x12340000 -e foo -o test test.o $ objdump -dr test test: file format elf32-tradbigmips Disassembly of section .text: 12340000 <foo>: 12340000: 1000159d b 12345678 <bar> 12340004: 00000000 nop ... $ For simplicity always retain the original symbol reference, even if it would indeed fit. Making TC_FORCE_RELOCATION_ABS separate from TC_FORCE_RELOCATION causes R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 branch relocations against absolute symbols to be converted on RELA targets to section-relative references. This is an intended effect of this change. Absolute symbols carry no ISA annotation in their `st_other' field and their value is not going to change with linker relaxation, so it is safe to discard the original reference and keep the calculated final symbol value only in the relocation's addend. Similarly R6 R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations referring absolute symbols can be safely converted even on REL targets, as there the in-place addend of these relocations covers the entire 32-bit address space so it can hold the calculated final symbol value, and likewise the value referred won't be affected by any linker relaxation. Add a set of suitable test cases and enable REL linker tests which now work and were previously used as dump patterns for RELA tests only. gas/ * config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro. (mips_force_relocation_abs): New prototype. * config/tc-mips.c (mips_force_relocation_abs): New function. * testsuite/gas/mips/branch-absolute.d: Adjust dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/branch-absolute-addend.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf.exp: Run `branch-absolute-addend', `mips16-branch-absolute', `mips16-branch-absolute-addend' and `micromips-branch-absolute-addend'.
215 lines
6.4 KiB
C
215 lines
6.4 KiB
C
/* tc-mips.h -- header file for tc-mips.c.
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Copyright (C) 1993-2016 Free Software Foundation, Inc.
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Contributed by the OSF and Ralph Campbell.
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Written by Keith Knowles and Ralph Campbell, working independently.
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Modified for ECOFF support by Ian Lance Taylor of Cygnus Support.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef TC_MIPS
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#define TC_MIPS
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struct frag;
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struct expressionS;
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/* Default to big endian. */
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#ifndef TARGET_BYTES_BIG_ENDIAN
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#define TARGET_BYTES_BIG_ENDIAN 1
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#endif
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#define TARGET_ARCH bfd_arch_mips
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#define WORKING_DOT_WORD 1
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#define OLD_FLOAT_READS
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#define REPEAT_CONS_EXPRESSIONS
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#define RELOC_EXPANSION_POSSIBLE
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#define MAX_RELOC_EXPANSION 3
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#define LOCAL_LABELS_FB 1
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#define TC_ADDRESS_BYTES mips_address_bytes
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extern int mips_address_bytes (void);
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/* Maximum symbol offset that can be encoded in a BFD_RELOC_GPREL16
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relocation. */
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#define MAX_GPREL_OFFSET (0x7FF0)
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#define md_relax_frag(segment, fragp, stretch) \
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mips_relax_frag(segment, fragp, stretch)
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extern int mips_relax_frag (asection *, struct frag *, long);
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#define md_undefined_symbol(name) (0)
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#define md_operand(x)
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extern char mips_nop_opcode (void);
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#define NOP_OPCODE (mips_nop_opcode ())
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extern void mips_handle_align (struct frag *);
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#define HANDLE_ALIGN(fragp) mips_handle_align (fragp)
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#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
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struct insn_label_list;
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struct mips_segment_info {
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struct insn_label_list *labels;
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unsigned int mips16 : 1;
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unsigned int micromips : 1;
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};
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#define TC_SEGMENT_INFO_TYPE struct mips_segment_info
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/* This field is nonzero if the symbol is the target of a MIPS16 jump. */
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#define TC_SYMFIELD_TYPE int
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/* Tell assembler that we have an itbl_mips.h header file to include. */
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#define HAVE_ITBL_CPU
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/* The endianness of the target format may change based on command
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line arguments. */
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#define TARGET_FORMAT mips_target_format()
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extern const char *mips_target_format (void);
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/* MIPS PIC level. */
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enum mips_pic_level
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{
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/* Do not generate PIC code. */
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NO_PIC,
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/* Generate PIC code as in the SVR4 MIPS ABI. */
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SVR4_PIC,
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/* VxWorks's PIC model. */
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VXWORKS_PIC
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};
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extern enum mips_pic_level mips_pic;
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extern int tc_get_register (int frame);
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#define md_after_parse_args() mips_after_parse_args()
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extern void mips_after_parse_args (void);
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#define tc_init_after_args() mips_init_after_args()
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extern void mips_init_after_args (void);
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#define md_parse_long_option(arg) mips_parse_long_option (arg)
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extern int mips_parse_long_option (const char *);
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#define tc_frob_label(sym) mips_define_label (sym)
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extern void mips_define_label (symbolS *);
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#define tc_new_dot_label(sym) mips_add_dot_label (sym)
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extern void mips_add_dot_label (symbolS *);
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#define tc_frob_file_before_adjust() mips_frob_file_before_adjust ()
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extern void mips_frob_file_before_adjust (void);
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#define tc_frob_file_before_fix() mips_frob_file ()
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extern void mips_frob_file (void);
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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#define tc_frob_file_after_relocs mips_frob_file_after_relocs
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extern void mips_frob_file_after_relocs (void);
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#endif
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#define tc_fix_adjustable(fixp) mips_fix_adjustable (fixp)
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extern int mips_fix_adjustable (struct fix *);
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* Global syms must not be resolved, to support ELF shared libraries. */
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#define EXTERN_FORCE_RELOC \
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(OUTPUT_FLAVOR == bfd_target_elf_flavour)
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#define TC_FORCE_RELOCATION(FIX) mips_force_relocation (FIX)
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extern int mips_force_relocation (struct fix *);
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
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(! SEG_NORMAL (SEG) || mips_force_relocation (FIX))
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#define TC_FORCE_RELOCATION_ABS(FIX) mips_force_relocation_abs (FIX)
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extern bfd_boolean mips_force_relocation_abs (struct fix *);
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/* Register mask variables. These are set by the MIPS assembly code
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and used by ECOFF and possibly other object file formats. */
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extern unsigned long mips_gprmask;
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extern unsigned long mips_cprmask[4];
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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#define elf_tc_final_processing mips_elf_final_processing
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extern void mips_elf_final_processing (void);
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#endif
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extern void md_mips_end (void);
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#define md_end() md_mips_end()
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extern void mips_pop_insert (void);
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#define md_pop_insert() mips_pop_insert()
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extern void mips_emit_delays (void);
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#define md_flush_pending_output mips_emit_delays
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extern void mips_enable_auto_align (void);
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#define md_elf_section_change_hook() mips_enable_auto_align()
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#ifdef TE_IRIX
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enum dwarf2_format;
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extern enum dwarf2_format mips_dwarf2_format (asection *);
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# define DWARF2_FORMAT(SEC) mips_dwarf2_format (SEC)
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#else
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/* Use GAS' defaults. */
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#endif
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extern int mips_dwarf2_addr_size (void);
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#define DWARF2_ADDR_SIZE(bfd) mips_dwarf2_addr_size ()
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#define DWARF2_FDE_RELOC_SIZE (compact_eh ? 4 : mips_dwarf2_addr_size ())
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#define DWARF2_FDE_RELOC_ENCODING(enc) \
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(enc | (compact_eh ? DW_EH_PE_pcrel : 0))
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#define TARGET_USE_CFIPOP 1
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#define tc_cfi_frame_initial_instructions mips_cfi_frame_initial_instructions
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extern void mips_cfi_frame_initial_instructions (void);
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#define tc_regname_to_dw2regnum tc_mips_regname_to_dw2regnum
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extern int tc_mips_regname_to_dw2regnum (char *regname);
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#define DWARF2_DEFAULT_RETURN_COLUMN 31
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#define DWARF2_CIE_DATA_ALIGNMENT (-4)
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#if defined(OBJ_ELF)
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#define tc_cfi_reloc_for_encoding mips_cfi_reloc_for_encoding
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extern bfd_reloc_code_real_type mips_cfi_reloc_for_encoding (int encoding);
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#define tc_compact_eh_opcode_stop 0x5c
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#define tc_compact_eh_opcode_pad 0x5f
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#endif
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#define DIFF_EXPR_OK
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/* We define DIFF_EXPR_OK because of R_MIPS_PC32, but we have no
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64-bit form for n64 CFIs. */
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#define CFI_DIFF_EXPR_OK 0
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#define CONVERT_SYMBOLIC_ATTRIBUTE(name) mips_convert_symbolic_attribute (name)
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extern int mips_convert_symbolic_attribute (const char *);
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#endif /* TC_MIPS */
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