974 lines
26 KiB
C
974 lines
26 KiB
C
/* Target-dependent code for Renesas M32R, for GDB.
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Copyright (C) 1996-2013 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include "value.h"
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#include "inferior.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "osabi.h"
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#include "language.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "trad-frame.h"
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#include "dis-asm.h"
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#include "gdb_assert.h"
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#include "m32r-tdep.h"
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/* Local functions */
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extern void _initialize_m32r_tdep (void);
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static CORE_ADDR
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m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
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{
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/* Align to the size of an instruction (so that they can safely be
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pushed onto the stack. */
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return sp & ~3;
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}
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/* Breakpoints
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The little endian mode of M32R is unique. In most of architectures,
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two 16-bit instructions, A and B, are placed as the following:
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Big endian:
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A0 A1 B0 B1
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Little endian:
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A1 A0 B1 B0
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In M32R, they are placed like this:
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Big endian:
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A0 A1 B0 B1
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Little endian:
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B1 B0 A1 A0
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This is because M32R always fetches instructions in 32-bit.
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The following functions take care of this behavior. */
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static int
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m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
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struct bp_target_info *bp_tgt)
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{
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CORE_ADDR addr = bp_tgt->placed_address;
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int val;
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gdb_byte buf[4];
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gdb_byte contents_cache[4];
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gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */
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/* Save the memory contents. */
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val = target_read_memory (addr & 0xfffffffc, contents_cache, 4);
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if (val != 0)
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return val; /* return error */
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memcpy (bp_tgt->shadow_contents, contents_cache, 4);
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bp_tgt->placed_size = bp_tgt->shadow_len = 4;
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/* Determine appropriate breakpoint contents and size for this address. */
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if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
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{
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if ((addr & 3) == 0)
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{
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buf[0] = bp_entry[0];
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buf[1] = bp_entry[1];
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buf[2] = contents_cache[2] & 0x7f;
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buf[3] = contents_cache[3];
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}
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else
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{
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buf[0] = contents_cache[0];
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buf[1] = contents_cache[1];
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buf[2] = bp_entry[0];
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buf[3] = bp_entry[1];
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}
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}
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else /* little-endian */
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{
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if ((addr & 3) == 0)
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{
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buf[0] = contents_cache[0];
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buf[1] = contents_cache[1] & 0x7f;
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buf[2] = bp_entry[1];
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buf[3] = bp_entry[0];
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}
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else
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{
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buf[0] = bp_entry[1];
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buf[1] = bp_entry[0];
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buf[2] = contents_cache[2];
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buf[3] = contents_cache[3];
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}
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}
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/* Write the breakpoint. */
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val = target_write_memory (addr & 0xfffffffc, buf, 4);
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return val;
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}
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static int
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m32r_memory_remove_breakpoint (struct gdbarch *gdbarch,
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struct bp_target_info *bp_tgt)
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{
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CORE_ADDR addr = bp_tgt->placed_address;
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int val;
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gdb_byte buf[4];
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gdb_byte *contents_cache = bp_tgt->shadow_contents;
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buf[0] = contents_cache[0];
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buf[1] = contents_cache[1];
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buf[2] = contents_cache[2];
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buf[3] = contents_cache[3];
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/* Remove parallel bit. */
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if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
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{
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if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
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buf[2] &= 0x7f;
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}
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else /* little-endian */
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{
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if ((buf[3] & 0x80) == 0 && (buf[1] & 0x80) != 0)
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buf[1] &= 0x7f;
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}
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/* Write contents. */
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val = target_write_raw_memory (addr & 0xfffffffc, buf, 4);
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return val;
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}
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static const gdb_byte *
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m32r_breakpoint_from_pc (struct gdbarch *gdbarch,
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CORE_ADDR *pcptr, int *lenptr)
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{
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static gdb_byte be_bp_entry[] = {
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0x10, 0xf1, 0x70, 0x00
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}; /* dpt -> nop */
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static gdb_byte le_bp_entry[] = {
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0x00, 0x70, 0xf1, 0x10
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}; /* dpt -> nop */
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gdb_byte *bp;
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/* Determine appropriate breakpoint. */
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if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
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{
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if ((*pcptr & 3) == 0)
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{
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bp = be_bp_entry;
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*lenptr = 4;
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}
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else
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{
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bp = be_bp_entry;
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*lenptr = 2;
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}
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}
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else
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{
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if ((*pcptr & 3) == 0)
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{
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bp = le_bp_entry;
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*lenptr = 4;
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}
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else
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{
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bp = le_bp_entry + 2;
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*lenptr = 2;
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}
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}
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return bp;
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}
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char *m32r_register_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
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"psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
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"evb"
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};
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static const char *
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m32r_register_name (struct gdbarch *gdbarch, int reg_nr)
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{
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= M32R_NUM_REGS)
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return NULL;
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return m32r_register_names[reg_nr];
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}
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/* Return the GDB type object for the "standard" data type
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of data in register N. */
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static struct type *
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m32r_register_type (struct gdbarch *gdbarch, int reg_nr)
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{
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if (reg_nr == M32R_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM)
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return builtin_type (gdbarch)->builtin_data_ptr;
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else
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return builtin_type (gdbarch)->builtin_int32;
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}
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format.
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Things always get returned in RET1_REGNUM, RET2_REGNUM. */
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static void
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m32r_store_return_value (struct type *type, struct regcache *regcache,
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const void *valbuf)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR regval;
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int len = TYPE_LENGTH (type);
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regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
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regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
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if (len > 4)
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{
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regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4,
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len - 4, byte_order);
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regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
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}
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}
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/* This is required by skip_prologue. The results of decoding a prologue
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should be cached because this thrashing is getting nuts. */
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static int
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decode_prologue (struct gdbarch *gdbarch,
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CORE_ADDR start_pc, CORE_ADDR scan_limit,
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CORE_ADDR *pl_endptr, unsigned long *framelength)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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unsigned long framesize;
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int insn;
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int op1;
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CORE_ADDR after_prologue = 0;
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CORE_ADDR after_push = 0;
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CORE_ADDR after_stack_adjust = 0;
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CORE_ADDR current_pc;
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LONGEST return_value;
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framesize = 0;
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after_prologue = 0;
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for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
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{
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/* Check if current pc's location is readable. */
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if (!safe_read_memory_integer (current_pc, 2, byte_order, &return_value))
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return -1;
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insn = read_memory_unsigned_integer (current_pc, 2, byte_order);
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if (insn == 0x0000)
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break;
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/* If this is a 32 bit instruction, we dont want to examine its
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immediate data as though it were an instruction. */
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if (current_pc & 0x02)
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{
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/* Decode this instruction further. */
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insn &= 0x7fff;
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}
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else
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{
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if (insn & 0x8000)
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{
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if (current_pc == scan_limit)
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scan_limit += 2; /* extend the search */
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current_pc += 2; /* skip the immediate data */
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/* Check if current pc's location is readable. */
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if (!safe_read_memory_integer (current_pc, 2, byte_order,
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&return_value))
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return -1;
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if (insn == 0x8faf) /* add3 sp, sp, xxxx */
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/* add 16 bit sign-extended offset */
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{
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framesize +=
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-((short) read_memory_unsigned_integer (current_pc,
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2, byte_order));
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}
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else
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{
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if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
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&& safe_read_memory_integer (current_pc + 2,
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2, byte_order,
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&return_value)
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&& read_memory_unsigned_integer (current_pc + 2,
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2, byte_order)
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== 0x0f24)
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{
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/* Subtract 24 bit sign-extended negative-offset. */
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insn = read_memory_unsigned_integer (current_pc - 2,
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4, byte_order);
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if (insn & 0x00800000) /* sign extend */
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insn |= 0xff000000; /* negative */
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else
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insn &= 0x00ffffff; /* positive */
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framesize += insn;
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}
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}
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after_push = current_pc + 2;
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continue;
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}
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}
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op1 = insn & 0xf000; /* Isolate just the first nibble. */
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if ((insn & 0xf0ff) == 0x207f)
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{ /* st reg, @-sp */
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int regno;
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framesize += 4;
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regno = ((insn >> 8) & 0xf);
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after_prologue = 0;
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continue;
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}
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if ((insn >> 8) == 0x4f) /* addi sp, xx */
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/* Add 8 bit sign-extended offset. */
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{
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int stack_adjust = (signed char) (insn & 0xff);
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/* there are probably two of these stack adjustments:
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1) A negative one in the prologue, and
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2) A positive one in the epilogue.
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We are only interested in the first one. */
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if (stack_adjust < 0)
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{
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framesize -= stack_adjust;
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after_prologue = 0;
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/* A frameless function may have no "mv fp, sp".
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In that case, this is the end of the prologue. */
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after_stack_adjust = current_pc + 2;
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}
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continue;
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}
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if (insn == 0x1d8f)
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{ /* mv fp, sp */
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after_prologue = current_pc + 2;
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break; /* end of stack adjustments */
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}
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/* Nop looks like a branch, continue explicitly. */
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if (insn == 0x7000)
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{
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after_prologue = current_pc + 2;
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continue; /* nop occurs between pushes. */
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}
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/* End of prolog if any of these are trap instructions. */
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if ((insn & 0xfff0) == 0x10f0)
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{
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after_prologue = current_pc;
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break;
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}
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/* End of prolog if any of these are branch instructions. */
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if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000))
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{
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after_prologue = current_pc;
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continue;
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}
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/* Some of the branch instructions are mixed with other types. */
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if (op1 == 0x1000)
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{
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int subop = insn & 0x0ff0;
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if ((subop == 0x0ec0) || (subop == 0x0fc0))
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{
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after_prologue = current_pc;
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continue; /* jmp , jl */
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}
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}
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}
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if (framelength)
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*framelength = framesize;
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if (current_pc >= scan_limit)
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{
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if (pl_endptr)
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{
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if (after_stack_adjust != 0)
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/* We did not find a "mv fp,sp", but we DID find
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a stack_adjust. Is it safe to use that as the
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end of the prologue? I just don't know. */
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{
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*pl_endptr = after_stack_adjust;
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}
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else if (after_push != 0)
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/* We did not find a "mv fp,sp", but we DID find
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a push. Is it safe to use that as the
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end of the prologue? I just don't know. */
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{
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*pl_endptr = after_push;
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}
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else
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/* We reached the end of the loop without finding the end
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of the prologue. No way to win -- we should report
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failure. The way we do that is to return the original
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start_pc. GDB will set a breakpoint at the start of
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the function (etc.) */
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*pl_endptr = start_pc;
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}
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return 0;
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}
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if (after_prologue == 0)
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after_prologue = current_pc;
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if (pl_endptr)
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*pl_endptr = after_prologue;
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return 0;
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} /* decode_prologue */
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/* Function: skip_prologue
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Find end of function prologue. */
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#define DEFAULT_SEARCH_LIMIT 128
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static CORE_ADDR
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m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR func_addr, func_end;
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struct symtab_and_line sal;
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LONGEST return_value;
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/* See what the symbol table says. */
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if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
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{
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sal = find_pc_line (func_addr, 0);
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if (sal.line != 0 && sal.end <= func_end)
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{
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func_end = sal.end;
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}
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else
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/* Either there's no line info, or the line after the prologue is after
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the end of the function. In this case, there probably isn't a
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prologue. */
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{
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func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
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}
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}
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else
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func_end = pc + DEFAULT_SEARCH_LIMIT;
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/* If pc's location is not readable, just quit. */
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if (!safe_read_memory_integer (pc, 4, byte_order, &return_value))
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return pc;
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/* Find the end of prologue. */
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if (decode_prologue (gdbarch, pc, func_end, &sal.end, NULL) < 0)
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return pc;
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return sal.end;
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}
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struct m32r_unwind_cache
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{
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/* The previous frame's inner most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR prev_sp;
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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int size;
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/* How far the SP and r13 (FP) have been offset from the start of
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the stack frame (as defined by the previous frame's stack
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pointer). */
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LONGEST sp_offset;
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LONGEST r13_offset;
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int uses_frame;
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/* Table indicating the location of each and every register. */
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struct trad_frame_saved_reg *saved_regs;
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};
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/* Put here the code to store, into fi->saved_regs, the addresses of
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the saved registers of frame described by FRAME_INFO. This
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includes special registers such as pc and fp saved in special ways
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in the stack frame. sp is even more special: the address we return
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for it IS the sp for the next frame. */
|
|
|
|
static struct m32r_unwind_cache *
|
|
m32r_frame_unwind_cache (struct frame_info *this_frame,
|
|
void **this_prologue_cache)
|
|
{
|
|
CORE_ADDR pc, scan_limit;
|
|
ULONGEST prev_sp;
|
|
ULONGEST this_base;
|
|
unsigned long op;
|
|
int i;
|
|
struct m32r_unwind_cache *info;
|
|
|
|
|
|
if ((*this_prologue_cache))
|
|
return (*this_prologue_cache);
|
|
|
|
info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
|
|
(*this_prologue_cache) = info;
|
|
info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
|
|
|
|
info->size = 0;
|
|
info->sp_offset = 0;
|
|
info->uses_frame = 0;
|
|
|
|
scan_limit = get_frame_pc (this_frame);
|
|
for (pc = get_frame_func (this_frame);
|
|
pc > 0 && pc < scan_limit; pc += 2)
|
|
{
|
|
if ((pc & 2) == 0)
|
|
{
|
|
op = get_frame_memory_unsigned (this_frame, pc, 4);
|
|
if ((op & 0x80000000) == 0x80000000)
|
|
{
|
|
/* 32-bit instruction */
|
|
if ((op & 0xffff0000) == 0x8faf0000)
|
|
{
|
|
/* add3 sp,sp,xxxx */
|
|
short n = op & 0xffff;
|
|
info->sp_offset += n;
|
|
}
|
|
else if (((op >> 8) == 0xe4)
|
|
&& get_frame_memory_unsigned (this_frame, pc + 2,
|
|
2) == 0x0f24)
|
|
{
|
|
/* ld24 r4, xxxxxx; sub sp, r4 */
|
|
unsigned long n = op & 0xffffff;
|
|
info->sp_offset += n;
|
|
pc += 2; /* skip sub instruction */
|
|
}
|
|
|
|
if (pc == scan_limit)
|
|
scan_limit += 2; /* extend the search */
|
|
pc += 2; /* skip the immediate data */
|
|
continue;
|
|
}
|
|
}
|
|
|
|
/* 16-bit instructions */
|
|
op = get_frame_memory_unsigned (this_frame, pc, 2) & 0x7fff;
|
|
if ((op & 0xf0ff) == 0x207f)
|
|
{
|
|
/* st rn, @-sp */
|
|
int regno = ((op >> 8) & 0xf);
|
|
info->sp_offset -= 4;
|
|
info->saved_regs[regno].addr = info->sp_offset;
|
|
}
|
|
else if ((op & 0xff00) == 0x4f00)
|
|
{
|
|
/* addi sp, xx */
|
|
int n = (signed char) (op & 0xff);
|
|
info->sp_offset += n;
|
|
}
|
|
else if (op == 0x1d8f)
|
|
{
|
|
/* mv fp, sp */
|
|
info->uses_frame = 1;
|
|
info->r13_offset = info->sp_offset;
|
|
break; /* end of stack adjustments */
|
|
}
|
|
else if ((op & 0xfff0) == 0x10f0)
|
|
{
|
|
/* End of prologue if this is a trap instruction. */
|
|
break; /* End of stack adjustments. */
|
|
}
|
|
}
|
|
|
|
info->size = -info->sp_offset;
|
|
|
|
/* Compute the previous frame's stack pointer (which is also the
|
|
frame's ID's stack address), and this frame's base pointer. */
|
|
if (info->uses_frame)
|
|
{
|
|
/* The SP was moved to the FP. This indicates that a new frame
|
|
was created. Get THIS frame's FP value by unwinding it from
|
|
the next frame. */
|
|
this_base = get_frame_register_unsigned (this_frame, M32R_FP_REGNUM);
|
|
/* The FP points at the last saved register. Adjust the FP back
|
|
to before the first saved register giving the SP. */
|
|
prev_sp = this_base + info->size;
|
|
}
|
|
else
|
|
{
|
|
/* Assume that the FP is this frame's SP but with that pushed
|
|
stack space added back. */
|
|
this_base = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM);
|
|
prev_sp = this_base + info->size;
|
|
}
|
|
|
|
/* Convert that SP/BASE into real addresses. */
|
|
info->prev_sp = prev_sp;
|
|
info->base = this_base;
|
|
|
|
/* Adjust all the saved registers so that they contain addresses and
|
|
not offsets. */
|
|
for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
|
|
if (trad_frame_addr_p (info->saved_regs, i))
|
|
info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
|
|
|
|
/* The call instruction moves the caller's PC in the callee's LR.
|
|
Since this is an unwind, do the reverse. Copy the location of LR
|
|
into PC (the address / regnum) so that a request for PC will be
|
|
converted into a request for the LR. */
|
|
info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM];
|
|
|
|
/* The previous frame's SP needed to be computed. Save the computed
|
|
value. */
|
|
trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp);
|
|
|
|
return info;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
m32r_read_pc (struct regcache *regcache)
|
|
{
|
|
ULONGEST pc;
|
|
regcache_cooked_read_unsigned (regcache, M32R_PC_REGNUM, &pc);
|
|
return pc;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM);
|
|
}
|
|
|
|
|
|
static CORE_ADDR
|
|
m32r_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
|
|
struct value **args, CORE_ADDR sp, int struct_return,
|
|
CORE_ADDR struct_addr)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
int stack_offset, stack_alloc;
|
|
int argreg = ARG1_REGNUM;
|
|
int argnum;
|
|
struct type *type;
|
|
enum type_code typecode;
|
|
CORE_ADDR regval;
|
|
gdb_byte *val;
|
|
gdb_byte valbuf[MAX_REGISTER_SIZE];
|
|
int len;
|
|
|
|
/* First force sp to a 4-byte alignment. */
|
|
sp = sp & ~3;
|
|
|
|
/* Set the return address. For the m32r, the return breakpoint is
|
|
always at BP_ADDR. */
|
|
regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr);
|
|
|
|
/* If STRUCT_RETURN is true, then the struct return address (in
|
|
STRUCT_ADDR) will consume the first argument-passing register.
|
|
Both adjust the register count and store that value. */
|
|
if (struct_return)
|
|
{
|
|
regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
|
|
argreg++;
|
|
}
|
|
|
|
/* Now make sure there's space on the stack. */
|
|
for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
|
|
stack_alloc += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
|
|
sp -= stack_alloc; /* Make room on stack for args. */
|
|
|
|
for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
|
|
{
|
|
type = value_type (args[argnum]);
|
|
typecode = TYPE_CODE (type);
|
|
len = TYPE_LENGTH (type);
|
|
|
|
memset (valbuf, 0, sizeof (valbuf));
|
|
|
|
/* Passes structures that do not fit in 2 registers by reference. */
|
|
if (len > 8
|
|
&& (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
|
|
{
|
|
store_unsigned_integer (valbuf, 4, byte_order,
|
|
value_address (args[argnum]));
|
|
typecode = TYPE_CODE_PTR;
|
|
len = 4;
|
|
val = valbuf;
|
|
}
|
|
else if (len < 4)
|
|
{
|
|
/* Value gets right-justified in the register or stack word. */
|
|
memcpy (valbuf + (register_size (gdbarch, argreg) - len),
|
|
(gdb_byte *) value_contents (args[argnum]), len);
|
|
val = valbuf;
|
|
}
|
|
else
|
|
val = (gdb_byte *) value_contents (args[argnum]);
|
|
|
|
while (len > 0)
|
|
{
|
|
if (argreg > ARGN_REGNUM)
|
|
{
|
|
/* Must go on the stack. */
|
|
write_memory (sp + stack_offset, val, 4);
|
|
stack_offset += 4;
|
|
}
|
|
else if (argreg <= ARGN_REGNUM)
|
|
{
|
|
/* There's room in a register. */
|
|
regval =
|
|
extract_unsigned_integer (val,
|
|
register_size (gdbarch, argreg),
|
|
byte_order);
|
|
regcache_cooked_write_unsigned (regcache, argreg++, regval);
|
|
}
|
|
|
|
/* Store the value 4 bytes at a time. This means that things
|
|
larger than 4 bytes may go partly in registers and partly
|
|
on the stack. */
|
|
len -= register_size (gdbarch, argreg);
|
|
val += register_size (gdbarch, argreg);
|
|
}
|
|
}
|
|
|
|
/* Finally, update the SP register. */
|
|
regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp);
|
|
|
|
return sp;
|
|
}
|
|
|
|
|
|
/* Given a return value in `regbuf' with a type `valtype',
|
|
extract and copy its value into `valbuf'. */
|
|
|
|
static void
|
|
m32r_extract_return_value (struct type *type, struct regcache *regcache,
|
|
void *dst)
|
|
{
|
|
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
bfd_byte *valbuf = dst;
|
|
int len = TYPE_LENGTH (type);
|
|
ULONGEST tmp;
|
|
|
|
/* By using store_unsigned_integer we avoid having to do
|
|
anything special for small big-endian values. */
|
|
regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
|
|
store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp);
|
|
|
|
/* Ignore return values more than 8 bytes in size because the m32r
|
|
returns anything more than 8 bytes in the stack. */
|
|
if (len > 4)
|
|
{
|
|
regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
|
|
store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
|
|
}
|
|
}
|
|
|
|
static enum return_value_convention
|
|
m32r_return_value (struct gdbarch *gdbarch, struct value *function,
|
|
struct type *valtype, struct regcache *regcache,
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
{
|
|
if (TYPE_LENGTH (valtype) > 8)
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
else
|
|
{
|
|
if (readbuf != NULL)
|
|
m32r_extract_return_value (valtype, regcache, readbuf);
|
|
if (writebuf != NULL)
|
|
m32r_store_return_value (valtype, regcache, writebuf);
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM);
|
|
}
|
|
|
|
/* Given a GDB frame, determine the address of the calling function's
|
|
frame. This will be used to create a new GDB frame struct. */
|
|
|
|
static void
|
|
m32r_frame_this_id (struct frame_info *this_frame,
|
|
void **this_prologue_cache, struct frame_id *this_id)
|
|
{
|
|
struct m32r_unwind_cache *info
|
|
= m32r_frame_unwind_cache (this_frame, this_prologue_cache);
|
|
CORE_ADDR base;
|
|
CORE_ADDR func;
|
|
struct minimal_symbol *msym_stack;
|
|
struct frame_id id;
|
|
|
|
/* The FUNC is easy. */
|
|
func = get_frame_func (this_frame);
|
|
|
|
/* Check if the stack is empty. */
|
|
msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
|
|
if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
|
|
return;
|
|
|
|
/* Hopefully the prologue analysis either correctly determined the
|
|
frame's base (which is the SP from the previous frame), or set
|
|
that base to "NULL". */
|
|
base = info->prev_sp;
|
|
if (base == 0)
|
|
return;
|
|
|
|
id = frame_id_build (base, func);
|
|
(*this_id) = id;
|
|
}
|
|
|
|
static struct value *
|
|
m32r_frame_prev_register (struct frame_info *this_frame,
|
|
void **this_prologue_cache, int regnum)
|
|
{
|
|
struct m32r_unwind_cache *info
|
|
= m32r_frame_unwind_cache (this_frame, this_prologue_cache);
|
|
return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
|
|
}
|
|
|
|
static const struct frame_unwind m32r_frame_unwind = {
|
|
NORMAL_FRAME,
|
|
default_frame_unwind_stop_reason,
|
|
m32r_frame_this_id,
|
|
m32r_frame_prev_register,
|
|
NULL,
|
|
default_frame_sniffer
|
|
};
|
|
|
|
static CORE_ADDR
|
|
m32r_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct m32r_unwind_cache *info
|
|
= m32r_frame_unwind_cache (this_frame, this_cache);
|
|
return info->base;
|
|
}
|
|
|
|
static const struct frame_base m32r_frame_base = {
|
|
&m32r_frame_unwind,
|
|
m32r_frame_base_address,
|
|
m32r_frame_base_address,
|
|
m32r_frame_base_address
|
|
};
|
|
|
|
/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
|
|
frame. The frame ID's base needs to match the TOS value saved by
|
|
save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
|
|
|
|
static struct frame_id
|
|
m32r_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
CORE_ADDR sp = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM);
|
|
return frame_id_build (sp, get_frame_pc (this_frame));
|
|
}
|
|
|
|
|
|
static gdbarch_init_ftype m32r_gdbarch_init;
|
|
|
|
static struct gdbarch *
|
|
m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct gdbarch_tdep *tdep;
|
|
|
|
/* If there is already a candidate, use it. */
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
if (arches != NULL)
|
|
return arches->gdbarch;
|
|
|
|
/* Allocate space for the new architecture. */
|
|
tdep = XMALLOC (struct gdbarch_tdep);
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
set_gdbarch_read_pc (gdbarch, m32r_read_pc);
|
|
set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp);
|
|
|
|
set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS);
|
|
set_gdbarch_pc_regnum (gdbarch, M32R_PC_REGNUM);
|
|
set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM);
|
|
set_gdbarch_register_name (gdbarch, m32r_register_name);
|
|
set_gdbarch_register_type (gdbarch, m32r_register_type);
|
|
|
|
set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call);
|
|
set_gdbarch_return_value (gdbarch, m32r_return_value);
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue);
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, m32r_breakpoint_from_pc);
|
|
set_gdbarch_memory_insert_breakpoint (gdbarch,
|
|
m32r_memory_insert_breakpoint);
|
|
set_gdbarch_memory_remove_breakpoint (gdbarch,
|
|
m32r_memory_remove_breakpoint);
|
|
|
|
set_gdbarch_frame_align (gdbarch, m32r_frame_align);
|
|
|
|
frame_base_set_default (gdbarch, &m32r_frame_base);
|
|
|
|
/* Methods for saving / extracting a dummy frame's ID. The ID's
|
|
stack address must match the SP value returned by
|
|
PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
|
|
set_gdbarch_dummy_id (gdbarch, m32r_dummy_id);
|
|
|
|
/* Return the unwound PC value. */
|
|
set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc);
|
|
|
|
set_gdbarch_print_insn (gdbarch, print_insn_m32r);
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
/* Hook in the default unwinders. */
|
|
frame_unwind_append_unwinder (gdbarch, &m32r_frame_unwind);
|
|
|
|
/* Support simple overlay manager. */
|
|
set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
void
|
|
_initialize_m32r_tdep (void)
|
|
{
|
|
register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);
|
|
}
|