8acc9f485b
Two modifications:
1. The addition of 2013 to the copyright year range for every file;
2. The use of a single year range, instead of potentially multiple
year ranges, as approved by the FSF.
118 lines
3.6 KiB
C
118 lines
3.6 KiB
C
/* Simulator for Analog Devices Blackfin processors.
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Copyright (C) 2005-2013 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef _BFIN_MAIN_SIM_H_
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#define _BFIN_MAIN_SIM_H_
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#include "sim-basics.h"
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#include "sim-signal.h"
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typedef unsigned32 sim_cia;
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#define CIA_GET(cpu) CPU_PC_GET (cpu)
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#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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typedef struct _sim_cpu SIM_CPU;
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#include "bfin-sim.h"
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#include "machs.h"
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#include "sim-base.h"
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struct _sim_cpu {
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/* ... simulator specific members ... */
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struct bfin_cpu_state state;
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sim_cpu_base base;
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};
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#define BFIN_CPU_STATE ((cpu)->state)
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struct sim_state {
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sim_cpu *cpu[MAX_NR_PROCESSORS];
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#if (WITH_SMP)
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#define STATE_CPU(sd,n) ((sd)->cpu[n])
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#else
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#define STATE_CPU(sd,n) ((sd)->cpu[0])
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#endif
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/* ... simulator specific members ... */
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struct bfin_board_data board;
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#define STATE_BOARD_DATA(sd) (&(sd)->board)
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sim_state_base base;
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};
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#include "sim-config.h"
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#include "sim-types.h"
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#include "sim-engine.h"
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#include "sim-options.h"
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#include "run-sim.h"
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#include "dv-bfin_trace.h"
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#undef MAX
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#undef MIN
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#undef CLAMP
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#undef ALIGN
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define CLAMP(a, b, c) MIN (MAX (a, b), c)
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#define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
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#define MAYBE_TRACE(type, cpu, fmt, ...) \
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do { \
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if (TRACE_##type##_P (cpu)) \
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trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
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fmt, ## __VA_ARGS__); \
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} while (0)
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#define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
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#define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
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#define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
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#define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
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#define TRACE_CORE(cpu, addr, size, map, val) \
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do { \
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MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
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map == exec_map ? 'I' : 'D', \
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map == write_map ? "STORE" : "FETCH", \
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size, addr, size * 2, val); \
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PROFILE_COUNT_CORE (cpu, addr, size, map); \
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} while (0)
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#define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
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#define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
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do { \
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MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
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if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
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bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
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} while (0)
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extern void trace_register PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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const char *fmt,
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...))
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__attribute__((format (printf, 3, 4)));
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#define TRACE_REGISTER(cpu, fmt, ...) \
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do { \
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if (TRACE_CORE_P (cpu)) \
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trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
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} while (0)
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#define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)
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/* Default memory size. */
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#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
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#endif
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