358 lines
8.9 KiB
Plaintext
358 lines
8.9 KiB
Plaintext
@c Copyright (C) 2001-2018 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node PDP-11-Dependent
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@chapter PDP-11 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter PDP-11 Dependent Features
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@end ifclear
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@cindex PDP-11 support
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@menu
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* PDP-11-Options:: Options
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* PDP-11-Pseudos:: Assembler Directives
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* PDP-11-Syntax:: DEC Syntax versus BSD Syntax
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* PDP-11-Mnemonics:: Instruction Naming
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* PDP-11-Synthetic:: Synthetic Instructions
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@end menu
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@node PDP-11-Options
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@section Options
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@cindex options for PDP-11
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The PDP-11 version of @code{@value{AS}} has a rich set of machine
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dependent options.
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@subsection Code Generation Options
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@table @code
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@cindex -mpic
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@cindex -mno-pic
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@item -mpic | -mno-pic
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Generate position-independent (or position-dependent) code.
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The default is to generate position-independent code.
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@end table
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@subsection Instruction Set Extension Options
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These options enables or disables the use of extensions over the base
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line instruction set as introduced by the first PDP-11 CPU: the KA11.
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Most options come in two variants: a @code{-m}@var{extension} that
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enables @var{extension}, and a @code{-mno-}@var{extension} that disables
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@var{extension}.
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The default is to enable all extensions.
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@table @code
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@cindex -mall
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@cindex -mall-extensions
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@item -mall | -mall-extensions
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Enable all instruction set extensions.
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@cindex -mno-extensions
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@item -mno-extensions
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Disable all instruction set extensions.
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@cindex -mcis
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@cindex -mno-cis
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@item -mcis | -mno-cis
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Enable (or disable) the use of the commercial instruction set, which
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consists of these instructions: @code{ADDNI}, @code{ADDN}, @code{ADDPI},
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@code{ADDP}, @code{ASHNI}, @code{ASHN}, @code{ASHPI}, @code{ASHP},
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@code{CMPCI}, @code{CMPC}, @code{CMPNI}, @code{CMPN}, @code{CMPPI},
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@code{CMPP}, @code{CVTLNI}, @code{CVTLN}, @code{CVTLPI}, @code{CVTLP},
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@code{CVTNLI}, @code{CVTNL}, @code{CVTNPI}, @code{CVTNP}, @code{CVTPLI},
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@code{CVTPL}, @code{CVTPNI}, @code{CVTPN}, @code{DIVPI}, @code{DIVP},
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@code{L2DR}, @code{L3DR}, @code{LOCCI}, @code{LOCC}, @code{MATCI},
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@code{MATC}, @code{MOVCI}, @code{MOVC}, @code{MOVRCI}, @code{MOVRC},
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@code{MOVTCI}, @code{MOVTC}, @code{MULPI}, @code{MULP}, @code{SCANCI},
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@code{SCANC}, @code{SKPCI}, @code{SKPC}, @code{SPANCI}, @code{SPANC},
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@code{SUBNI}, @code{SUBN}, @code{SUBPI}, and @code{SUBP}.
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@cindex -mcsm
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@cindex -mno-csm
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@item -mcsm | -mno-csm
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Enable (or disable) the use of the @code{CSM} instruction.
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@cindex -meis
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@cindex -mno-eis
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@item -meis | -mno-eis
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Enable (or disable) the use of the extended instruction set, which
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consists of these instructions: @code{ASHC}, @code{ASH}, @code{DIV},
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@code{MARK}, @code{MUL}, @code{RTT}, @code{SOB} @code{SXT}, and
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@code{XOR}.
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@cindex -mfis
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@cindex -mno-fis
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@cindex -mkev11
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@cindex -mkev11
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@cindex -mno-kev11
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@item -mfis | -mkev11
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@itemx -mno-fis | -mno-kev11
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Enable (or disable) the use of the KEV11 floating-point instructions:
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@code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.
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@cindex -mfpp
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@cindex -mno-fpp
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@cindex -mfpu
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@cindex -mno-fpu
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@cindex -mfp-11
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@cindex -mno-fp-11
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@item -mfpp | -mfpu | -mfp-11
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@itemx -mno-fpp | -mno-fpu | -mno-fp-11
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Enable (or disable) the use of FP-11 floating-point instructions:
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@code{ABSF}, @code{ADDF}, @code{CFCC}, @code{CLRF}, @code{CMPF},
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@code{DIVF}, @code{LDCFF}, @code{LDCIF}, @code{LDEXP}, @code{LDF},
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@code{LDFPS}, @code{MODF}, @code{MULF}, @code{NEGF}, @code{SETD},
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@code{SETF}, @code{SETI}, @code{SETL}, @code{STCFF}, @code{STCFI},
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@code{STEXP}, @code{STF}, @code{STFPS}, @code{STST}, @code{SUBF}, and
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@code{TSTF}.
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@cindex -mlimited-eis
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@cindex -mno-limited-eis
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@item -mlimited-eis | -mno-limited-eis
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Enable (or disable) the use of the limited extended instruction set:
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@code{MARK}, @code{RTT}, @code{SOB}, @code{SXT}, and @code{XOR}.
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The -mno-limited-eis options also implies -mno-eis.
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@cindex -mmfpt
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@cindex -mno-mfpt
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@item -mmfpt | -mno-mfpt
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Enable (or disable) the use of the @code{MFPT} instruction.
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@cindex -mmutiproc
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@cindex -mno-mutiproc
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@item -mmultiproc | -mno-multiproc
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Enable (or disable) the use of multiprocessor instructions: @code{TSTSET} and
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@code{WRTLCK}.
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@cindex -mmxps
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@cindex -mno-mxps
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@item -mmxps | -mno-mxps
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Enable (or disable) the use of the @code{MFPS} and @code{MTPS} instructions.
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@cindex -mspl
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@cindex -mno-spl
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@item -mspl | -mno-spl
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Enable (or disable) the use of the @code{SPL} instruction.
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@cindex -mmicrocode
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@cindex -mno-microcode
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Enable (or disable) the use of the microcode instructions: @code{LDUB},
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@code{MED}, and @code{XFC}.
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@end table
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@subsection CPU Model Options
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These options enable the instruction set extensions supported by a
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particular CPU, and disables all other extensions.
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@table @code
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@cindex -mka11
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@item -mka11
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KA11 CPU. Base line instruction set only.
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@cindex -mkb11
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@item -mkb11
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KB11 CPU. Enable extended instruction set and @code{SPL}.
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@cindex -mkd11a
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@item -mkd11a
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KD11-A CPU. Enable limited extended instruction set.
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@cindex -mkd11b
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@item -mkd11b
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KD11-B CPU. Base line instruction set only.
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@cindex -mkd11d
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@item -mkd11d
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KD11-D CPU. Base line instruction set only.
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@cindex -mkd11e
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@item -mkd11e
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KD11-E CPU. Enable extended instruction set, @code{MFPS}, and @code{MTPS}.
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@cindex -mkd11f
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@cindex -mkd11h
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@cindex -mkd11q
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@item -mkd11f | -mkd11h | -mkd11q
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KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended instruction set,
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@code{MFPS}, and @code{MTPS}.
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@cindex -mkd11k
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@item -mkd11k
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KD11-K CPU. Enable extended instruction set, @code{LDUB}, @code{MED},
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@code{MFPS}, @code{MFPT}, @code{MTPS}, and @code{XFC}.
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@cindex -mkd11z
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@item -mkd11z
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KD11-Z CPU. Enable extended instruction set, @code{CSM}, @code{MFPS},
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@code{MFPT}, @code{MTPS}, and @code{SPL}.
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@cindex -mf11
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@item -mf11
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F11 CPU. Enable extended instruction set, @code{MFPS}, @code{MFPT}, and
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@code{MTPS}.
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@cindex -mj11
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@item -mj11
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J11 CPU. Enable extended instruction set, @code{CSM}, @code{MFPS},
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@code{MFPT}, @code{MTPS}, @code{SPL}, @code{TSTSET}, and @code{WRTLCK}.
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@cindex -mt11
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@item -mt11
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T11 CPU. Enable limited extended instruction set, @code{MFPS}, and
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@code{MTPS}.
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@end table
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@subsection Machine Model Options
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These options enable the instruction set extensions supported by a
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particular machine model, and disables all other extensions.
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@table @code
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@cindex -m11/03
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@item -m11/03
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Same as @code{-mkd11f}.
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@cindex -m11/04
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@item -m11/04
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Same as @code{-mkd11d}.
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@cindex -m11/05
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@cindex -m11/10
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@item -m11/05 | -m11/10
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Same as @code{-mkd11b}.
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@cindex -m11/15
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@cindex -m11/20
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@item -m11/15 | -m11/20
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Same as @code{-mka11}.
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@cindex -m11/21
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@item -m11/21
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Same as @code{-mt11}.
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@cindex -m11/23
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@cindex -m11/24
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@item -m11/23 | -m11/24
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Same as @code{-mf11}.
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@cindex -m11/34
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@item -m11/34
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Same as @code{-mkd11e}.
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@cindex -m11/34a
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@item -m11/34a
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Ame as @code{-mkd11e} @code{-mfpp}.
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@cindex -m11/35
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@cindex -m11/40
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@item -m11/35 | -m11/40
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Same as @code{-mkd11a}.
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@cindex -m11/44
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@item -m11/44
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Same as @code{-mkd11z}.
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@cindex -m11/45
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@cindex -m11/50
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@cindex -m11/55
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@cindex -m11/70
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@item -m11/45 | -m11/50 | -m11/55 | -m11/70
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Same as @code{-mkb11}.
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@cindex -m11/53
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@cindex -m11/73
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@cindex -m11/83
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@cindex -m11/84
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@cindex -m11/93
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@cindex -m11/94
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@item -m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94
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Same as @code{-mj11}.
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@cindex -m11/60
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@item -m11/60
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Same as @code{-mkd11k}.
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@end table
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@node PDP-11-Pseudos
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@section Assembler Directives
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The PDP-11 version of @code{@value{AS}} has a few machine
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dependent assembler directives.
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@table @code
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@item .bss
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Switch to the @code{bss} section.
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@item .even
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Align the location counter to an even number.
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@end table
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@node PDP-11-Syntax
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@section PDP-11 Assembly Language Syntax
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@cindex PDP-11 syntax
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@cindex DEC syntax
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@cindex BSD syntax
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@code{@value{AS}} supports both DEC syntax and BSD syntax. The only
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difference is that in DEC syntax, a @code{#} character is used to denote
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an immediate constants, while in BSD syntax the character for this
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purpose is @code{$}.
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@cindex PDP-11 general-purpose register syntax
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general-purpose registers are named @code{r0} through @code{r7}.
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Mnemonic alternatives for @code{r6} and @code{r7} are @code{sp} and
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@code{pc}, respectively.
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@cindex PDP-11 floating-point register syntax
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Floating-point registers are named @code{ac0} through @code{ac3}, or
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alternatively @code{fr0} through @code{fr3}.
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@cindex PDP-11 comments
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Comments are started with a @code{#} or a @code{/} character, and extend
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to the end of the line. (FIXME: clash with immediates?)
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@cindex PDP-11 line separator
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Multiple statements on the same line can be separated by the @samp{;} character.
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@node PDP-11-Mnemonics
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@section Instruction Naming
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@cindex PDP-11 instruction naming
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Some instructions have alternative names.
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@table @code
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@item BCC
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@code{BHIS}
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@item BCS
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@code{BLO}
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@item L2DR
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@code{L2D}
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@item L3DR
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@code{L3D}
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@item SYS
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@code{TRAP}
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@end table
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@node PDP-11-Synthetic
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@section Synthetic Instructions
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The @code{JBR} and @code{J}@var{CC} synthetic instructions are not
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supported yet.
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