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MEMORY
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{
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rom (rx) : ORIGIN = 0x100, LENGTH = 0x100
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ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100
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}
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SECTIONS
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{
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.text : {*(.text .text.*)} >rom
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.data : {data_load = LOADADDR (.data);
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data_start = ADDR (.data);
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*(.data .data.*)} >ram AT>rom
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/DISCARD/ : { *(.*) }
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}
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