504 lines
14 KiB
C
504 lines
14 KiB
C
/* Memory ops header for CGEN-based simlators.
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This file is machine generated.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef CGEN_MEM_H
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#define CGEN_MEM_H
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#ifdef MEMOPS_DEFINE_INLINE
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#define MEMOPS_INLINE
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#else
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#define MEMOPS_INLINE extern inline
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#endif
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/* Only used in this file. */
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typedef unsigned char *ptr;
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE QI
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GETTQI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return p[0];
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else
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return p[0];
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}
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#else
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extern QI GETTQI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE HI
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GETTHI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return ((p[0] << 8) | p[1]);
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else
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return ((p[1] << 8) | p[0]);
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}
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#else
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extern HI GETTHI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE SI
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GETTSI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
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else
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return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
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}
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#else
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extern SI GETTSI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE DI
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GETTDI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]);
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else
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return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
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}
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#else
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extern DI GETTDI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UQI
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GETTUQI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return p[0];
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else
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return p[0];
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}
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#else
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extern UQI GETTUQI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UHI
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GETTUHI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return ((p[0] << 8) | p[1]);
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else
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return ((p[1] << 8) | p[0]);
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}
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#else
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extern UHI GETTUHI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE USI
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GETTUSI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
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else
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return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
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}
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#else
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extern USI GETTUSI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UDI
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GETTUDI (ptr p)
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{
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if (TARGET_BIG_ENDIAN)
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return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]);
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else
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return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
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}
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#else
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extern UDI GETTUDI (ptr);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTQI (ptr p, QI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val; } while (0);
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else
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do { p[0] = val; } while (0);
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}
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#else
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extern void SETTQI (ptr, QI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTHI (ptr p, HI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val >> 8; p[1] = val; } while (0);
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else
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do { p[1] = val >> 8; p[0] = val; } while (0);
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}
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#else
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extern void SETTHI (ptr, HI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTSI (ptr p, SI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0);
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else
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do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0);
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}
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#else
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extern void SETTSI (ptr, SI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTDI (ptr p, DI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0);
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else
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do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0);
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}
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#else
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extern void SETTDI (ptr, DI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTUQI (ptr p, UQI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val; } while (0);
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else
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do { p[0] = val; } while (0);
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}
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#else
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extern void SETTUQI (ptr, UQI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTUHI (ptr p, UHI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val >> 8; p[1] = val; } while (0);
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else
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do { p[1] = val >> 8; p[0] = val; } while (0);
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}
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#else
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extern void SETTUHI (ptr, UHI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTUSI (ptr p, USI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0);
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else
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do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0);
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}
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#else
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extern void SETTUSI (ptr, USI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETTUDI (ptr p, UDI val)
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{
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if (TARGET_BIG_ENDIAN)
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do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0);
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else
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do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0);
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}
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#else
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extern void SETTUDI (ptr, UDI);
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#endif
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/* FIXME: Need to merge with sim-core. */
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/* FIXME: Don't perform >= 4, text section checks if OEA. */
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#ifndef MEM_CHECK_READ
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#define MEM_CHECK_READ(addr, type) \
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((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/)
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#endif
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#ifndef MEM_CHECK_WRITE
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#define MEM_CHECK_WRITE(addr, type) \
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((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/ \
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&& ((addr) >= STATE_TEXT_END (current_state) \
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|| (addr) < STATE_TEXT_START (current_state)))
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#endif
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#ifndef MEM_CHECK_ALIGNMENT
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#define MEM_CHECK_ALIGNMENT(addr, type) \
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(((addr) & (sizeof (type) - 1)) == 0)
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE QI
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GETMEMQI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, QI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, QI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_QI);
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return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern QI GETMEMQI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE HI
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GETMEMHI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, HI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, HI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_HI);
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return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern HI GETMEMHI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE SI
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GETMEMSI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, SI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, SI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_SI);
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return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern SI GETMEMSI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE DI
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GETMEMDI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, DI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, DI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_DI);
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return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern DI GETMEMDI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UQI
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GETMEMUQI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, UQI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, UQI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_UQI);
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return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern UQI GETMEMUQI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UHI
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GETMEMUHI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, UHI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, UHI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_UHI);
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return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern UHI GETMEMUHI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE USI
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GETMEMUSI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, USI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, USI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_USI);
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return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern USI GETMEMUSI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE UDI
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GETMEMUDI (SIM_CPU *cpu, ADDR a)
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{
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if (! MEM_CHECK_READ (a, UDI))
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{ engine_signal (cpu, SIM_SIGACCESS); }
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if (! MEM_CHECK_ALIGNMENT (a, UDI))
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{ engine_signal (cpu, SIM_SIGALIGN); }
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PROFILE_COUNT_READ (cpu, a, MODE_UDI);
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return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a);
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}
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#else
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extern UDI GETMEMUDI (SIM_CPU *, ADDR);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMQI (SIM_CPU *cpu, ADDR a, QI val)
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{
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if (! MEM_CHECK_WRITE (a, QI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, QI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_QI);
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sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMQI (SIM_CPU *, ADDR, QI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMHI (SIM_CPU *cpu, ADDR a, HI val)
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{
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if (! MEM_CHECK_WRITE (a, HI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, HI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_HI);
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sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMHI (SIM_CPU *, ADDR, HI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMSI (SIM_CPU *cpu, ADDR a, SI val)
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{
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if (! MEM_CHECK_WRITE (a, SI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, SI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_SI);
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sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMSI (SIM_CPU *, ADDR, SI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMDI (SIM_CPU *cpu, ADDR a, DI val)
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{
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if (! MEM_CHECK_WRITE (a, DI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, DI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_DI);
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sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMDI (SIM_CPU *, ADDR, DI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMUQI (SIM_CPU *cpu, ADDR a, UQI val)
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{
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if (! MEM_CHECK_WRITE (a, UQI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, UQI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_UQI);
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sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMUQI (SIM_CPU *, ADDR, UQI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMUHI (SIM_CPU *cpu, ADDR a, UHI val)
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{
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if (! MEM_CHECK_WRITE (a, UHI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, UHI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_UHI);
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sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMUHI (SIM_CPU *, ADDR, UHI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMUSI (SIM_CPU *cpu, ADDR a, USI val)
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{
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if (! MEM_CHECK_WRITE (a, USI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, USI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_USI);
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sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMUSI (SIM_CPU *, ADDR, USI);
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#endif
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#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
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MEMOPS_INLINE void
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SETMEMUDI (SIM_CPU *cpu, ADDR a, UDI val)
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{
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if (! MEM_CHECK_WRITE (a, UDI))
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{ engine_signal (cpu, SIM_SIGACCESS); return; }
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if (! MEM_CHECK_ALIGNMENT (a, UDI))
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{ engine_signal (cpu, SIM_SIGALIGN); return; }
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PROFILE_COUNT_WRITE (cpu, a, MODE_UDI);
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sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val);
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}
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#else
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extern void SETMEMUDI (SIM_CPU *, ADDR, UDI);
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#endif
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#endif /* CGEN_MEMS_H */
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