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136 lines
4.3 KiB
C
136 lines
4.3 KiB
C
/* Run function for the micromips simulator
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Copyright (C) 2005-2017 Free Software Foundation, Inc.
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Contributed by Imagination Technologies, Ltd.
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Written by Andrew Bennett <andrew.bennett@imgtec.com>.
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This file is part of the MIPS sim.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "sim-main.h"
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#include "micromips16_idecode.h"
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#include "micromips32_idecode.h"
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#include "micromips_m32_idecode.h"
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#include "bfd.h"
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#include "sim-engine.h"
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/* These definitions come from the *_support.h files generated by igen and are
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required because they are used in some of the macros in the code below.
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Unfortunately we can not just blindly include the *_support.h files to get
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these definitions because some of the defines in these files are specific
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for a particular configuration of the simulator for example instruction word
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size is 16 bits for micromips16 and 32 bits for micromips32. This means we
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could break future code changes by doing this, so a safer approach is to just
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extract the defines that we need to get this file to compile. */
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#define SD sd
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#define CPU cpu
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address_word
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micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
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address_word cia,
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int instruction_size)
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{
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if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_ANY)
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{
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micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
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if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
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&& MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
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return micromips16_idecode_issue (sd, instruction_0, cia);
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else
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{
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micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
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return micromips32_idecode_issue (sd, instruction_0, cia);
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}
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}
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else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_16)
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{
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micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
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if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
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&& MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
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return micromips16_idecode_issue (sd, instruction_0, cia);
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else
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sim_engine_abort (sd, cpu, cia,
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"Invalid 16 bit micromips instruction");
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}
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else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_32)
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{
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micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
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return micromips32_idecode_issue (sd, instruction_0, cia);
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}
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else
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return NULL_CIA;
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}
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void
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sim_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus,
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int signal)
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{
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micromips_m32_instruction_word instruction_0;
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sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
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micromips32_instruction_address cia = CPU_PC_GET (cpu);
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sd->isa_mode = ISA_MODE_MIPS32;
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while (1)
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{
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micromips32_instruction_address nia;
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/* Allow us to switch back from MIPS32 to microMIPS
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This covers two cases:
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1. Setting the correct isa mode based on the start address
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from the elf header.
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2. Setting the correct isa mode after a MIPS32 jump or branch
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instruction. */
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if ((sd->isa_mode == ISA_MODE_MIPS32)
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&& ((cia & 0x1) == ISA_MODE_MICROMIPS))
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{
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sd->isa_mode = ISA_MODE_MICROMIPS;
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cia = cia & ~0x1;
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}
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#if defined (ENGINE_ISSUE_PREFIX_HOOK)
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ENGINE_ISSUE_PREFIX_HOOK ();
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#endif
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switch (sd->isa_mode)
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{
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case ISA_MODE_MICROMIPS:
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nia =
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micromips_instruction_decode (sd, cpu, cia,
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MICROMIPS_DELAYSLOT_SIZE_ANY);
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break;
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case ISA_MODE_MIPS32:
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instruction_0 = IMEM32 (cia);
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nia = micromips_m32_idecode_issue (sd, instruction_0, cia);
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break;
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default:
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nia = NULL_CIA;
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}
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#if defined (ENGINE_ISSUE_POSTFIX_HOOK)
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ENGINE_ISSUE_POSTFIX_HOOK ();
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#endif
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/* Update the instruction address */
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cia = nia;
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/* process any events */
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if (sim_events_tick (sd))
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{
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CPU_PC_SET (cpu, cia);
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sim_events_process (sd);
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cia = CPU_PC_GET (cpu);
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}
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}
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}
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