361 lines
11 KiB
C
361 lines
11 KiB
C
/* Target-dependent code for OpenBSD/powerpc.
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Copyright (C) 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "gdbtypes.h"
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#include "osabi.h"
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#include "regcache.h"
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#include "regset.h"
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#include "symtab.h"
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#include "trad-frame.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "ppc-tdep.h"
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#include "ppcobsd-tdep.h"
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#include "solib-svr4.h"
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/* Register offsets from <machine/reg.h>. */
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struct ppc_reg_offsets ppcobsd_reg_offsets;
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struct ppc_reg_offsets ppcobsd_fpreg_offsets;
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/* Core file support. */
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/* Supply register REGNUM in the general-purpose register set REGSET
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from the buffer specified by GREGS and LEN to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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void
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ppcobsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len)
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{
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/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
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point registers. Traditionally, GDB's register set has still
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listed the floating point registers for such machines, so this
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code is harmless. However, the new E500 port actually omits the
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floating point registers entirely from the register set --- they
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don't even have register numbers assigned to them.
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It's not clear to me how best to update this code, so this assert
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will alert the first person to encounter the OpenBSD/E500
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combination to the problem. */
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gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
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ppc_supply_gregset (regset, regcache, regnum, gregs, len);
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ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* Collect register REGNUM in the general-purpose register set
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REGSET. from register cache REGCACHE into the buffer specified by
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GREGS and LEN. If REGNUM is -1, do this for all registers in
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REGSET. */
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void
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ppcobsd_collect_gregset (const struct regset *regset,
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const struct regcache *regcache, int regnum,
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void *gregs, size_t len)
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{
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/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
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point registers. Traditionally, GDB's register set has still
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listed the floating point registers for such machines, so this
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code is harmless. However, the new E500 port actually omits the
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floating point registers entirely from the register set --- they
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don't even have register numbers assigned to them.
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It's not clear to me how best to update this code, so this assert
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will alert the first person to encounter the OpenBSD/E500
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combination to the problem. */
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gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
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ppc_collect_gregset (regset, regcache, regnum, gregs, len);
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ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* OpenBSD/powerpc register set. */
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struct regset ppcobsd_gregset =
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{
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&ppcobsd_reg_offsets,
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ppcobsd_supply_gregset
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};
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struct regset ppcobsd_fpregset =
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{
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&ppcobsd_fpreg_offsets,
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ppc_supply_fpregset
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};
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/* Return the appropriate register set for the core section identified
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by SECT_NAME and SECT_SIZE. */
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static const struct regset *
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ppcobsd_regset_from_core_section (struct gdbarch *gdbarch,
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const char *sect_name, size_t sect_size)
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{
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if (strcmp (sect_name, ".reg") == 0 && sect_size >= 412)
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return &ppcobsd_gregset;
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return NULL;
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}
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/* Signal trampolines. */
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/* Since OpenBSD 3.2, the sigtramp routine is mapped at a random page
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in virtual memory. The randomness makes it somewhat tricky to
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detect it, but fortunately we can rely on the fact that the start
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of the sigtramp routine is page-aligned. We recognize the
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trampoline by looking for the code that invokes the sigreturn
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system call. The offset where we can find that code varies from
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release to release.
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By the way, the mapping mentioned above is read-only, so you cannot
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place a breakpoint in the signal trampoline. */
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/* Default page size. */
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static const int ppcobsd_page_size = 4096;
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/* Offset for sigreturn(2). */
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static const int ppcobsd_sigreturn_offset[] = {
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0x98, /* OpenBSD 3.8 */
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0x0c, /* OpenBSD 3.2 */
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-1
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};
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static int
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ppcobsd_sigtramp_p (struct frame_info *next_frame)
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{
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CORE_ADDR pc = frame_pc_unwind (next_frame);
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CORE_ADDR start_pc = (pc & ~(ppcobsd_page_size - 1));
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const int *offset;
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char *name;
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find_pc_partial_function (pc, &name, NULL, NULL);
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if (name)
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return 0;
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for (offset = ppcobsd_sigreturn_offset; *offset != -1; offset++)
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{
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gdb_byte buf[2 * PPC_INSN_SIZE];
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unsigned long insn;
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if (!safe_frame_unwind_memory (next_frame, start_pc + *offset,
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buf, sizeof buf))
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continue;
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/* Check for "li r0,SYS_sigreturn". */
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insn = extract_unsigned_integer (buf, PPC_INSN_SIZE);
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if (insn != 0x38000067)
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continue;
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/* Check for "sc". */
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insn = extract_unsigned_integer (buf + PPC_INSN_SIZE, PPC_INSN_SIZE);
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if (insn != 0x44000002)
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continue;
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return 1;
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}
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return 0;
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}
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static struct trad_frame_cache *
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ppcobsd_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
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{
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struct gdbarch *gdbarch = get_frame_arch (next_frame);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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struct trad_frame_cache *cache;
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CORE_ADDR addr, base, func;
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gdb_byte buf[PPC_INSN_SIZE];
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unsigned long insn, sigcontext_offset;
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int i;
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if (*this_cache)
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return *this_cache;
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cache = trad_frame_cache_zalloc (next_frame);
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*this_cache = cache;
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func = frame_pc_unwind (next_frame);
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func &= ~(ppcobsd_page_size - 1);
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if (!safe_frame_unwind_memory (next_frame, func, buf, sizeof buf))
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return cache;
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/* Calculate the offset where we can find `struct sigcontext'. We
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base our calculation on the amount of stack space reserved by the
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first instruction of the signal trampoline. */
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insn = extract_unsigned_integer (buf, PPC_INSN_SIZE);
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sigcontext_offset = (0x10000 - (insn & 0x0000ffff)) + 8;
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base = frame_unwind_register_unsigned (next_frame,
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gdbarch_sp_regnum (current_gdbarch));
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addr = base + sigcontext_offset + 2 * tdep->wordsize;
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for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
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{
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int regnum = i + tdep->ppc_gp0_regnum;
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trad_frame_set_reg_addr (cache, regnum, addr);
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}
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trad_frame_set_reg_addr (cache, tdep->ppc_lr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (cache, tdep->ppc_cr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (cache, tdep->ppc_xer_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (cache, tdep->ppc_ctr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (cache, gdbarch_pc_regnum (current_gdbarch), addr);
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/* SRR0? */
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addr += tdep->wordsize;
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/* Construct the frame ID using the function start. */
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trad_frame_set_id (cache, frame_id_build (base, func));
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return cache;
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}
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static void
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ppcobsd_sigtramp_frame_this_id (struct frame_info *next_frame,
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void **this_cache, struct frame_id *this_id)
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{
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struct trad_frame_cache *cache =
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ppcobsd_sigtramp_frame_cache (next_frame, this_cache);
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trad_frame_get_id (cache, this_id);
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}
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static void
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ppcobsd_sigtramp_frame_prev_register (struct frame_info *next_frame,
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void **this_cache, int regnum,
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int *optimizedp, enum lval_type *lvalp,
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CORE_ADDR *addrp, int *realnump,
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gdb_byte *valuep)
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{
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struct trad_frame_cache *cache =
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ppcobsd_sigtramp_frame_cache (next_frame, this_cache);
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trad_frame_get_register (cache, next_frame, regnum,
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optimizedp, lvalp, addrp, realnump, valuep);
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}
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static const struct frame_unwind ppcobsd_sigtramp_frame_unwind = {
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SIGTRAMP_FRAME,
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ppcobsd_sigtramp_frame_this_id,
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ppcobsd_sigtramp_frame_prev_register
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};
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static const struct frame_unwind *
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ppcobsd_sigtramp_frame_sniffer (struct frame_info *next_frame)
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{
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if (ppcobsd_sigtramp_p (next_frame))
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return &ppcobsd_sigtramp_frame_unwind;
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return NULL;
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}
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static void
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ppcobsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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/* OpenBSD doesn't support the 128-bit `long double' from the psABI. */
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set_gdbarch_long_double_bit (gdbarch, 64);
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set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
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/* OpenBSD currently uses a broken GCC. */
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set_gdbarch_return_value (gdbarch, ppc_sysv_abi_broken_return_value);
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/* OpenBSD uses SVR4-style shared libraries. */
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_ilp32_fetch_link_map_offsets);
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set_gdbarch_regset_from_core_section
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(gdbarch, ppcobsd_regset_from_core_section);
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frame_unwind_append_sniffer (gdbarch, ppcobsd_sigtramp_frame_sniffer);
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}
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/* OpenBSD uses uses the traditional NetBSD core file format, even for
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ports that use ELF. */
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#define GDB_OSABI_NETBSD_CORE GDB_OSABI_OPENBSD_ELF
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static enum gdb_osabi
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ppcobsd_core_osabi_sniffer (bfd *abfd)
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{
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if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
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return GDB_OSABI_NETBSD_CORE;
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return GDB_OSABI_UNKNOWN;
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}
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/* Provide a prototype to silence -Wmissing-prototypes. */
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void _initialize_ppcobsd_tdep (void);
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void
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_initialize_ppcobsd_tdep (void)
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{
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/* BFD doesn't set a flavour for NetBSD style a.out core files. */
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gdbarch_register_osabi_sniffer (bfd_arch_powerpc, bfd_target_unknown_flavour,
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ppcobsd_core_osabi_sniffer);
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gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_OPENBSD_ELF,
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ppcobsd_init_abi);
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gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_OPENBSD_ELF,
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ppcobsd_init_abi);
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/* Avoid initializing the register offsets again if they were
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already initailized by ppcobsd-nat.c. */
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if (ppcobsd_reg_offsets.pc_offset == 0)
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{
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/* General-purpose registers. */
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ppcobsd_reg_offsets.r0_offset = 0;
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ppcobsd_reg_offsets.pc_offset = 384;
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ppcobsd_reg_offsets.ps_offset = 388;
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ppcobsd_reg_offsets.cr_offset = 392;
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ppcobsd_reg_offsets.lr_offset = 396;
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ppcobsd_reg_offsets.ctr_offset = 400;
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ppcobsd_reg_offsets.xer_offset = 404;
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ppcobsd_reg_offsets.mq_offset = 408;
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/* Floating-point registers. */
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ppcobsd_reg_offsets.f0_offset = 128;
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ppcobsd_reg_offsets.fpscr_offset = -1;
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/* AltiVec registers. */
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ppcobsd_reg_offsets.vr0_offset = 0;
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ppcobsd_reg_offsets.vscr_offset = 512;
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ppcobsd_reg_offsets.vrsave_offset = 520;
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}
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if (ppcobsd_fpreg_offsets.fpscr_offset == 0)
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{
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/* Floating-point registers. */
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ppcobsd_reg_offsets.f0_offset = 0;
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ppcobsd_reg_offsets.fpscr_offset = 256;
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}
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}
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