1170 lines
30 KiB
C
1170 lines
30 KiB
C
/* Target-dependent code for Moxie.
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Copyright (C) 2009-2017 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "value.h"
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#include "inferior.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "osabi.h"
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#include "language.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "trad-frame.h"
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#include "dis-asm.h"
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#include "record.h"
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#include "record-full.h"
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#include "moxie-tdep.h"
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#include <algorithm>
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/* Local functions. */
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extern void _initialize_moxie_tdep (void);
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/* Use an invalid address value as 'not available' marker. */
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enum { REG_UNAVAIL = (CORE_ADDR) -1 };
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struct moxie_frame_cache
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{
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/* Base address. */
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CORE_ADDR base;
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CORE_ADDR pc;
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LONGEST framesize;
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CORE_ADDR saved_regs[MOXIE_NUM_REGS];
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CORE_ADDR saved_sp;
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};
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/* Implement the "frame_align" gdbarch method. */
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static CORE_ADDR
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moxie_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
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{
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/* Align to the size of an instruction (so that they can safely be
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pushed onto the stack. */
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return sp & ~1;
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}
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constexpr gdb_byte moxie_break_insn[] = { 0x35, 0x00 };
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typedef BP_MANIPULATION (moxie_break_insn) moxie_breakpoint;
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/* Moxie register names. */
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static const char *moxie_register_names[] = {
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"$fp", "$sp", "$r0", "$r1", "$r2",
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"$r3", "$r4", "$r5", "$r6", "$r7",
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"$r8", "$r9", "$r10", "$r11", "$r12",
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"$r13", "$pc", "$cc" };
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/* Implement the "register_name" gdbarch method. */
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static const char *
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moxie_register_name (struct gdbarch *gdbarch, int reg_nr)
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{
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= MOXIE_NUM_REGS)
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return NULL;
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return moxie_register_names[reg_nr];
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}
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/* Implement the "register_type" gdbarch method. */
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static struct type *
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moxie_register_type (struct gdbarch *gdbarch, int reg_nr)
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{
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if (reg_nr == MOXIE_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else if (reg_nr == MOXIE_SP_REGNUM || reg_nr == MOXIE_FP_REGNUM)
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return builtin_type (gdbarch)->builtin_data_ptr;
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else
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return builtin_type (gdbarch)->builtin_int32;
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}
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format. */
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static void
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moxie_store_return_value (struct type *type, struct regcache *regcache,
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const gdb_byte *valbuf)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR regval;
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int len = TYPE_LENGTH (type);
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/* Things always get returned in RET1_REGNUM, RET2_REGNUM. */
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regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
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regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
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if (len > 4)
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{
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regval = extract_unsigned_integer (valbuf + 4, len - 4, byte_order);
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regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
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}
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}
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/* Decode the instructions within the given address range. Decide
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when we must have reached the end of the function prologue. If a
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frame_info pointer is provided, fill in its saved_regs etc.
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Returns the address of the first instruction after the prologue. */
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static CORE_ADDR
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moxie_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr,
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struct moxie_frame_cache *cache,
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struct gdbarch *gdbarch)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR next_addr;
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ULONGEST inst, inst2;
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LONGEST offset;
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int regnum;
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/* Record where the jsra instruction saves the PC and FP. */
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cache->saved_regs[MOXIE_PC_REGNUM] = -4;
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cache->saved_regs[MOXIE_FP_REGNUM] = 0;
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cache->framesize = 0;
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if (start_addr >= end_addr)
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return end_addr;
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for (next_addr = start_addr; next_addr < end_addr; )
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{
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inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
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/* Match "push $sp $rN" where N is between 0 and 13 inclusive. */
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if (inst >= 0x0612 && inst <= 0x061f)
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{
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regnum = inst & 0x000f;
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cache->framesize += 4;
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cache->saved_regs[regnum] = cache->framesize;
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next_addr += 2;
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}
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else
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break;
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}
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inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
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/* Optional stack allocation for args and local vars <= 4
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byte. */
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if (inst == 0x01e0) /* ldi.l $r12, X */
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{
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offset = read_memory_integer (next_addr + 2, 4, byte_order);
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inst2 = read_memory_unsigned_integer (next_addr + 6, 2, byte_order);
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if (inst2 == 0x291e) /* sub.l $sp, $r12 */
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{
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cache->framesize += offset;
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}
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return (next_addr + 8);
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}
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else if ((inst & 0xff00) == 0x9100) /* dec $sp, X */
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{
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cache->framesize += (inst & 0x00ff);
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next_addr += 2;
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while (next_addr < end_addr)
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{
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inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
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if ((inst & 0xff00) != 0x9100) /* no more dec $sp, X */
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break;
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cache->framesize += (inst & 0x00ff);
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next_addr += 2;
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}
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}
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return next_addr;
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}
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/* Find the end of function prologue. */
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static CORE_ADDR
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moxie_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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CORE_ADDR func_addr = 0, func_end = 0;
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const char *func_name;
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/* See if we can determine the end of the prologue via the symbol table.
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If so, then return either PC, or the PC after the prologue, whichever
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is greater. */
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if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
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{
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CORE_ADDR post_prologue_pc
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= skip_prologue_using_sal (gdbarch, func_addr);
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if (post_prologue_pc != 0)
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return std::max (pc, post_prologue_pc);
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else
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{
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/* Can't determine prologue from the symbol table, need to examine
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instructions. */
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struct symtab_and_line sal;
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struct symbol *sym;
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struct moxie_frame_cache cache;
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CORE_ADDR plg_end;
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memset (&cache, 0, sizeof cache);
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plg_end = moxie_analyze_prologue (func_addr,
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func_end, &cache, gdbarch);
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/* Found a function. */
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sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL).symbol;
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/* Don't use line number debug info for assembly source
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files. */
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if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
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{
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sal = find_pc_line (func_addr, 0);
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if (sal.end && sal.end < func_end)
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{
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/* Found a line number, use it as end of
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prologue. */
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return sal.end;
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}
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}
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/* No useable line symbol. Use result of prologue parsing
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method. */
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return plg_end;
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}
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}
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/* No function symbol -- just return the PC. */
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return (CORE_ADDR) pc;
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}
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struct moxie_unwind_cache
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{
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/* The previous frame's inner most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR prev_sp;
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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int size;
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/* How far the SP and r13 (FP) have been offset from the start of
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the stack frame (as defined by the previous frame's stack
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pointer). */
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LONGEST sp_offset;
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LONGEST r13_offset;
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int uses_frame;
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/* Table indicating the location of each and every register. */
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struct trad_frame_saved_reg *saved_regs;
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};
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/* Read an unsigned integer from the inferior, and adjust
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endianess. */
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static ULONGEST
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moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
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int length, enum bfd_endian byte_order)
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{
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if (target_read_memory (addr, buf, length))
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{
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if (record_debug)
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printf_unfiltered (_("Process record: error reading memory at "
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"addr 0x%s len = %d.\n"),
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paddress (target_gdbarch (), addr), length);
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return -1;
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}
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return extract_unsigned_integer (buf, length, byte_order);
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}
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/* Helper macro to extract the signed 10-bit offset from a 16-bit
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branch instruction. */
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#define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1)
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/* Insert a single step breakpoint. */
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static std::vector<CORE_ADDR>
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moxie_software_single_step (struct regcache *regcache)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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CORE_ADDR addr;
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gdb_byte buf[4];
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uint16_t inst;
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uint32_t tmpu32;
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ULONGEST fp;
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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std::vector<CORE_ADDR> next_pcs;
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addr = regcache_read_pc (regcache);
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inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order);
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/* Decode instruction. */
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if (inst & (1 << 15))
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{
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if (inst & (1 << 14))
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{
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/* This is a Form 3 instruction. */
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int opcode = (inst >> 10 & 0xf);
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switch (opcode)
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{
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case 0x00: /* beq */
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case 0x01: /* bne */
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case 0x02: /* blt */
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case 0x03: /* bgt */
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case 0x04: /* bltu */
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case 0x05: /* bgtu */
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case 0x06: /* bge */
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case 0x07: /* ble */
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case 0x08: /* bgeu */
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case 0x09: /* bleu */
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/* Insert breaks on both branches, because we can't currently tell
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which way things will go. */
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next_pcs.push_back (addr + 2);
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next_pcs.push_back (addr + 2 + INST2OFFSET(inst));
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break;
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default:
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{
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/* Do nothing. */
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break;
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}
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}
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}
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else
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{
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/* This is a Form 2 instruction. They are all 16 bits. */
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next_pcs.push_back (addr + 2);
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}
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}
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else
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{
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/* This is a Form 1 instruction. */
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int opcode = inst >> 8;
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switch (opcode)
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{
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/* 16-bit instructions. */
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case 0x00: /* bad */
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case 0x02: /* mov (register-to-register) */
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case 0x05: /* add.l */
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case 0x06: /* push */
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case 0x07: /* pop */
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case 0x0a: /* ld.l (register indirect) */
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case 0x0b: /* st.l */
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case 0x0e: /* cmp */
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case 0x0f: /* nop */
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case 0x10: /* sex.b */
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case 0x11: /* sex.s */
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case 0x12: /* zex.b */
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case 0x13: /* zex.s */
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case 0x14: /* umul.x */
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case 0x15: /* mul.x */
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case 0x16:
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case 0x17:
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case 0x18:
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case 0x1c: /* ld.b (register indirect) */
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case 0x1e: /* st.b */
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case 0x21: /* ld.s (register indirect) */
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case 0x23: /* st.s */
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case 0x26: /* and */
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case 0x27: /* lshr */
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case 0x28: /* ashl */
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case 0x29: /* sub.l */
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case 0x2a: /* neg */
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case 0x2b: /* or */
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case 0x2c: /* not */
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case 0x2d: /* ashr */
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case 0x2e: /* xor */
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case 0x2f: /* mul.l */
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case 0x31: /* div.l */
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case 0x32: /* udiv.l */
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case 0x33: /* mod.l */
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case 0x34: /* umod.l */
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next_pcs.push_back (addr + 2);
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break;
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/* 32-bit instructions. */
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case 0x0c: /* ldo.l */
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case 0x0d: /* sto.l */
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case 0x36: /* ldo.b */
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case 0x37: /* sto.b */
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case 0x38: /* ldo.s */
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case 0x39: /* sto.s */
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next_pcs.push_back (addr + 4);
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break;
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/* 48-bit instructions. */
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case 0x01: /* ldi.l (immediate) */
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case 0x08: /* lda.l */
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case 0x09: /* sta.l */
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case 0x1b: /* ldi.b (immediate) */
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case 0x1d: /* lda.b */
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case 0x1f: /* sta.b */
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case 0x20: /* ldi.s (immediate) */
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case 0x22: /* lda.s */
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case 0x24: /* sta.s */
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next_pcs.push_back (addr + 6);
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break;
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/* Control flow instructions. */
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case 0x03: /* jsra */
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case 0x1a: /* jmpa */
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next_pcs.push_back (moxie_process_readu (addr + 2, buf, 4,
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byte_order));
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break;
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case 0x04: /* ret */
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regcache_cooked_read_unsigned (regcache, MOXIE_FP_REGNUM, &fp);
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next_pcs.push_back (moxie_process_readu (fp + 4, buf, 4, byte_order));
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break;
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case 0x19: /* jsr */
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case 0x25: /* jmp */
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regcache_raw_read (regcache,
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(inst >> 4) & 0xf, (gdb_byte *) & tmpu32);
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next_pcs.push_back (tmpu32);
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break;
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case 0x30: /* swi */
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case 0x35: /* brk */
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/* Unsupported, for now. */
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break;
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}
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}
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return next_pcs;
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}
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/* Implement the "read_pc" gdbarch method. */
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static CORE_ADDR
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moxie_read_pc (struct regcache *regcache)
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{
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ULONGEST pc;
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regcache_cooked_read_unsigned (regcache, MOXIE_PC_REGNUM, &pc);
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return pc;
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}
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/* Implement the "write_pc" gdbarch method. */
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static void
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moxie_write_pc (struct regcache *regcache, CORE_ADDR val)
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{
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regcache_cooked_write_unsigned (regcache, MOXIE_PC_REGNUM, val);
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}
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/* Implement the "unwind_sp" gdbarch method. */
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static CORE_ADDR
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moxie_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
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{
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return frame_unwind_register_unsigned (next_frame, MOXIE_SP_REGNUM);
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}
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/* Given a return value in `regbuf' with a type `valtype',
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extract and copy its value into `valbuf'. */
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static void
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moxie_extract_return_value (struct type *type, struct regcache *regcache,
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gdb_byte *dst)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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int len = TYPE_LENGTH (type);
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ULONGEST tmp;
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/* By using store_unsigned_integer we avoid having to do
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anything special for small big-endian values. */
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regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
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store_unsigned_integer (dst, (len > 4 ? len - 4 : len), byte_order, tmp);
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/* Ignore return values more than 8 bytes in size because the moxie
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returns anything more than 8 bytes in the stack. */
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if (len > 4)
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{
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regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
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store_unsigned_integer (dst + len - 4, 4, byte_order, tmp);
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}
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}
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/* Implement the "return_value" gdbarch method. */
|
|
|
|
static enum return_value_convention
|
|
moxie_return_value (struct gdbarch *gdbarch, struct value *function,
|
|
struct type *valtype, struct regcache *regcache,
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
{
|
|
if (TYPE_LENGTH (valtype) > 8)
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
else
|
|
{
|
|
if (readbuf != NULL)
|
|
moxie_extract_return_value (valtype, regcache, readbuf);
|
|
if (writebuf != NULL)
|
|
moxie_store_return_value (valtype, regcache, writebuf);
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
}
|
|
}
|
|
|
|
/* Allocate and initialize a moxie_frame_cache object. */
|
|
|
|
static struct moxie_frame_cache *
|
|
moxie_alloc_frame_cache (void)
|
|
{
|
|
struct moxie_frame_cache *cache;
|
|
int i;
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct moxie_frame_cache);
|
|
|
|
cache->base = 0;
|
|
cache->saved_sp = 0;
|
|
cache->pc = 0;
|
|
cache->framesize = 0;
|
|
for (i = 0; i < MOXIE_NUM_REGS; ++i)
|
|
cache->saved_regs[i] = REG_UNAVAIL;
|
|
|
|
return cache;
|
|
}
|
|
|
|
/* Populate a moxie_frame_cache object for this_frame. */
|
|
|
|
static struct moxie_frame_cache *
|
|
moxie_frame_cache (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct moxie_frame_cache *cache;
|
|
CORE_ADDR current_pc;
|
|
int i;
|
|
|
|
if (*this_cache)
|
|
return (struct moxie_frame_cache *) *this_cache;
|
|
|
|
cache = moxie_alloc_frame_cache ();
|
|
*this_cache = cache;
|
|
|
|
cache->base = get_frame_register_unsigned (this_frame, MOXIE_FP_REGNUM);
|
|
if (cache->base == 0)
|
|
return cache;
|
|
|
|
cache->pc = get_frame_func (this_frame);
|
|
current_pc = get_frame_pc (this_frame);
|
|
if (cache->pc)
|
|
{
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
moxie_analyze_prologue (cache->pc, current_pc, cache, gdbarch);
|
|
}
|
|
|
|
cache->saved_sp = cache->base - cache->framesize;
|
|
|
|
for (i = 0; i < MOXIE_NUM_REGS; ++i)
|
|
if (cache->saved_regs[i] != REG_UNAVAIL)
|
|
cache->saved_regs[i] = cache->base - cache->saved_regs[i];
|
|
|
|
return cache;
|
|
}
|
|
|
|
/* Implement the "unwind_pc" gdbarch method. */
|
|
|
|
static CORE_ADDR
|
|
moxie_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_unwind_register_unsigned (next_frame, MOXIE_PC_REGNUM);
|
|
}
|
|
|
|
/* Given a GDB frame, determine the address of the calling function's
|
|
frame. This will be used to create a new GDB frame struct. */
|
|
|
|
static void
|
|
moxie_frame_this_id (struct frame_info *this_frame,
|
|
void **this_prologue_cache, struct frame_id *this_id)
|
|
{
|
|
struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
|
|
this_prologue_cache);
|
|
|
|
/* This marks the outermost frame. */
|
|
if (cache->base == 0)
|
|
return;
|
|
|
|
*this_id = frame_id_build (cache->saved_sp, cache->pc);
|
|
}
|
|
|
|
/* Get the value of register regnum in the previous stack frame. */
|
|
|
|
static struct value *
|
|
moxie_frame_prev_register (struct frame_info *this_frame,
|
|
void **this_prologue_cache, int regnum)
|
|
{
|
|
struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
|
|
this_prologue_cache);
|
|
|
|
gdb_assert (regnum >= 0);
|
|
|
|
if (regnum == MOXIE_SP_REGNUM && cache->saved_sp)
|
|
return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
|
|
|
|
if (regnum < MOXIE_NUM_REGS && cache->saved_regs[regnum] != REG_UNAVAIL)
|
|
return frame_unwind_got_memory (this_frame, regnum,
|
|
cache->saved_regs[regnum]);
|
|
|
|
return frame_unwind_got_register (this_frame, regnum, regnum);
|
|
}
|
|
|
|
static const struct frame_unwind moxie_frame_unwind = {
|
|
NORMAL_FRAME,
|
|
default_frame_unwind_stop_reason,
|
|
moxie_frame_this_id,
|
|
moxie_frame_prev_register,
|
|
NULL,
|
|
default_frame_sniffer
|
|
};
|
|
|
|
/* Return the base address of this_frame. */
|
|
|
|
static CORE_ADDR
|
|
moxie_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
|
|
this_cache);
|
|
|
|
return cache->base;
|
|
}
|
|
|
|
static const struct frame_base moxie_frame_base = {
|
|
&moxie_frame_unwind,
|
|
moxie_frame_base_address,
|
|
moxie_frame_base_address,
|
|
moxie_frame_base_address
|
|
};
|
|
|
|
static struct frame_id
|
|
moxie_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
CORE_ADDR sp = get_frame_register_unsigned (this_frame, MOXIE_SP_REGNUM);
|
|
|
|
return frame_id_build (sp, get_frame_pc (this_frame));
|
|
}
|
|
|
|
/* Parse the current instruction and record the values of the registers and
|
|
memory that will be changed in current instruction to "record_arch_list".
|
|
Return -1 if something wrong. */
|
|
|
|
static int
|
|
moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
CORE_ADDR addr)
|
|
{
|
|
gdb_byte buf[4];
|
|
uint16_t inst;
|
|
uint32_t tmpu32;
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
if (record_debug > 1)
|
|
fprintf_unfiltered (gdb_stdlog, "Process record: moxie_process_record "
|
|
"addr = 0x%s\n",
|
|
paddress (target_gdbarch (), addr));
|
|
|
|
inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order);
|
|
|
|
/* Decode instruction. */
|
|
if (inst & (1 << 15))
|
|
{
|
|
if (inst & (1 << 14))
|
|
{
|
|
/* This is a Form 3 instruction. */
|
|
int opcode = (inst >> 10 & 0xf);
|
|
|
|
switch (opcode)
|
|
{
|
|
case 0x00: /* beq */
|
|
case 0x01: /* bne */
|
|
case 0x02: /* blt */
|
|
case 0x03: /* bgt */
|
|
case 0x04: /* bltu */
|
|
case 0x05: /* bgtu */
|
|
case 0x06: /* bge */
|
|
case 0x07: /* ble */
|
|
case 0x08: /* bgeu */
|
|
case 0x09: /* bleu */
|
|
/* Do nothing. */
|
|
break;
|
|
default:
|
|
{
|
|
/* Do nothing. */
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* This is a Form 2 instruction. */
|
|
int opcode = (inst >> 12 & 0x3);
|
|
switch (opcode)
|
|
{
|
|
case 0x00: /* inc */
|
|
case 0x01: /* dec */
|
|
case 0x02: /* gsr */
|
|
{
|
|
int reg = (inst >> 8) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x03: /* ssr */
|
|
{
|
|
/* Do nothing until GDB learns about moxie's special
|
|
registers. */
|
|
}
|
|
break;
|
|
default:
|
|
/* Do nothing. */
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* This is a Form 1 instruction. */
|
|
int opcode = inst >> 8;
|
|
|
|
switch (opcode)
|
|
{
|
|
case 0x00: /* nop */
|
|
/* Do nothing. */
|
|
break;
|
|
case 0x01: /* ldi.l (immediate) */
|
|
case 0x02: /* mov (register-to-register) */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x03: /* jsra */
|
|
{
|
|
regcache_raw_read (regcache,
|
|
MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
|
|
|| (record_full_arch_list_add_reg (regcache,
|
|
MOXIE_SP_REGNUM))
|
|
|| record_full_arch_list_add_mem (tmpu32 - 12, 12))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x04: /* ret */
|
|
{
|
|
if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
|
|
|| (record_full_arch_list_add_reg (regcache,
|
|
MOXIE_SP_REGNUM)))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x05: /* add.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x06: /* push */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_reg (regcache, reg)
|
|
|| record_full_arch_list_add_mem (tmpu32 - 4, 4))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x07: /* pop */
|
|
{
|
|
int a = (inst >> 4) & 0xf;
|
|
int b = inst & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, a)
|
|
|| record_full_arch_list_add_reg (regcache, b))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x08: /* lda.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x09: /* sta.l */
|
|
{
|
|
tmpu32 = (uint32_t) moxie_process_readu (addr+2, buf,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 4))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0a: /* ld.l (register indirect) */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0b: /* st.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 4))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0c: /* ldo.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0d: /* sto.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
|
|
byte_order)) << 16 ) >> 16;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
tmpu32 += offset;
|
|
if (record_full_arch_list_add_mem (tmpu32, 4))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0e: /* cmp */
|
|
{
|
|
if (record_full_arch_list_add_reg (regcache, MOXIE_CC_REGNUM))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x0f: /* nop */
|
|
{
|
|
/* Do nothing. */
|
|
break;
|
|
}
|
|
case 0x10: /* sex.b */
|
|
case 0x11: /* sex.s */
|
|
case 0x12: /* zex.b */
|
|
case 0x13: /* zex.s */
|
|
case 0x14: /* umul.x */
|
|
case 0x15: /* mul.x */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x16:
|
|
case 0x17:
|
|
case 0x18:
|
|
{
|
|
/* Do nothing. */
|
|
break;
|
|
}
|
|
case 0x19: /* jsr */
|
|
{
|
|
regcache_raw_read (regcache,
|
|
MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
|
|
|| (record_full_arch_list_add_reg (regcache,
|
|
MOXIE_SP_REGNUM))
|
|
|| record_full_arch_list_add_mem (tmpu32 - 12, 12))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x1a: /* jmpa */
|
|
{
|
|
/* Do nothing. */
|
|
}
|
|
break;
|
|
case 0x1b: /* ldi.b (immediate) */
|
|
case 0x1c: /* ld.b (register indirect) */
|
|
case 0x1d: /* lda.b */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x1e: /* st.b */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 1))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x1f: /* sta.b */
|
|
{
|
|
tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 1))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x20: /* ldi.s (immediate) */
|
|
case 0x21: /* ld.s (register indirect) */
|
|
case 0x22: /* lda.s */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x23: /* st.s */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 2))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x24: /* sta.s */
|
|
{
|
|
tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order);
|
|
if (record_full_arch_list_add_mem (tmpu32, 2))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x25: /* jmp */
|
|
{
|
|
/* Do nothing. */
|
|
}
|
|
break;
|
|
case 0x26: /* and */
|
|
case 0x27: /* lshr */
|
|
case 0x28: /* ashl */
|
|
case 0x29: /* sub */
|
|
case 0x2a: /* neg */
|
|
case 0x2b: /* or */
|
|
case 0x2c: /* not */
|
|
case 0x2d: /* ashr */
|
|
case 0x2e: /* xor */
|
|
case 0x2f: /* mul */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x30: /* swi */
|
|
{
|
|
/* We currently implement support for libgloss'
|
|
system calls. */
|
|
|
|
int inum = moxie_process_readu (addr+2, buf, 4, byte_order);
|
|
|
|
switch (inum)
|
|
{
|
|
case 0x1: /* SYS_exit */
|
|
{
|
|
/* Do nothing. */
|
|
}
|
|
break;
|
|
case 0x2: /* SYS_open */
|
|
{
|
|
if (record_full_arch_list_add_reg (regcache, RET1_REGNUM))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x4: /* SYS_read */
|
|
{
|
|
uint32_t length, ptr;
|
|
|
|
/* Read buffer pointer is in $r1. */
|
|
regcache_raw_read (regcache, 3, (gdb_byte *) & ptr);
|
|
ptr = extract_unsigned_integer ((gdb_byte *) & ptr,
|
|
4, byte_order);
|
|
|
|
/* String length is at 0x12($fp). */
|
|
regcache_raw_read (regcache,
|
|
MOXIE_FP_REGNUM, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
length = moxie_process_readu (tmpu32+20, buf, 4, byte_order);
|
|
|
|
if (record_full_arch_list_add_mem (ptr, length))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x5: /* SYS_write */
|
|
{
|
|
if (record_full_arch_list_add_reg (regcache, RET1_REGNUM))
|
|
return -1;
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
case 0x31: /* div.l */
|
|
case 0x32: /* udiv.l */
|
|
case 0x33: /* mod.l */
|
|
case 0x34: /* umod.l */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x35: /* brk */
|
|
/* Do nothing. */
|
|
break;
|
|
case 0x36: /* ldo.b */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x37: /* sto.b */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
|
|
byte_order)) << 16 ) >> 16;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
tmpu32 += offset;
|
|
if (record_full_arch_list_add_mem (tmpu32, 1))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x38: /* ldo.s */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
if (record_full_arch_list_add_reg (regcache, reg))
|
|
return -1;
|
|
}
|
|
break;
|
|
case 0x39: /* sto.s */
|
|
{
|
|
int reg = (inst >> 4) & 0xf;
|
|
uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
|
|
byte_order)) << 16 ) >> 16;
|
|
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
|
|
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
|
|
4, byte_order);
|
|
tmpu32 += offset;
|
|
if (record_full_arch_list_add_mem (tmpu32, 2))
|
|
return -1;
|
|
}
|
|
break;
|
|
default:
|
|
/* Do nothing. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (record_full_arch_list_add_reg (regcache, MOXIE_PC_REGNUM))
|
|
return -1;
|
|
if (record_full_arch_list_add_end ())
|
|
return -1;
|
|
return 0;
|
|
}
|
|
|
|
/* Allocate and initialize the moxie gdbarch object. */
|
|
|
|
static struct gdbarch *
|
|
moxie_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct gdbarch_tdep *tdep;
|
|
|
|
/* If there is already a candidate, use it. */
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
if (arches != NULL)
|
|
return arches->gdbarch;
|
|
|
|
/* Allocate space for the new architecture. */
|
|
tdep = XNEW (struct gdbarch_tdep);
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
set_gdbarch_wchar_bit (gdbarch, 32);
|
|
set_gdbarch_wchar_signed (gdbarch, 0);
|
|
|
|
set_gdbarch_read_pc (gdbarch, moxie_read_pc);
|
|
set_gdbarch_write_pc (gdbarch, moxie_write_pc);
|
|
set_gdbarch_unwind_sp (gdbarch, moxie_unwind_sp);
|
|
|
|
set_gdbarch_num_regs (gdbarch, MOXIE_NUM_REGS);
|
|
set_gdbarch_sp_regnum (gdbarch, MOXIE_SP_REGNUM);
|
|
set_gdbarch_pc_regnum (gdbarch, MOXIE_PC_REGNUM);
|
|
set_gdbarch_register_name (gdbarch, moxie_register_name);
|
|
set_gdbarch_register_type (gdbarch, moxie_register_type);
|
|
|
|
set_gdbarch_return_value (gdbarch, moxie_return_value);
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, moxie_skip_prologue);
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch,
|
|
moxie_breakpoint::kind_from_pc);
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
|
|
moxie_breakpoint::bp_from_kind);
|
|
set_gdbarch_frame_align (gdbarch, moxie_frame_align);
|
|
|
|
frame_base_set_default (gdbarch, &moxie_frame_base);
|
|
|
|
/* Methods for saving / extracting a dummy frame's ID. The ID's
|
|
stack address must match the SP value returned by
|
|
PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
|
|
set_gdbarch_dummy_id (gdbarch, moxie_dummy_id);
|
|
|
|
set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc);
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
/* Hook in the default unwinders. */
|
|
frame_unwind_append_unwinder (gdbarch, &moxie_frame_unwind);
|
|
|
|
/* Single stepping. */
|
|
set_gdbarch_software_single_step (gdbarch, moxie_software_single_step);
|
|
|
|
/* Support simple overlay manager. */
|
|
set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
|
|
|
|
/* Support reverse debugging. */
|
|
set_gdbarch_process_record (gdbarch, moxie_process_record);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
/* Register this machine's init routine. */
|
|
|
|
void
|
|
_initialize_moxie_tdep (void)
|
|
{
|
|
register_gdbarch_init (bfd_arch_moxie, moxie_gdbarch_init);
|
|
}
|