491 lines
11 KiB
C
491 lines
11 KiB
C
/* Main simulator entry points for the M32R.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sim-main.h"
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#include <signal.h>
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#include "libiberty.h"
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#include "bfd.h"
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#include "sim-core.h"
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#include "targ-vals.h"
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static SIM_RC alloc_cpu (SIM_DESC, struct _bfd *, char **);
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static void free_state (SIM_DESC);
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static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
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/* Records simulator descriptor so utilities like m32r_dump_regs can be
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called from gdb. */
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SIM_DESC current_state;
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/* Scan the args and bfd to see what kind of cpus are in use and allocate
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space for them. */
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static SIM_RC
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alloc_cpu (SIM_DESC sd, struct _bfd *abfd, char **argv)
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{
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/* Compute the size of the SIM_CPU struct.
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For now its the max of all the possible sizes. */
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int size = 0;
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const MACH *mach;
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for (mach = &machs[0]; MACH_NAME (mach) != NULL; ++mach)
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{
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int mach_size = IMP_PROPS_SIM_CPU_SIZE (MACH_IMP_PROPS (mach));
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size = mach_size > size ? mach_size : size;
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}
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if (size == 0)
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abort ();
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/* `sizeof (SIM_CPU)' is the size of the generic part, and `size' is the
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size of the cpu-specific part. */
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STATE_CPU (sd, 0) = zalloc (sizeof (SIM_CPU) + size);
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return SIM_RC_OK;
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}
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_CPU (sd, 0))
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zfree (STATE_CPU (sd, 0));
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sim_state_free (sd);
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}
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/* Create an instance of the simulator. */
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SIM_DESC
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sim_open (kind, callback, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *callback;
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struct _bfd *abfd;
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char **argv;
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{
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SIM_DESC sd = sim_state_alloc (kind, callback);
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (alloc_cpu (sd, abfd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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#if 0 /* FIXME: 'twould be nice if we could do this */
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/* These options override any module options.
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Obviously ambiguity should be avoided, however the caller may wish to
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augment the meaning of an option. */
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if (extra_options != NULL)
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sim_add_option_table (sd, extra_options);
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#endif
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/* Allocate core managed memory */
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sim_do_commandf (sd, "memory region 0,0x%lx", M32R_DEFAULT_MEM_SIZE);
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/* Allocate a handler for the MSPR register. */
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sim_core_attach (sd, NULL,
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0 /*level*/,
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access_write,
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0 /*space ???*/,
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MSPR_ADDR, 1 /*nr_bytes*/, 0 /*modulo*/,
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&m32r_mspr_device,
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NULL /*buffer*/);
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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free_state (sd);
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return 0;
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}
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/* check for/establish the a reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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free_state (sd);
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return 0;
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}
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/* Establish any remaining configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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free_state (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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free_state (sd);
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return 0;
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}
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/* Initialize various cgen things not done by common framework. */
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cgen_init (sd);
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{
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int i;
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for (i = 0; i < MAX_NR_PROCESSORS; ++i)
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{
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/* Only needed for profiling, but the structure member is small. */
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memset (& CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
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sizeof (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
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/* Hook in callback for reporting these stats */
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PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
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= print_m32r_misc_cpu;
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}
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}
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/* Store in a global so things like sparc32_dump_regs can be invoked
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from the gdb command line. */
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current_state = sd;
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return sd;
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}
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void
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sim_close (sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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sim_module_uninstall (sd);
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}
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SIM_RC
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sim_create_inferior (sd, abfd, argv, envp)
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SIM_DESC sd;
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struct _bfd *abfd;
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char **argv;
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char **envp;
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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SIM_ADDR addr;
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if (abfd != NULL)
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addr = bfd_get_start_address (abfd);
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else
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addr = 0;
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h_pc_set (current_cpu, addr);
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#if 0
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STATE_ARGV (sd) = sim_copy_argv (argv);
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STATE_ENVP (sd) = sim_copy_argv (envp);
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#endif
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return SIM_RC_OK;
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}
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int
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sim_stop (SIM_DESC sd)
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{
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switch (STATE_ARCHITECTURE (sd)->mach)
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{
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case bfd_mach_m32r :
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return m32r_engine_stop (sd);
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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return m32rx_engine_stop (sd);
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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void
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sim_resume (sd, step, siggnal)
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SIM_DESC sd;
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int step, siggnal;
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{
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switch (STATE_ARCHITECTURE (sd)->mach)
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{
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case bfd_mach_m32r :
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m32r_engine_run (sd, step, siggnal);
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break;
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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m32rx_engine_run (sd, step, siggnal);
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break;
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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/* PROFILE_CPU_CALLBACK */
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static void
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print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
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{
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SIM_DESC sd = CPU_STATE (cpu);
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char buf[20];
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if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
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{
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sim_io_printf (sd, "Miscellaneous Statistics\n\n");
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sim_io_printf (sd, " %-*s %s\n\n",
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PROFILE_LABEL_WIDTH, "Fill nops:",
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sim_add_commas (buf, sizeof (buf),
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CPU_M32R_MISC_PROFILE (cpu).fillnop_count));
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}
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}
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/* The contents of BUF are in target byte order. */
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int
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sim_fetch_register (sd, rn, buf, length)
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SIM_DESC sd;
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int rn;
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unsigned char *buf;
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int length;
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{
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switch (STATE_ARCHITECTURE (sd)->mach)
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{
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case bfd_mach_m32r :
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m32r_fetch_register (sd, rn, buf);
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break;
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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m32rx_fetch_register (sd, rn, buf);
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break;
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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return -1;
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}
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/* The contents of BUF are in target byte order. */
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int
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sim_store_register (sd, rn, buf, length)
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SIM_DESC sd;
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int rn;
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unsigned char *buf;
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int length;
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{
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switch (STATE_ARCHITECTURE (sd)->mach)
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{
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case bfd_mach_m32r :
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m32r_store_register (sd, rn, buf);
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break;
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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m32rx_store_register (sd, rn, buf);
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break;
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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return -1;
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}
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void
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sim_do_command (sd, cmd)
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SIM_DESC sd;
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char *cmd;
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{
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if (sim_args_command (sd, cmd) != SIM_RC_OK)
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sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
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}
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/* The semantic code invokes this for illegal (unrecognized) instructions. */
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void
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sim_engine_illegal_insn (current_cpu, pc)
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SIM_CPU *current_cpu;
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PCADDR pc;
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{
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sim_engine_halt (CPU_STATE (current_cpu), current_cpu, NULL, pc,
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sim_stopped, SIM_SIGILL);
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}
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/* Utility fns to access registers, without knowing the current mach.
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FIXME: Machine generate? */
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USI
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h_pc_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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case bfd_mach_m32r :
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return m32r_h_pc_get (current_cpu);
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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return m32rx_h_pc_get (current_cpu);
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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void
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h_pc_set (SIM_CPU *current_cpu, USI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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case bfd_mach_m32r :
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m32r_h_pc_set (current_cpu, newval);
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break;
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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m32rx_h_pc_set (current_cpu, newval);
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break;
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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SI
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h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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case bfd_mach_m32r :
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return m32r_h_gr_get (current_cpu, regno);
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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return m32rx_h_gr_get (current_cpu, regno);
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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void
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h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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case bfd_mach_m32r :
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m32r_h_gr_set (current_cpu, regno, newval);
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break;
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/* start-sanitize-m32rx */
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#ifdef HAVE_CPU_M32RX
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case bfd_mach_m32rx :
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m32rx_h_gr_set (current_cpu, regno, newval);
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break;
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#endif
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/* end-sanitize-m32rx */
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default :
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abort ();
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}
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}
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/* Read/write functions for system call interface. */
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static int
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syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
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unsigned long taddr, char *buf, int bytes)
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{
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SIM_DESC sd = (SIM_DESC) sc->p1;
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SIM_CPU *cpu = (SIM_CPU *) sc->p2;
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return sim_core_read_buffer (sd, cpu, sim_core_read_map, buf, taddr, bytes);
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}
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static int
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syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
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unsigned long taddr, const char *buf, int bytes)
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{
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SIM_DESC sd = (SIM_DESC) sc->p1;
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SIM_CPU *cpu = (SIM_CPU *) sc->p2;
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return sim_core_write_buffer (sd, cpu, sim_core_write_map, buf, taddr, bytes);
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}
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/* Trap support. */
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void
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do_trap (SIM_CPU *current_cpu, int num)
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{
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SIM_DESC sd = CPU_STATE (current_cpu);
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host_callback *cb = STATE_CALLBACK (sd);
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switch (num)
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{
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case 0 :
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/* Trap 0 is used for system calls. */
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{
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CB_SYSCALL s;
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CB_SYSCALL_INIT (&s);
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s.func = h_gr_get (current_cpu, 0);
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s.arg1 = h_gr_get (current_cpu, 1);
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s.arg2 = h_gr_get (current_cpu, 2);
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s.arg3 = h_gr_get (current_cpu, 3);
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if (s.func == TARGET_SYS_exit)
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{
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sim_engine_halt (sd, current_cpu, NULL, h_pc_get (current_cpu),
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sim_exited, s.arg1);
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}
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s.p1 = (PTR) sd;
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s.p2 = (PTR) current_cpu;
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s.read_mem = syscall_read_mem;
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s.write_mem = syscall_write_mem;
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cb_syscall (STATE_CALLBACK (sd), &s);
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h_gr_set (current_cpu, 2, s.errcode);
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h_gr_set (current_cpu, 0, s.result);
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h_gr_set (current_cpu, 1, s.result2);
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break;
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}
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case 1: /* breakpoint trap */
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sim_engine_halt (sd, current_cpu, NULL, NULL_CIA,
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sim_stopped, SIM_SIGTRAP);
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break;
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default :
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/* Unless environment operating, ignore other traps. */
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break;
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}
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}
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