8bf659e8f6
'ppc_gplast_regnum' member. (ppc_num_gprs): New enum constant. * ppc-linux-nat.c (ppc_register_u_addr): Use tdep->ppc_gp0_regnum and ppc_num_gprs instead of tdep->ppc_gplast_regnum. * rs6000-nat.c (regmap, fetch_inferior_registers, store_inferior_registers): Same. * rs6000-tdep.c (e500_pseudo_register_read) (e500_pseudo_register_write): Same. (rs6000_gdbarch_init): Don't initialize tdep->ppc_gplast_regnum.
594 lines
19 KiB
C
594 lines
19 KiB
C
/* PPC GNU/Linux native support.
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Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
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2003 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "gdb_string.h"
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#include "frame.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <signal.h>
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#include <sys/user.h>
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#include <sys/ioctl.h>
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#include "gdb_wait.h"
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#include <fcntl.h>
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#include <sys/procfs.h>
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#include <sys/ptrace.h>
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "ppc-tdep.h"
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#ifndef PT_READ_U
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#define PT_READ_U PTRACE_PEEKUSR
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#endif
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#ifndef PT_WRITE_U
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#define PT_WRITE_U PTRACE_POKEUSR
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#endif
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/* Default the type of the ptrace transfer to int. */
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#ifndef PTRACE_XFER_TYPE
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#define PTRACE_XFER_TYPE int
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#endif
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/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
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configure time check. Some older glibc's (for instance 2.2.1)
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don't have a specific powerpc version of ptrace.h, and fall back on
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a generic one. In such cases, sys/ptrace.h defines
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PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
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ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
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PTRACE_SETVRREGS to be. This also makes a configury check pretty
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much useless. */
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/* These definitions should really come from the glibc header files,
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but Glibc doesn't know about the vrregs yet. */
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#ifndef PTRACE_GETVRREGS
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#define PTRACE_GETVRREGS 18
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#define PTRACE_SETVRREGS 19
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#endif
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/* This oddity is because the Linux kernel defines elf_vrregset_t as
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an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
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However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
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the vrsave as an extra 4 bytes at the end. I opted for creating a
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flat array of chars, so that it is easier to manipulate for gdb.
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There are 32 vector registers 16 bytes longs, plus a VSCR register
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which is only 4 bytes long, but is fetched as a 16 bytes
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quantity. Up to here we have the elf_vrregset_t structure.
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Appended to this there is space for the VRSAVE register: 4 bytes.
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Even though this vrsave register is not included in the regset
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typedef, it is handled by the ptrace requests.
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Note that GNU/Linux doesn't support little endian PPC hardware,
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therefore the offset at which the real value of the VSCR register
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is located will be always 12 bytes.
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The layout is like this (where x is the actual value of the vscr reg): */
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/* *INDENT-OFF* */
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/*
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|.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
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<-------> <-------><-------><->
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VR0 VR31 VSCR VRSAVE
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*/
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/* *INDENT-ON* */
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#define SIZEOF_VRREGS 33*16+4
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typedef char gdb_vrregset_t[SIZEOF_VRREGS];
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/* For runtime check of ptrace support for VRREGS. */
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int have_ptrace_getvrregs = 1;
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int
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kernel_u_size (void)
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{
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return (sizeof (struct user));
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}
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/* *INDENT-OFF* */
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/* registers layout, as presented by the ptrace interface:
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PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
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/* *INDENT_ON * */
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static int
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ppc_register_u_addr (int regno)
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{
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int u_addr = -1;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
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interface, and not the wordsize of the program's ABI. */
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int wordsize = sizeof (PTRACE_XFER_TYPE);
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/* General purpose registers occupy 1 slot each in the buffer */
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if (regno >= tdep->ppc_gp0_regnum
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&& regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
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u_addr = ((regno - tdep->ppc_gp0_regnum + PT_R0) * wordsize);
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/* Floating point regs: eight bytes each in both 32- and 64-bit
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ptrace interfaces. Thus, two slots each in 32-bit interface, one
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slot each in 64-bit interface. */
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if (regno >= FP0_REGNUM && regno < FP0_REGNUM + ppc_num_fprs)
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u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8);
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/* UISA special purpose registers: 1 slot each */
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if (regno == PC_REGNUM)
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u_addr = PT_NIP * wordsize;
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if (regno == tdep->ppc_lr_regnum)
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u_addr = PT_LNK * wordsize;
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if (regno == tdep->ppc_cr_regnum)
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u_addr = PT_CCR * wordsize;
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if (regno == tdep->ppc_xer_regnum)
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u_addr = PT_XER * wordsize;
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if (regno == tdep->ppc_ctr_regnum)
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u_addr = PT_CTR * wordsize;
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#ifdef PT_MQ
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if (regno == tdep->ppc_mq_regnum)
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u_addr = PT_MQ * wordsize;
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#endif
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if (regno == tdep->ppc_ps_regnum)
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u_addr = PT_MSR * wordsize;
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if (regno == tdep->ppc_fpscr_regnum)
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u_addr = PT_FPSCR * wordsize;
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return u_addr;
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}
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/* The Linux kernel ptrace interface for AltiVec registers uses the
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registers set mechanism, as opposed to the interface for all the
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other registers, that stores/fetches each register individually. */
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static void
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fetch_altivec_register (int tid, int regno)
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{
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int ret;
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int offset = 0;
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gdb_vrregset_t regs;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
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if (ret < 0)
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{
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if (errno == EIO)
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{
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have_ptrace_getvrregs = 0;
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return;
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}
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perror_with_name ("Unable to fetch AltiVec register");
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}
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/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
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long on the hardware. We deal only with the lower 4 bytes of the
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vector. VRSAVE is at the end of the array in a 4 bytes slot, so
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there is no need to define an offset for it. */
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if (regno == (tdep->ppc_vrsave_regnum - 1))
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offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
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supply_register (regno,
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regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
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}
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static void
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fetch_register (int tid, int regno)
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{
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/* This isn't really an address. But ptrace thinks of it as one. */
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char mess[128]; /* For messages */
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int i;
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unsigned int offset; /* Offset of registers within the u area. */
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char buf[MAX_REGISTER_SIZE];
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CORE_ADDR regaddr = ppc_register_u_addr (regno);
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if (altivec_register_p (regno))
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{
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/* If this is the first time through, or if it is not the first
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time through, and we have comfirmed that there is kernel
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support for such a ptrace request, then go and fetch the
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register. */
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if (have_ptrace_getvrregs)
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{
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fetch_altivec_register (tid, regno);
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return;
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}
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/* If we have discovered that there is no ptrace support for
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AltiVec registers, fall through and return zeroes, because
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regaddr will be -1 in this case. */
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}
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if (regaddr == -1)
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{
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memset (buf, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
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supply_register (regno, buf);
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return;
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}
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/* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
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32-bit platform, 64-bit floating-point registers will require two
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transfers. */
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for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
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{
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errno = 0;
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*(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
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(PTRACE_ARG3_TYPE) regaddr, 0);
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regaddr += sizeof (PTRACE_XFER_TYPE);
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if (errno != 0)
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{
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sprintf (mess, "reading register %s (#%d)",
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REGISTER_NAME (regno), regno);
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perror_with_name (mess);
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}
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}
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/* Now supply the register. Be careful to map between ptrace's and
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the current_regcache's idea of the current wordsize. */
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if ((regno >= FP0_REGNUM && regno < FP0_REGNUM +32)
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|| gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
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/* FPs are always 64 bits. Little endian values are always found
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at the left-hand end of the register. */
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regcache_raw_supply (current_regcache, regno, buf);
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else
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/* Big endian register, need to fetch the right-hand end. */
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regcache_raw_supply (current_regcache, regno,
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(buf + sizeof (PTRACE_XFER_TYPE)
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- register_size (current_gdbarch, regno)));
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}
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static void
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supply_vrregset (gdb_vrregset_t *vrregsetp)
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{
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int i;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
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int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
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for (i = 0; i < num_of_vrregs; i++)
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{
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/* The last 2 registers of this set are only 32 bit long, not
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128. However an offset is necessary only for VSCR because it
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occupies a whole vector, while VRSAVE occupies a full 4 bytes
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slot. */
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if (i == (num_of_vrregs - 2))
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supply_register (tdep->ppc_vr0_regnum + i,
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*vrregsetp + i * vrregsize + offset);
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else
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supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
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}
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}
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static void
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fetch_altivec_registers (int tid)
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{
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int ret;
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gdb_vrregset_t regs;
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ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
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if (ret < 0)
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{
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if (errno == EIO)
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{
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have_ptrace_getvrregs = 0;
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return;
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}
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perror_with_name ("Unable to fetch AltiVec registers");
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}
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supply_vrregset (®s);
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}
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static void
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fetch_ppc_registers (int tid)
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{
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int i;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
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fetch_register (tid, i);
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if (tdep->ppc_mq_regnum != -1)
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fetch_register (tid, tdep->ppc_mq_regnum);
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if (have_ptrace_getvrregs)
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if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
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fetch_altivec_registers (tid);
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}
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/* Fetch registers from the child process. Fetch all registers if
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regno == -1, otherwise fetch all general registers or all floating
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point registers depending upon the value of regno. */
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void
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fetch_inferior_registers (int regno)
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{
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/* Overload thread id onto process id */
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int tid = TIDGET (inferior_ptid);
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/* No thread id, just use process id */
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if (tid == 0)
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tid = PIDGET (inferior_ptid);
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if (regno == -1)
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fetch_ppc_registers (tid);
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else
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fetch_register (tid, regno);
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}
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/* Store one register. */
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static void
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store_altivec_register (int tid, int regno)
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{
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int ret;
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int offset = 0;
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gdb_vrregset_t regs;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
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if (ret < 0)
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{
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if (errno == EIO)
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{
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have_ptrace_getvrregs = 0;
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return;
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}
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perror_with_name ("Unable to fetch AltiVec register");
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}
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/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
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long on the hardware. */
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if (regno == (tdep->ppc_vrsave_regnum - 1))
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offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
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regcache_collect (regno,
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regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
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ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
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if (ret < 0)
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perror_with_name ("Unable to store AltiVec register");
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}
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static void
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store_register (int tid, int regno)
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{
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/* This isn't really an address. But ptrace thinks of it as one. */
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CORE_ADDR regaddr = ppc_register_u_addr (regno);
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char mess[128]; /* For messages */
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int i;
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unsigned int offset; /* Offset of registers within the u area. */
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char buf[MAX_REGISTER_SIZE];
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if (altivec_register_p (regno))
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{
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store_altivec_register (tid, regno);
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return;
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}
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if (regaddr == -1)
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return;
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/* First collect the register value from the regcache. Be careful
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to to convert the regcache's wordsize into ptrace's wordsize. */
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memset (buf, 0, sizeof buf);
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if ((regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
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|| TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
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/* Floats are always 64-bit. Little endian registers are always
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at the left-hand end of the register cache. */
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regcache_raw_collect (current_regcache, regno, buf);
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else
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/* Big-endian registers belong at the right-hand end of the
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buffer. */
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regcache_raw_collect (current_regcache, regno,
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(buf + sizeof (PTRACE_XFER_TYPE)
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- register_size (current_gdbarch, regno)));
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for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
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{
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errno = 0;
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ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
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*(PTRACE_XFER_TYPE *) & buf[i]);
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regaddr += sizeof (PTRACE_XFER_TYPE);
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if (errno == EIO
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&& regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
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{
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/* Some older kernel versions don't allow fpscr to be written. */
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continue;
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}
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if (errno != 0)
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{
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sprintf (mess, "writing register %s (#%d)",
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REGISTER_NAME (regno), regno);
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perror_with_name (mess);
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}
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}
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}
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static void
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fill_vrregset (gdb_vrregset_t *vrregsetp)
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{
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int i;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
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int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
|
|
|
|
for (i = 0; i < num_of_vrregs; i++)
|
|
{
|
|
/* The last 2 registers of this set are only 32 bit long, not
|
|
128, but only VSCR is fetched as a 16 bytes quantity. */
|
|
if (i == (num_of_vrregs - 2))
|
|
regcache_collect (tdep->ppc_vr0_regnum + i,
|
|
*vrregsetp + i * vrregsize + offset);
|
|
else
|
|
regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
|
|
}
|
|
}
|
|
|
|
static void
|
|
store_altivec_registers (int tid)
|
|
{
|
|
int ret;
|
|
gdb_vrregset_t regs;
|
|
|
|
ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
|
|
if (ret < 0)
|
|
{
|
|
if (errno == EIO)
|
|
{
|
|
have_ptrace_getvrregs = 0;
|
|
return;
|
|
}
|
|
perror_with_name ("Couldn't get AltiVec registers");
|
|
}
|
|
|
|
fill_vrregset (®s);
|
|
|
|
if (ptrace (PTRACE_SETVRREGS, tid, 0, ®s) < 0)
|
|
perror_with_name ("Couldn't write AltiVec registers");
|
|
}
|
|
|
|
static void
|
|
store_ppc_registers (int tid)
|
|
{
|
|
int i;
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
|
|
|
for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
|
|
store_register (tid, i);
|
|
if (tdep->ppc_mq_regnum != -1)
|
|
store_register (tid, tdep->ppc_mq_regnum);
|
|
if (have_ptrace_getvrregs)
|
|
if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
|
|
store_altivec_registers (tid);
|
|
}
|
|
|
|
void
|
|
store_inferior_registers (int regno)
|
|
{
|
|
/* Overload thread id onto process id */
|
|
int tid = TIDGET (inferior_ptid);
|
|
|
|
/* No thread id, just use process id */
|
|
if (tid == 0)
|
|
tid = PIDGET (inferior_ptid);
|
|
|
|
if (regno >= 0)
|
|
store_register (tid, regno);
|
|
else
|
|
store_ppc_registers (tid);
|
|
}
|
|
|
|
void
|
|
supply_gregset (gdb_gregset_t *gregsetp)
|
|
{
|
|
/* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
|
|
interface, and not the wordsize of the program's ABI. */
|
|
int wordsize = sizeof (PTRACE_XFER_TYPE);
|
|
ppc_linux_supply_gregset (current_regcache, -1, gregsetp,
|
|
sizeof (gdb_gregset_t), wordsize);
|
|
}
|
|
|
|
static void
|
|
right_fill_reg (int regnum, void *reg)
|
|
{
|
|
/* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
|
|
interface, and not the wordsize of the program's ABI. */
|
|
int wordsize = sizeof (PTRACE_XFER_TYPE);
|
|
/* Right fill the register. */
|
|
regcache_raw_collect (current_regcache, regnum,
|
|
((bfd_byte *) reg
|
|
+ wordsize
|
|
- register_size (current_gdbarch, regnum)));
|
|
}
|
|
|
|
void
|
|
fill_gregset (gdb_gregset_t *gregsetp, int regno)
|
|
{
|
|
int regi;
|
|
elf_greg_t *regp = (elf_greg_t *) gregsetp;
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
|
const int elf_ngreg = 48;
|
|
|
|
|
|
/* Start with zeros. */
|
|
memset (regp, 0, elf_ngreg * sizeof (*regp));
|
|
|
|
for (regi = 0; regi < 32; regi++)
|
|
{
|
|
if ((regno == -1) || regno == regi)
|
|
right_fill_reg (regi, (regp + PT_R0 + regi));
|
|
}
|
|
|
|
if ((regno == -1) || regno == PC_REGNUM)
|
|
right_fill_reg (PC_REGNUM, regp + PT_NIP);
|
|
if ((regno == -1) || regno == tdep->ppc_lr_regnum)
|
|
right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK);
|
|
if ((regno == -1) || regno == tdep->ppc_cr_regnum)
|
|
regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
|
|
if ((regno == -1) || regno == tdep->ppc_xer_regnum)
|
|
regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
|
|
if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
|
|
right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR);
|
|
#ifdef PT_MQ
|
|
if (((regno == -1) || regno == tdep->ppc_mq_regnum)
|
|
&& (tdep->ppc_mq_regnum != -1))
|
|
right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ);
|
|
#endif
|
|
if ((regno == -1) || regno == tdep->ppc_ps_regnum)
|
|
right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR);
|
|
}
|
|
|
|
void
|
|
supply_fpregset (gdb_fpregset_t * fpregsetp)
|
|
{
|
|
ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp,
|
|
sizeof (gdb_fpregset_t));
|
|
}
|
|
|
|
/* Given a pointer to a floating point register set in /proc format
|
|
(fpregset_t *), update the register specified by REGNO from gdb's
|
|
idea of the current floating point register set. If REGNO is -1,
|
|
update them all. */
|
|
void
|
|
fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
|
|
{
|
|
int regi;
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
|
bfd_byte *fpp = (void *) fpregsetp;
|
|
|
|
for (regi = 0; regi < 32; regi++)
|
|
{
|
|
if ((regno == -1) || (regno == FP0_REGNUM + regi))
|
|
regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi);
|
|
}
|
|
if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
|
|
right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
|
|
}
|