7408194835
include/ * opcode/ppc.h: (spe2_opcodes, spe2_num_opcodes): New. (PPC_OPCODE_SPE2): New define. (PPC_OPCODE_EFS2): Likewise. (SPE2_XOP): Likewise. (SPE2_XOP_TO_SEG): Likewise. opcodes/ * ppc-dis.c (ppc_mopt): Add PPC_OPCODE_SPE2 and PPC_OPCODE_EFS2 flag to "e200z4" entry. New entries efs2 and spe2. Add PPC_OPCODE_SPE2 and PPC_OPCODE_EFS2 flag to "vle" entry. (SPE2_OPCD_SEGS): New macro. (spe2_opcd_indices): New. (disassemble_init_powerpc): Handle SPE2 opcodes. (lookup_spe2): New function. (print_insn_powerpc): call lookup_spe2. * ppc-opc.c (insert_evuimm1_ex0): New function. (extract_evuimm1_ex0): Likewise. (insert_evuimm_lt8): Likewise. (extract_evuimm_lt8): Likewise. (insert_off_spe2): Likewise. (extract_off_spe2): Likewise. (insert_Ddd): Likewise. (extract_Ddd): Likewise. (DD): New operand. (EVUIMM_LT8): Likewise. (EVUIMM_LT16): Adjust. (MMMM): New operand. (EVUIMM_1): Likewise. (EVUIMM_1_EX0): Likewise. (EVUIMM_2): Adjust. (NNN): New operand. (VX_OFF_SPE2): Likewise. (BBB): Likewise. (DDD): Likewise. (VX_MASK_DDD): New mask. (HH): New operand. (VX_RA_CONST): New macro. (VX_RA_CONST_MASK): Likewise. (VX_RB_CONST): Likewise. (VX_RB_CONST_MASK): Likewise. (VX_OFF_SPE2_MASK): Likewise. (VX_SPE_CRFD): Likewise. (VX_SPE_CRFD_MASK VX): Likewise. (VX_SPE2_CLR): Likewise. (VX_SPE2_CLR_MASK): Likewise. (VX_SPE2_SPLATB): Likewise. (VX_SPE2_SPLATB_MASK): Likewise. (VX_SPE2_OCTET): Likewise. (VX_SPE2_OCTET_MASK): Likewise. (VX_SPE2_DDHH): Likewise. (VX_SPE2_DDHH_MASK): Likewise. (VX_SPE2_HH): Likewise. (VX_SPE2_HH_MASK): Likewise. (VX_SPE2_EVMAR): Likewise. (VX_SPE2_EVMAR_MASK): Likewise. (PPCSPE2): Likewise. (PPCEFS2): Likewise. (vle_opcodes): Add EFS2 and some missing SPE opcodes. (powerpc_macros): Map old SPE instructions have new names with the same opcodes. Add SPE2 instructions which just are mapped to SPE2. (spe2_opcodes): Add SPE2 opcodes. gas/ * config/tc-ppc.c: (md_parse_option): Add mspe2 switch. (md_show_usage): Document -mspe2. (ppc_setup_opcodes): Handle spe2_opcodes. * doc/as.texinfo: Document -mspe2. * doc/c-ppc.texi: Likewise. * testsuite/gas/ppc/efs.d: New file. * testsuite/gas/ppc/efs.s: Likewise. * testsuite/gas/ppc/efs2.d: Likewise. * testsuite/gas/ppc/efs2.s: Likewise. * testsuite/gas/ppc/ppc.exp: Run new tests. * testsuite/gas/ppc/spe.d: New file. * testsuite/gas/ppc/spe.s: Likewise. * testsuite/gas/ppc/spe2-checks.d: Likewise. * testsuite/gas/ppc/spe2-checks.l: Likewise. * testsuite/gas/ppc/spe2-checks.s: Likewise. * testsuite/gas/ppc/spe2.d: Likewise. * testsuite/gas/ppc/spe2.s: Likewise. * testsuite/gas/ppc/spe_ambiguous.d: Likewise. * testsuite/gas/ppc/spe_ambiguous.s: Likewise.
240 lines
5.7 KiB
Plaintext
240 lines
5.7 KiB
Plaintext
@c Copyright (C) 2001-2017 Free Software Foundation, Inc.
|
|
@c This is part of the GAS manual.
|
|
@c For copying conditions, see the file as.texinfo.
|
|
@c man end
|
|
@ifset GENERIC
|
|
@page
|
|
@node PPC-Dependent
|
|
@chapter PowerPC Dependent Features
|
|
@end ifset
|
|
@ifclear GENERIC
|
|
@node Machine Dependencies
|
|
@chapter PowerPC Dependent Features
|
|
@end ifclear
|
|
|
|
@cindex PowerPC support
|
|
@menu
|
|
* PowerPC-Opts:: Options
|
|
* PowerPC-Pseudo:: PowerPC Assembler Directives
|
|
* PowerPC-Syntax:: PowerPC Syntax
|
|
@end menu
|
|
|
|
@node PowerPC-Opts
|
|
@section Options
|
|
|
|
@cindex options for PowerPC
|
|
@cindex PowerPC options
|
|
@cindex architectures, PowerPC
|
|
@cindex PowerPC architectures
|
|
The PowerPC chip family includes several successive levels, using the same
|
|
core instruction set, but including a few additional instructions at
|
|
each level. There are exceptions to this however. For details on what
|
|
instructions each variant supports, please see the chip's architecture
|
|
reference manual.
|
|
|
|
The following table lists all available PowerPC options.
|
|
|
|
@c man begin OPTIONS
|
|
@table @gcctabopt
|
|
@item -a32
|
|
Generate ELF32 or XCOFF32.
|
|
|
|
@item -a64
|
|
Generate ELF64 or XCOFF64.
|
|
|
|
@item -K PIC
|
|
Set EF_PPC_RELOCATABLE_LIB in ELF flags.
|
|
|
|
@item -mpwrx | -mpwr2
|
|
Generate code for POWER/2 (RIOS2).
|
|
|
|
@item -mpwr
|
|
Generate code for POWER (RIOS1)
|
|
|
|
@item -m601
|
|
Generate code for PowerPC 601.
|
|
|
|
@item -mppc, -mppc32, -m603, -m604
|
|
Generate code for PowerPC 603/604.
|
|
|
|
@item -m403, -m405
|
|
Generate code for PowerPC 403/405.
|
|
|
|
@item -m440
|
|
Generate code for PowerPC 440. BookE and some 405 instructions.
|
|
|
|
@item -m464
|
|
Generate code for PowerPC 464.
|
|
|
|
@item -m476
|
|
Generate code for PowerPC 476.
|
|
|
|
@item -m7400, -m7410, -m7450, -m7455
|
|
Generate code for PowerPC 7400/7410/7450/7455.
|
|
|
|
@item -m750cl
|
|
Generate code for PowerPC 750CL.
|
|
|
|
@item -m821, -m850, -m860
|
|
Generate code for PowerPC 821/850/860.
|
|
|
|
@item -mppc64, -m620
|
|
Generate code for PowerPC 620/625/630.
|
|
|
|
@item -me500, -me500x2
|
|
Generate code for Motorola e500 core complex.
|
|
|
|
@item -me500mc
|
|
Generate code for Freescale e500mc core complex.
|
|
|
|
@item -me500mc64
|
|
Generate code for Freescale e500mc64 core complex.
|
|
|
|
@item -me5500
|
|
Generate code for Freescale e5500 core complex.
|
|
|
|
@item -me6500
|
|
Generate code for Freescale e6500 core complex.
|
|
|
|
@item -mspe
|
|
Generate code for Motorola SPE instructions.
|
|
|
|
@item -mspe2
|
|
Generate code for Freescale SPE2 instructions.
|
|
|
|
@item -mtitan
|
|
Generate code for AppliedMicro Titan core complex.
|
|
|
|
@item -mppc64bridge
|
|
Generate code for PowerPC 64, including bridge insns.
|
|
|
|
@item -mbooke
|
|
Generate code for 32-bit BookE.
|
|
|
|
@item -ma2
|
|
Generate code for A2 architecture.
|
|
|
|
@item -me300
|
|
Generate code for PowerPC e300 family.
|
|
|
|
@item -maltivec
|
|
Generate code for processors with AltiVec instructions.
|
|
|
|
@item -mvle
|
|
Generate code for Freescale PowerPC VLE instructions.
|
|
|
|
@item -mvsx
|
|
Generate code for processors with Vector-Scalar (VSX) instructions.
|
|
|
|
@item -mhtm
|
|
Generate code for processors with Hardware Transactional Memory instructions.
|
|
|
|
@item -mpower4, -mpwr4
|
|
Generate code for Power4 architecture.
|
|
|
|
@item -mpower5, -mpwr5, -mpwr5x
|
|
Generate code for Power5 architecture.
|
|
|
|
@item -mpower6, -mpwr6
|
|
Generate code for Power6 architecture.
|
|
|
|
@item -mpower7, -mpwr7
|
|
Generate code for Power7 architecture.
|
|
|
|
@item -mpower8, -mpwr8
|
|
Generate code for Power8 architecture.
|
|
|
|
@item -mpower9, -mpwr9
|
|
Generate code for Power9 architecture.
|
|
|
|
@item -mcell
|
|
@item -mcell
|
|
Generate code for Cell Broadband Engine architecture.
|
|
|
|
@item -mcom
|
|
Generate code Power/PowerPC common instructions.
|
|
|
|
@item -many
|
|
Generate code for any architecture (PWR/PWRX/PPC).
|
|
|
|
@item -mregnames
|
|
Allow symbolic names for registers.
|
|
|
|
@item -mno-regnames
|
|
Do not allow symbolic names for registers.
|
|
|
|
@item -mrelocatable
|
|
Support for GCC's -mrelocatable option.
|
|
|
|
@item -mrelocatable-lib
|
|
Support for GCC's -mrelocatable-lib option.
|
|
|
|
@item -memb
|
|
Set PPC_EMB bit in ELF flags.
|
|
|
|
@item -mlittle, -mlittle-endian, -le
|
|
Generate code for a little endian machine.
|
|
|
|
@item -mbig, -mbig-endian, -be
|
|
Generate code for a big endian machine.
|
|
|
|
@item -msolaris
|
|
Generate code for Solaris.
|
|
|
|
@item -mno-solaris
|
|
Do not generate code for Solaris.
|
|
|
|
@item -nops=@var{count}
|
|
If an alignment directive inserts more than @var{count} nops, put a
|
|
branch at the beginning to skip execution of the nops.
|
|
@end table
|
|
@c man end
|
|
|
|
|
|
@node PowerPC-Pseudo
|
|
@section PowerPC Assembler Directives
|
|
|
|
@cindex directives for PowerPC
|
|
@cindex PowerPC directives
|
|
A number of assembler directives are available for PowerPC. The
|
|
following table is far from complete.
|
|
|
|
@table @code
|
|
@item .machine "string"
|
|
This directive allows you to change the machine for which code is
|
|
generated. @code{"string"} may be any of the -m cpu selection options
|
|
(without the -m) enclosed in double quotes, @code{"push"}, or
|
|
@code{"pop"}. @code{.machine "push"} saves the currently selected
|
|
cpu, which may be restored with @code{.machine "pop"}.
|
|
@end table
|
|
|
|
@node PowerPC-Syntax
|
|
@section PowerPC Syntax
|
|
@menu
|
|
* PowerPC-Chars:: Special Characters
|
|
@end menu
|
|
|
|
@node PowerPC-Chars
|
|
@subsection Special Characters
|
|
|
|
@cindex line comment character, PowerPC
|
|
@cindex PowerPC line comment character
|
|
The presence of a @samp{#} on a line indicates the start of a comment
|
|
that extends to the end of the current line.
|
|
|
|
If a @samp{#} appears as the first character of a line then the whole
|
|
line is treated as a comment, but in this case the line could also be
|
|
a logical line number directive (@pxref{Comments}) or a preprocessor
|
|
control command (@pxref{Preprocessing}).
|
|
|
|
If the assembler has been configured for the ppc-*-solaris* target
|
|
then the @samp{!} character also acts as a line comment character.
|
|
This can be disabled via the @option{-mno-solaris} command line
|
|
option.
|
|
|
|
@cindex line separator, PowerPC
|
|
@cindex statement separator, PowerPC
|
|
@cindex PowerPC line separator
|
|
The @samp{;} character can be used to separate statements on the same
|
|
line.
|