b34db5769e
* armnbsd-nat.c (supply_gregset): New function. Common code to supply the integer register set. (supply_fparegset): New function. Similar for FPA registers. (fetch_regs, fetch_fp_regs): Use them. (fetch_core_registers): Likewise. (fetch_elfcore_registers): New function. (arm_netbsd_elfcore_fns): New core-file type specification. (_initialize_arm_netbsd_nat): Register it.
465 lines
11 KiB
C
465 lines
11 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#ifndef FETCH_INFERIOR_REGISTERS
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#error Not FETCH_INFERIOR_REGISTERS
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#endif /* !FETCH_INFERIOR_REGISTERS */
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#include "arm-tdep.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "inferior.h"
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#include "regcache.h"
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#include "gdbcore.h"
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extern int arm_apcs_32;
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static void
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supply_gregset (struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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supply_register (regno, (char *) &gregset->r[regno]);
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supply_register (ARM_SP_REGNUM, (char *) &gregset->r_sp);
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supply_register (ARM_LR_REGNUM, (char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = ADDR_BITS_REMOVE (gregset->r_pc);
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supply_register (ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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supply_register (ARM_PS_REGNUM, (char *) &gregset->r_cpsr);
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else
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supply_register (ARM_PS_REGNUM, (char *) &gregset->r_pc);
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}
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static void
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supply_fparegset (struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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supply_register
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(regno, (char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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supply_register (ARM_FPS_REGNUM, (char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch general register");
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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supply_register (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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supply_register (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
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supply_register (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
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else
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supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_pc);
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break;
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default:
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supply_register (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (void)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch general registers");
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return;
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}
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supply_gregset (&inferior_registers);
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}
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static void
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fetch_fp_register (int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch floating-point register");
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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supply_register (ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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supply_register
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (void)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch general registers");
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return;
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}
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supply_fparegset (&inferior_fp_registers);
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}
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void
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fetch_inferior_registers (int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regno);
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else
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fetch_fp_register (regno);
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}
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else
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{
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fetch_regs ();
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fetch_fp_regs ();
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}
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}
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static void
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store_register (int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch general registers");
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
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pc_val = ADDR_BITS_REMOVE (pc_val);
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inferior_registers.r_pc
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^= ADDR_BITS_REMOVE (inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);
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psr_val ^= ADDR_BITS_REMOVE (psr_val);
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inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache_collect (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_registers, 0);
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if (ret < 0)
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warning ("unable to write register %d to inferior", regno);
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}
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static void
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store_regs (void)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_collect (regno, (char *) &inferior_registers.r[regno]);
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regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache_collect (ARM_PC_REGNUM, (char *) &pc_val);
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regcache_collect (ARM_PS_REGNUM, (char *) &psr_val);
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pc_val = ADDR_BITS_REMOVE (pc_val);
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psr_val ^= ADDR_BITS_REMOVE (psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_registers, 0);
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if (ret < 0)
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warning ("unable to store general registers");
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}
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static void
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store_fp_register (int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning ("unable to fetch floating-point registers");
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_collect (ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_collect
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
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if (ret < 0)
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warning ("unable to write register %d to inferior", regno);
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}
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static void
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store_fp_regs (void)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_collect
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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regcache_collect (ARM_FPS_REGNUM, (char *) &inferior_fp_registers.fpr_fpsr);
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
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if (ret < 0)
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warning ("unable to store floating-point registers");
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}
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void
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store_inferior_registers (int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regno);
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else
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store_fp_register (regno);
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}
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else
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{
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store_regs ();
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store_fp_regs ();
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}
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}
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struct md_core
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{
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struct reg intreg;
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struct fpreg freg;
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};
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static void
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fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct md_core *core_reg = (struct md_core *) core_reg_sect;
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int regno;
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CORE_ADDR r_pc;
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supply_gregset (&core_reg->intreg);
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supply_fparegset (&core_reg->freg);
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}
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static void
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fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct reg gregset;
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struct fpreg fparegset;
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switch (which)
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{
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case 0: /* Integer registers. */
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if (core_reg_size != sizeof (struct reg))
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warning ("wrong size of register set in core file");
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else
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{
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/* The memcpy may be unnecessary, but we can't really be sure
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of the alignment of the data in the core file. */
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memcpy (&gregset, core_reg_sect, sizeof (gregset));
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supply_gregset (&gregset);
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}
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break;
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case 2:
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if (core_reg_size != sizeof (struct fpreg))
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warning ("wrong size of FPA register set in core file");
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else
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{
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/* The memcpy may be unnecessary, but we can't really be sure
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of the alignment of the data in the core file. */
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memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
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supply_fparegset (&fparegset);
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}
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break;
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default:
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/* Don't know what kind of register request this is; just ignore it. */
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break;
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}
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}
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static struct core_fns arm_netbsd_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flovour. */
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default_check_format, /* check_format. */
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default_core_sniffer, /* core_sniffer. */
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fetch_core_registers, /* core_read_registers. */
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NULL
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};
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static struct core_fns arm_netbsd_elfcore_fns =
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{
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bfd_target_elf_flavour, /* core_flovour. */
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default_check_format, /* check_format. */
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default_core_sniffer, /* core_sniffer. */
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fetch_elfcore_registers, /* core_read_registers. */
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NULL
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};
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void
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_initialize_arm_netbsd_nat (void)
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{
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add_core_fns (&arm_netbsd_core_fns);
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add_core_fns (&arm_netbsd_elfcore_fns);
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}
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