b9c8cd1023
* cgen-trace.[ch], cgen-types.h, cgen-utils.c, genmloop.sh: New files. * sim-model.c: New file.
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/* Simulator cache definitions for CGEN simulators (and maybe others).
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef SCACHE_H
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#define SCACHE_H
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/* A cached insn. */
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typedef struct scache {
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IADDR next;
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union {
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#ifdef USE_SEM_SWITCH
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#ifdef __GNUC__
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void *sem_case;
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#else
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int sem_case;
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#endif
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#endif
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SEMANTIC_CACHE_FN *sem_fn;
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} semantic;
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ARGBUF argbuf;
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} SCACHE;
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/* Scache data for each cpu. */
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typedef struct cpu_scache {
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/* Simulator cache size. */
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int size;
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#define CPU_SCACHE_SIZE(cpu) ((cpu)->cgen_cpu.scache.size)
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/* Cache. */
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SCACHE *cache;
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#define CPU_SCACHE_CACHE(cpu) ((cpu)->cgen_cpu.scache.cache)
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#if 0 /* FIXME: wip */
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/* Free list. */
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SCACHE *free;
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#define CPU_SCACHE_FREE(cpu) ((cpu)->cgen_cpu.scache.free)
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/* Hash table. */
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SCACHE **hash_table;
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#define CPU_SCACHE_HASH_TABLE(cpu) ((cpu)->cgen_cpu.scache.hash_table)
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#endif
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#if WITH_PROFILE_SCACHE_P
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/* Cache hits, misses. */
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unsigned long hits, misses;
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#define CPU_SCACHE_HITS(cpu) ((cpu)->cgen_cpu.scache.hits)
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#define CPU_SCACHE_MISSES(cpu) ((cpu)->cgen_cpu.scache.misses)
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#endif
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} CPU_SCACHE;
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/* Default number of cached blocks. */
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#ifdef CONFIG_SIM_CACHE_SIZE
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#define SCACHE_DEFAULT_CACHE_SIZE CONFIG_SIM_CACHE_SIZE
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#else
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#define SCACHE_DEFAULT_CACHE_SIZE 1024
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#endif
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/* Hash a PC value. */
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/* FIXME: cpu specific */
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#define SCACHE_HASH_PC(state, pc) \
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(((pc) >> 1) & (STATE_SCACHE_SIZE (sd) - 1))
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/* Non-zero if cache is in use. */
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#define USING_SCACHE_P(sd) (STATE_SCACHE_SIZE (sd) > 0)
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/* Install the simulator cache into the simulator. */
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MODULE_INSTALL_FN scache_install;
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/* Flush all cpu's caches. */
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void scache_flush (SIM_DESC);
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/* Profiling support. */
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/* Print summary scache usage information. */
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void scache_print_profile (SIM_DESC sd, int verbose);
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#if WITH_PROFILE_SCACHE_P
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#define PROFILE_COUNT_SCACHE_HIT(cpu) \
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do { \
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if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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++ CPU_SCACHE_HITS (cpu); \
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} while (0)
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#define PROFILE_COUNT_SCACHE_MISS(cpu) \
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do { \
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if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
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++ CPU_SCACHE_MISSES (cpu); \
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} while (0)
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#else
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#define PROFILE_COUNT_SCACHE_HIT(cpu)
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#define PROFILE_COUNT_SCACHE_MISS(cpu)
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#endif
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#endif /* SCACHE_H */
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