binutils-gdb/ld/testsuite/ld-riscv-elf
Jim Wilson 9d1da81b26 RISC-V: Optimize lui and auipc relaxations for undefweak symbol.
For the lui and auipc relaxations, since the symbol value of an undefined weak
symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI
instruction.

	bfd/
	* elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak.
	(riscv_record_pcgp_hi_reloc): New parameter undefined_weak.
	Set undefined_weak field from it.
	(relax_func_t): New parameter undefined_weak.
	(_bfd_riscv_relax_call): New ignored parameter undefined_weak.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_delete): Likewise.
	(_bfd_riscv_relax_lui): New parameter undefined_weak.  If true,
	allow relaxing.  For LO12* relocs, set rs1 to x0 when undefined_weak.
	(_bfd_riscv_relax_pc): New parameter undefined_weak.  For LO12* relocs,
	set undefined_weak from hi_reloc.  If true, allow relaxing.  For LO12*
	relocs, set rs1 to x0 when undefined_weak and change to non-pcrel
	reloc.
	(_bfd_riscv_relax_section): New local undefined_weak.  Set for
	undef weak relocs that can be relaxed.  Pass to relax_func call.

	ld/
	* testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code.
	* testsuite/ld-riscv-elf/weakref64.s: Likewise.
	* testsuite/ld-riscv-elf/weakref32.d: Updated.
	* testsuite/ld-riscv-elf/weakref64.d: Updated.
2019-09-20 15:01:20 -07:00
..
attr-merge-arch-01.d
attr-merge-arch-01a.s
attr-merge-arch-01b.s
attr-merge-arch-02.d
attr-merge-arch-02a.s
attr-merge-arch-02b.s
attr-merge-arch-03.d
attr-merge-arch-03a.s
attr-merge-arch-03b.s
attr-merge-arch-failed-01.d Fix spelling mistakes in BFD library. 2019-01-21 12:39:24 +00:00
attr-merge-arch-failed-01a.s
attr-merge-arch-failed-01b.s
attr-merge-priv-spec-a.s
attr-merge-priv-spec-b.s
attr-merge-priv-spec.d
attr-merge-stack-align-a.s
attr-merge-stack-align-b.s
attr-merge-stack-align-failed-a.s
attr-merge-stack-align-failed-b.s
attr-merge-stack-align-failed.d
attr-merge-stack-align.d
attr-merge-strict-align-01.d
attr-merge-strict-align-01a.s
attr-merge-strict-align-01b.s
attr-merge-strict-align-02.d
attr-merge-strict-align-02a.s
attr-merge-strict-align-02b.s
attr-merge-strict-align-03.d
attr-merge-strict-align-03a.s
attr-merge-strict-align-03b.s
attr-merge-strict-align-04.d
attr-merge-strict-align-04a.s
attr-merge-strict-align-04b.s
attr-merge-strict-align-05.d
attr-merge-strict-align-05a.s
attr-merge-strict-align-05b.s
c-lui-2.d RISC-V: Fix lui relaxation issue with code at address 0. 2019-08-15 12:01:13 -07:00
c-lui-2.ld RISC-V: Fix lui relaxation issue with code at address 0. 2019-08-15 12:01:13 -07:00
c-lui-2.s RISC-V: Fix lui relaxation issue with code at address 0. 2019-08-15 12:01:13 -07:00
c-lui.d
c-lui.s
disas-jalr.d
disas-jalr.s
gp-test-lib.sd
gp-test.s
gp-test.sd
ld-riscv-elf.exp RISC-V: Fix lui relaxation issue with code at address 0. 2019-08-15 12:01:13 -07:00
pcrel-lo-addend-2.d
pcrel-lo-addend-2.s
pcrel-lo-addend.d
pcrel-lo-addend.s
weakref.ld
weakref32.d RISC-V: Optimize lui and auipc relaxations for undefweak symbol. 2019-09-20 15:01:20 -07:00
weakref32.s RISC-V: Optimize lui and auipc relaxations for undefweak symbol. 2019-09-20 15:01:20 -07:00
weakref64.d RISC-V: Optimize lui and auipc relaxations for undefweak symbol. 2019-09-20 15:01:20 -07:00
weakref64.s RISC-V: Optimize lui and auipc relaxations for undefweak symbol. 2019-09-20 15:01:20 -07:00