2c4ad78125
* features/Makefile (rs6000/powerpc-isa205-32l-expedite, rs6000/powerpc-isa205-altivec32l-expedite, powerpc-isa205-vsx32l-expedite, rs6000/powerpc-isa205-64l-expedite, rs6000/powerpc-isa205-altivec64l-expedite, powerpc-isa205-vsx64l-expedite): New variables. * regformats/rs6000/powerpc-isa205-32l.dat: Generate. * regformats/rs6000/powerpc-isa205-altivec32l.dat: Generate. * regformats/rs6000/powerpc-isa205-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa205-64l.dat: Generate. * regformats/rs6000/powerpc-isa205-altivec64l.dat: Generate. * regformats/rs6000/powerpc-isa205-vsx64l.dat: Generate. gdbserver/ * Makefile.in (powerpc-isa205-32l.o, powerpc-isa205-32l.c, powerpc-isa205-altivec32l.o, powerpc-isa205-altivec32l.c, powerpc-isa205-vsx32l.o, powerpc-isa205-vsx32l.c, powerpc-isa205-64l.o, powerpc-isa205-64l.c, powerpc-isa205-altivec64l.o, powerpc-isa205-altivec64l.c, powerpc-isa205-vsx64l.o, powerpc-isa205-vsx64l.c): New targets. * configure.srv (powerpc*-*-linux*): Add ISA 2.05 object files and XML target descriptions. * linux-ppc-low.c (ppc_arch_setup): Init registers with 64-bit FPSCR when inferior is running on an ISA 2.05 or later processor. Add special case to return offset for full 64-bit slot of FPSCR when in 32-bits.
112 lines
944 B
Plaintext
112 lines
944 B
Plaintext
# DO NOT EDIT: generated from rs6000/powerpc-isa205-altivec64l.xml
|
|
name:powerpc_isa205_altivec64l
|
|
xmltarget:powerpc-isa205-altivec64l.xml
|
|
expedite:r1,pc
|
|
64:r0
|
|
64:r1
|
|
64:r2
|
|
64:r3
|
|
64:r4
|
|
64:r5
|
|
64:r6
|
|
64:r7
|
|
64:r8
|
|
64:r9
|
|
64:r10
|
|
64:r11
|
|
64:r12
|
|
64:r13
|
|
64:r14
|
|
64:r15
|
|
64:r16
|
|
64:r17
|
|
64:r18
|
|
64:r19
|
|
64:r20
|
|
64:r21
|
|
64:r22
|
|
64:r23
|
|
64:r24
|
|
64:r25
|
|
64:r26
|
|
64:r27
|
|
64:r28
|
|
64:r29
|
|
64:r30
|
|
64:r31
|
|
64:f0
|
|
64:f1
|
|
64:f2
|
|
64:f3
|
|
64:f4
|
|
64:f5
|
|
64:f6
|
|
64:f7
|
|
64:f8
|
|
64:f9
|
|
64:f10
|
|
64:f11
|
|
64:f12
|
|
64:f13
|
|
64:f14
|
|
64:f15
|
|
64:f16
|
|
64:f17
|
|
64:f18
|
|
64:f19
|
|
64:f20
|
|
64:f21
|
|
64:f22
|
|
64:f23
|
|
64:f24
|
|
64:f25
|
|
64:f26
|
|
64:f27
|
|
64:f28
|
|
64:f29
|
|
64:f30
|
|
64:f31
|
|
64:pc
|
|
64:msr
|
|
32:cr
|
|
64:lr
|
|
64:ctr
|
|
32:xer
|
|
64:fpscr
|
|
64:orig_r3
|
|
64:trap
|
|
128:vr0
|
|
128:vr1
|
|
128:vr2
|
|
128:vr3
|
|
128:vr4
|
|
128:vr5
|
|
128:vr6
|
|
128:vr7
|
|
128:vr8
|
|
128:vr9
|
|
128:vr10
|
|
128:vr11
|
|
128:vr12
|
|
128:vr13
|
|
128:vr14
|
|
128:vr15
|
|
128:vr16
|
|
128:vr17
|
|
128:vr18
|
|
128:vr19
|
|
128:vr20
|
|
128:vr21
|
|
128:vr22
|
|
128:vr23
|
|
128:vr24
|
|
128:vr25
|
|
128:vr26
|
|
128:vr27
|
|
128:vr28
|
|
128:vr29
|
|
128:vr30
|
|
128:vr31
|
|
32:vscr
|
|
32:vrsave
|